1 /* $NetBSD: tx39biu.c,v 1.5 2001/06/14 11:09:55 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_tx39_debug.h" 40 #include "opt_tx39_watchdogtimer.h" 41 #include "opt_tx39biudebug.h" 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 47 #include <machine/bus.h> 48 49 #include <hpcmips/tx/tx39var.h> 50 #include <hpcmips/tx/tx39biureg.h> 51 52 #include <hpcmips/tx/txcsbusvar.h> 53 54 #define ISSET(x, s) ((x) & (1 << (s))) 55 #define ISSETPRINT(r, s, m) __is_set_print((u_int32_t)(r), \ 56 TX39_MEMCONFIG##s##_##m, #m) 57 58 int tx39biu_match(struct device *, struct cfdata *, void *); 59 void tx39biu_attach(struct device *, struct device *, void *); 60 void tx39biu_callback(struct device *); 61 int tx39biu_print(void *, const char *); 62 int tx39biu_intr(void *); 63 64 static void *__sc; /* XXX */ 65 66 void tx39biu_dump(tx_chipset_tag_t); 67 68 struct tx39biu_softc { 69 struct device sc_dev; 70 tx_chipset_tag_t sc_tc; 71 }; 72 73 struct cfattach tx39biu_ca = { 74 sizeof(struct tx39biu_softc), tx39biu_match, tx39biu_attach 75 }; 76 77 int 78 tx39biu_match(parent, cf, aux) 79 struct device *parent; 80 struct cfdata *cf; 81 void *aux; 82 { 83 return (ATTACH_NORMAL); 84 } 85 86 void 87 tx39biu_attach(parent, self, aux) 88 struct device *parent; 89 struct device *self; 90 void *aux; 91 { 92 struct txsim_attach_args *ta = aux; 93 struct tx39biu_softc *sc = (void*)self; 94 tx_chipset_tag_t tc; 95 #ifdef TX39_WATCHDOGTIMER 96 txreg_t reg; 97 #endif 98 99 sc->sc_tc = tc = ta->ta_tc; 100 printf("\n"); 101 #ifdef TX39BIUDEBUG 102 tx39biu_dump(tc); 103 #endif 104 105 #ifdef TX39_WATCHDOGTIMER 106 /* 107 * CLRWRBUSERRINT Bus error connected CPU HwInt0 108 */ 109 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 110 reg |= TX39_MEMCONFIG4_ENWATCH; 111 reg = TX39_MEMCONFIG4_WATCHTIMEVAL_SET(reg, 0xf); 112 tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg); 113 114 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 115 if (reg & TX39_MEMCONFIG4_ENWATCH) { 116 int i; 117 i = TX39_MEMCONFIG4_WATCHTIMEVAL(reg); 118 i = (1000 * (i + 1) * 64) / 36864; 119 printf("WatchDogTimerRate: %dus\n", i); 120 } 121 #endif 122 __sc = sc; 123 124 /* Clear watch dog timer interrupt */ 125 tx39biu_intr(sc); 126 127 /* 128 * Chip select virtual bridge 129 */ 130 config_defer(self, tx39biu_callback); 131 } 132 133 void 134 tx39biu_callback(self) 135 struct device *self; 136 { 137 struct tx39biu_softc *sc = (void*)self; 138 struct csbus_attach_args cba; 139 140 cba.cba_busname = "txcsbus"; 141 cba.cba_tc = sc->sc_tc; 142 config_found(self, &cba, tx39biu_print); 143 } 144 145 int 146 tx39biu_print(aux, pnp) 147 void *aux; 148 const char *pnp; 149 { 150 return (pnp ? QUIET : UNCONF); 151 } 152 153 int 154 tx39biu_intr(arg) 155 void *arg; 156 { 157 struct tx39biu_softc *sc = __sc; 158 tx_chipset_tag_t tc; 159 txreg_t reg; 160 161 if (!sc) { 162 return (0); 163 } 164 tc = sc->sc_tc; 165 /* Clear interrupt */ 166 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 167 reg |= TX39_MEMCONFIG4_CLRWRBUSERRINT; 168 tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg); 169 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 170 reg &= ~TX39_MEMCONFIG4_CLRWRBUSERRINT; 171 tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg); 172 173 return (0); 174 } 175 176 void 177 tx39biu_dump(tc) 178 tx_chipset_tag_t tc; 179 { 180 char *rowsel[] = {"18,17:9", "22,18,20,19,17:9", "20,22,21,19,17:9", 181 "22,23,21,19,17:9"}; 182 char *colsel[] = {"22,20,18,8:1", "19,18,8:2", "21,20,18,8:2", 183 "23,22,20,18,8:2", "24,22,20,18,8:2", 184 "18,p,X,8:0","22,p,X,21,8:0", "18,p,X,21,8:1", 185 "22,p,X,23,21,8:1", "24,23,21,8:2"}; 186 txreg_t reg; 187 int i; 188 /* 189 * Memory config 0 register 190 */ 191 reg = tx_conf_read(tc, TX39_MEMCONFIG0_REG); 192 printf(" config0:"); 193 ISSETPRINT(reg, 0, ENDCLKOUTTRI); 194 ISSETPRINT(reg, 0, DISDQMINIT); 195 ISSETPRINT(reg, 0, ENSDRAMPD); 196 ISSETPRINT(reg, 0, SHOWDINO); 197 ISSETPRINT(reg, 0, ENRMAP2); 198 ISSETPRINT(reg, 0, ENRMAP1); 199 ISSETPRINT(reg, 0, ENWRINPAGE); 200 ISSETPRINT(reg, 0, ENCS3USER); 201 ISSETPRINT(reg, 0, ENCS2USER); 202 ISSETPRINT(reg, 0, ENCS1USER); 203 ISSETPRINT(reg, 0, ENCS1DRAM); 204 ISSETPRINT(reg, 0, CS3SIZE); 205 ISSETPRINT(reg, 0, CS2SIZE); 206 ISSETPRINT(reg, 0, CS1SIZE); 207 ISSETPRINT(reg, 0, CS0SIZE); 208 printf("\n"); 209 for (i = 0; i < 2; i++) { 210 int r, c; 211 printf(" BANK%d: ", i); 212 switch (i ? TX39_MEMCONFIG0_BANK1CONF(reg) 213 : TX39_MEMCONFIG0_BANK0CONF(reg)) { 214 case TX39_MEMCONFIG0_BANKCONF_16BITSDRAM: 215 printf("16bit SDRAM"); 216 break; 217 case TX39_MEMCONFIG0_BANKCONF_8BITSDRAM: 218 printf("8bit SDRAM"); 219 break; 220 case TX39_MEMCONFIG0_BANKCONF_32BITSDHDRAM: 221 printf("32bit DRAM/HDRAM"); 222 break; 223 case TX39_MEMCONFIG0_BANKCONF_16BITSDHDRAM: 224 printf("16bit DRAM/HDRAM"); 225 break; 226 } 227 if (i == 1) { 228 r = TX39_MEMCONFIG0_ROWSEL1(reg); 229 c = TX39_MEMCONFIG0_COLSEL1(reg); 230 } else { 231 r = TX39_MEMCONFIG0_ROWSEL0(reg); 232 c = TX39_MEMCONFIG0_COLSEL0(reg); 233 } 234 printf(" ROW %s COL %s\n", rowsel[r], colsel[c]); 235 } 236 237 /* 238 * Memory config 3 register 239 */ 240 printf(" config3:"); 241 reg = tx_conf_read(tc, TX39_MEMCONFIG3_REG); 242 #ifdef TX391X 243 ISSETPRINT(reg, 3, ENMCS3PAGE); 244 ISSETPRINT(reg, 3, ENMCS2PAGE); 245 ISSETPRINT(reg, 3, ENMCS1PAGE); 246 ISSETPRINT(reg, 3, ENMCS0PAGE); 247 #endif /* TX391X */ 248 ISSETPRINT(reg, 3, ENCS3PAGE); 249 ISSETPRINT(reg, 3, ENCS2PAGE); 250 ISSETPRINT(reg, 3, ENCS1PAGE); 251 ISSETPRINT(reg, 3, ENCS0PAGE); 252 ISSETPRINT(reg, 3, CARD2WAITEN); 253 ISSETPRINT(reg, 3, CARD1WAITEN); 254 ISSETPRINT(reg, 3, CARD2IOEN); 255 ISSETPRINT(reg, 3, CARD1IOEN); 256 #ifdef TX391X 257 ISSETPRINT(reg, 3, PORT8SEL); 258 #endif /* TX391X */ 259 #ifdef TX392X 260 ISSETPRINT(reg, 3, CARD2_8SEL); 261 ISSETPRINT(reg, 3, CARD1_8SEL); 262 #endif /* TX392X */ 263 264 printf("\n"); 265 266 /* 267 * Memory config 4 register 268 */ 269 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); 270 printf(" config4:"); 271 ISSETPRINT(reg, 4, ENBANK1HDRAM); 272 ISSETPRINT(reg, 4, ENBANK0HDRAM); 273 ISSETPRINT(reg, 4, ENARB); 274 ISSETPRINT(reg, 4, DISSNOOP); 275 ISSETPRINT(reg, 4, CLRWRBUSERRINT); 276 ISSETPRINT(reg, 4, ENBANK1OPT); 277 ISSETPRINT(reg, 4, ENBANK0OPT); 278 ISSETPRINT(reg, 4, ENWATCH); 279 ISSETPRINT(reg, 4, MEMPOWERDOWN); 280 ISSETPRINT(reg, 4, ENRFSH1); 281 ISSETPRINT(reg, 4, ENRFSH0); 282 if (reg & TX39_MEMCONFIG4_ENWATCH) { 283 i = TX39_MEMCONFIG4_WATCHTIMEVAL(reg); 284 i = (1000 * (i + 1) * 64) / 36864; 285 printf("WatchDogTimerRate: %dus", i); 286 } 287 printf("\n"); 288 } 289