xref: /netbsd-src/sys/arch/hpcmips/tx/tx39.c (revision e77448e07be3174235c13f58032a0d6d0ab7638d)
1 /*	$NetBSD: tx39.c,v 1.39 2008/04/28 20:23:21 martin Exp $ */
2 
3 /*-
4  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: tx39.c,v 1.39 2008/04/28 20:23:21 martin Exp $");
34 
35 #include "opt_vr41xx.h"
36 #include "opt_tx39xx.h"
37 #include "m38813c.h"
38 #include "tc5165buf.h"
39 
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 
43 #include <uvm/uvm_extern.h>
44 
45 #include <mips/cache.h>
46 
47 #include <machine/locore.h>   /* cpu_id */
48 #include <machine/bootinfo.h> /* bootinfo */
49 #include <machine/sysconf.h>  /* platform */
50 
51 #include <machine/platid.h>
52 #include <machine/platid_mask.h>
53 
54 #include <machine/bus.h>
55 
56 #include <hpcmips/tx/tx39biureg.h>
57 #include <hpcmips/tx/tx39reg.h>
58 #include <hpcmips/tx/tx39var.h>
59 #ifdef TX391X
60 #include <hpcmips/tx/tx3912videovar.h>
61 #endif
62 
63 #include <sys/termios.h>
64 #include <sys/ttydefaults.h>
65 #include <hpcmips/tx/tx39uartvar.h>
66 #ifndef CONSPEED
67 #define CONSPEED TTYDEF_SPEED
68 #endif
69 
70 /* console keyboard */
71 #if NM38813C > 0
72 #include <hpcmips/dev/m38813cvar.h>
73 #endif
74 #if NTC5165BUF > 0
75 #include <hpcmips/dev/tc5165bufvar.h>
76 #endif
77 
78 struct tx_chipset_tag tx_chipset;
79 
80 void	tx_init(void);
81 #if defined(VR41XX) && defined(TX39XX)
82 #define	TX_INTR	tx_intr
83 #else
84 #define	TX_INTR	cpu_intr	/* locore_mips3 directly call this */
85 #endif
86 
87 extern void TX_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
88 
89 void	tx39clock_cpuspeed(int *, int *);
90 
91 /* TX39-specific initialization vector */
92 void	tx_cons_init(void);
93 void    tx_fb_init(void **);
94 void    tx_mem_init(paddr_t);
95 void	tx_find_dram(paddr_t, paddr_t);
96 void	tx_reboot(int, char *);
97 
98 void
99 tx_init()
100 {
101 	tx_chipset_tag_t tc;
102 	int model, rev;
103 	int cpuclock;
104 
105 	tc = tx_conf_get_tag();
106 	/*
107 	 * Platform Specific Function Hooks
108 	 */
109 	platform.cpu_intr	= TX_INTR;
110 	platform.cpu_idle	= NULL; /* not implemented yet */
111 	platform.cons_init	= tx_cons_init;
112 	platform.fb_init	= tx_fb_init;
113 	platform.mem_init	= tx_mem_init;
114 	platform.reboot		= tx_reboot;
115 
116 
117 	model = MIPS_PRID_REV(cpu_id);
118 
119 	switch (model) {
120 	default:
121 		/* Unknown TOSHIBA TX39-series */
122 		sprintf(cpu_name, "Unknown TOSHIBA TX39-series %x", model);
123 		break;
124 	case TMPR3912:
125 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
126 
127 		sprintf(cpu_name, "TOSHIBA TMPR3912 %d.%02d MHz",
128 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
129 		tc->tc_chipset = __TX391X;
130 		break;
131 	case TMPR3922:
132 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
133 		rev = tx_conf_read(tc, TX3922_REVISION_REG);
134 
135 		sprintf(cpu_name, "TOSHIBA TMPR3922 rev. %x.%x "
136 		    "%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf,
137 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
138 		tc->tc_chipset = __TX392X;
139 		break;
140 	}
141 }
142 
143 void
144 tx_fb_init(void **kernend)
145 {
146 #ifdef TX391X
147 	paddr_t fb_end;
148 
149 	fb_end = MIPS_KSEG0_TO_PHYS(mem_clusters[0].start +
150 	    mem_clusters[0].size - 1);
151 	tx3912video_init(MIPS_KSEG0_TO_PHYS(*kernend), &fb_end);
152 
153 	/* Skip V-RAM area */
154 	*kernend = (void *)MIPS_PHYS_TO_KSEG0(fb_end);
155 #endif /* TX391X */
156 #ifdef TX392X
157 	/*
158 	 *  Plum V-RAM isn't accessible until pmap_bootstrap,
159 	 * at this time, frame buffer device is disabled.
160 	 */
161 	bootinfo->fb_addr = 0;
162 #endif /* TX392X */
163 }
164 
165 void
166 tx_mem_init(paddr_t kernend)
167 {
168 
169 	mem_clusters[0].start = 0;
170 	mem_clusters[0].size = kernend;
171 	mem_cluster_cnt = 1;
172 	/* search DRAM bank 0 */
173 	tx_find_dram(kernend, 0x02000000);
174 
175 	/* search DRAM bank 1 */
176 	tx_find_dram(0x02000000, 0x04000000);
177 }
178 
179 void
180 tx_find_dram(paddr_t start, paddr_t end)
181 {
182 	char *page, *startaddr, *endaddr;
183 	u_int32_t magic0, magic1;
184 #define MAGIC0		(*(volatile u_int32_t *)(page + 0))
185 #define MAGIC1		(*(volatile u_int32_t *)(page + 4))
186 
187 	startaddr = (char *)MIPS_PHYS_TO_KSEG1(start);
188 	endaddr = (char *)MIPS_PHYS_TO_KSEG1(end);
189 
190 	page = startaddr;
191 	if (badaddr(page, 4))
192 		return;
193 
194 	do {
195 		magic0 = random();
196 		magic1 = random();
197 	} while (MAGIC0 == magic0 || MAGIC0 == magic1);
198 
199 	MAGIC0 = magic0;
200 	MAGIC1 = magic1;
201 	wbflush();
202 
203 	if (MAGIC0 != magic0 || MAGIC1 != magic1)
204 		return;
205 
206 	for (page += PAGE_SIZE; page < endaddr; page += PAGE_SIZE) {
207 		if (badaddr(page, 4))
208 			return;
209 		if (MAGIC0 == magic0 &&
210 		    MAGIC1 == magic1) {
211 			goto memend_found;
212 		}
213 	}
214 
215 	/* check for 32MByte memory */
216 	page -= PAGE_SIZE;
217 	MAGIC0 = magic0;
218 	MAGIC1 = magic1;
219 	wbflush();
220 	if (MAGIC0 != magic0 || MAGIC1 != magic1)
221 		return; /* no memory in this bank */
222 
223  memend_found:
224 	mem_clusters[mem_cluster_cnt].start = start;
225 	mem_clusters[mem_cluster_cnt].size = page - startaddr;
226 
227 	/* skip kernel area */
228 	if (mem_cluster_cnt == 1)
229 		mem_clusters[mem_cluster_cnt].size -= start;
230 
231 	mem_cluster_cnt++;
232 #undef MAGIC0
233 #undef MAGIC1
234 }
235 
236 void
237 tx_reboot(int howto, char *bootstr)
238 {
239 
240 	goto *(u_int32_t *)MIPS_RESET_EXC_VEC;
241 }
242 
243 void
244 tx_cons_init()
245 {
246 	int slot;
247 #define CONSPLATIDMATCH(p)						\
248 	platid_match(&platid, &platid_mask_MACH_##p)
249 
250 #ifdef SERIALCONSSLOT
251 	slot = SERIALCONSSLOT;
252 #else
253 	slot = TX39_UARTA;
254 #endif
255 	if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
256 		if(txcom_cnattach(slot, CONSPEED,
257 		    (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
258 			panic("tx_cons_init: can't attach serial console.");
259 		}
260 	} else {
261 #if NM38813C > 0
262 		if(CONSPLATIDMATCH(VICTOR_INTERLINK) &&
263 		    m38813c_cnattach(TX39_SYSADDR_CARD1)) {
264 			goto panic;
265 		}
266 #endif
267 #if NTC5165BUF > 0
268 		if(CONSPLATIDMATCH(COMPAQ_C) &&
269 		    tc5165buf_cnattach(TX39_SYSADDR_CS3)) {
270 			goto panic;
271 		}
272 
273 		if(CONSPLATIDMATCH(SHARP_TELIOS) &&
274 		    tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
275 			goto panic;
276 		}
277 
278 		if(CONSPLATIDMATCH(SHARP_MOBILON) &&
279 		    tc5165buf_cnattach(TX39_SYSADDR_MCS0)) {
280 			goto panic;
281 		}
282 #endif
283 	}
284 
285 	return;
286  panic:
287 	panic("tx_cons_init: can't init console");
288 	/* NOTREACHED */
289 }
290 
291 void
292 tx_conf_register_intr(tx_chipset_tag_t t, void *intrt)
293 {
294 
295 	KASSERT(t == &tx_chipset);
296 	tx_chipset.tc_intrt = intrt;
297 }
298 
299 void
300 tx_conf_register_power(tx_chipset_tag_t t, void *powert)
301 {
302 
303 	KASSERT(t == &tx_chipset);
304 	tx_chipset.tc_powert = powert;
305 }
306 
307 void
308 tx_conf_register_clock(tx_chipset_tag_t t, void *clockt)
309 {
310 
311 	KASSERT(t == &tx_chipset);
312 	tx_chipset.tc_clockt = clockt;
313 }
314 
315 void
316 tx_conf_register_sound(tx_chipset_tag_t t, void *soundt)
317 {
318 
319 	KASSERT(t == &tx_chipset);
320 	tx_chipset.tc_soundt = soundt;
321 }
322 
323 void
324 tx_conf_register_video(tx_chipset_tag_t t, void *videot)
325 {
326 
327 	KASSERT(t == &tx_chipset);
328 	tx_chipset.tc_videot = videot;
329 }
330