xref: /netbsd-src/sys/arch/hpcmips/tx/tx39.c (revision b45fa494daa2ba02187711d31a4144faf0993066)
1 /*	$NetBSD: tx39.c,v 1.43 2011/02/26 12:07:45 tsutsui Exp $ */
2 
3 /*-
4  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: tx39.c,v 1.43 2011/02/26 12:07:45 tsutsui Exp $");
34 
35 #include "opt_vr41xx.h"
36 #include "opt_tx39xx.h"
37 #include "m38813c.h"
38 #include "tc5165buf.h"
39 
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/intr.h>
43 
44 #include <uvm/uvm_extern.h>
45 
46 #include <mips/cache.h>
47 #include <mips/locore.h>
48 
49 #include <machine/bootinfo.h> /* bootinfo */
50 #include <machine/sysconf.h>  /* platform */
51 
52 #include <machine/platid.h>
53 #include <machine/platid_mask.h>
54 
55 #include <machine/bus.h>
56 
57 #include <hpcmips/tx/tx39biureg.h>
58 #include <hpcmips/tx/tx39reg.h>
59 #include <hpcmips/tx/tx39var.h>
60 #ifdef TX391X
61 #include <hpcmips/tx/tx3912videovar.h>
62 #endif
63 
64 #include <sys/termios.h>
65 #include <sys/ttydefaults.h>
66 #include <hpcmips/tx/tx39uartvar.h>
67 #ifndef CONSPEED
68 #define CONSPEED TTYDEF_SPEED
69 #endif
70 
71 /* console keyboard */
72 #if NM38813C > 0
73 #include <hpcmips/dev/m38813cvar.h>
74 #endif
75 #if NTC5165BUF > 0
76 #include <hpcmips/dev/tc5165bufvar.h>
77 #endif
78 
79 struct tx_chipset_tag tx_chipset;
80 
81 void	tx_init(void);
82 #if defined(VR41XX) && defined(TX39XX)
83 #define	TX_INTR	tx_intr
84 #else
85 #define	TX_INTR	cpu_intr	/* locore_mips3 directly call this */
86 #endif
87 
88 extern void TX_INTR(int, vaddr_t, uint32_t);
89 
90 void	tx39clock_cpuspeed(int *, int *);
91 
92 /* TX39-specific initialization vector */
93 void	tx_cons_init(void);
94 void    tx_fb_init(void **);
95 void    tx_mem_init(paddr_t);
96 void	tx_find_dram(paddr_t, paddr_t);
97 void	tx_reboot(int, char *);
98 
99 void
100 tx_init(void)
101 {
102 	tx_chipset_tag_t tc;
103 	int model, rev;
104 	int cpuclock;
105 
106 	tc = tx_conf_get_tag();
107 	/*
108 	 * Platform Specific Function Hooks
109 	 */
110 	platform.cpu_intr	= TX_INTR;
111 	platform.cpu_idle	= NULL; /* not implemented yet */
112 	platform.cons_init	= tx_cons_init;
113 	platform.fb_init	= tx_fb_init;
114 	platform.mem_init	= tx_mem_init;
115 	platform.reboot		= tx_reboot;
116 
117 
118 	model = MIPS_PRID_REV(mips_options.mips_cpu_id);
119 
120 	switch (model) {
121 	default:
122 		/* Unknown TOSHIBA TX39-series */
123 		sprintf(hpcmips_cpuname,
124 		    "Unknown TOSHIBA TX39-series %x", model);
125 		break;
126 	case TMPR3912:
127 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
128 
129 		sprintf(hpcmips_cpuname, "TOSHIBA TMPR3912 %d.%02d MHz",
130 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
131 		tc->tc_chipset = __TX391X;
132 		break;
133 	case TMPR3922:
134 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
135 		rev = tx_conf_read(tc, TX3922_REVISION_REG);
136 
137 		sprintf(hpcmips_cpuname, "TOSHIBA TMPR3922 rev. %x.%x "
138 		    "%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf,
139 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
140 		tc->tc_chipset = __TX392X;
141 		break;
142 	}
143 }
144 
145 void
146 tx_fb_init(void **kernend)
147 {
148 #ifdef TX391X
149 	paddr_t fb_end;
150 
151 	fb_end = MIPS_KSEG0_TO_PHYS(mem_clusters[0].start +
152 	    mem_clusters[0].size - 1);
153 	tx3912video_init(MIPS_KSEG0_TO_PHYS(*kernend), &fb_end);
154 
155 	/* Skip V-RAM area */
156 	*kernend = (void *)MIPS_PHYS_TO_KSEG0(fb_end);
157 #endif /* TX391X */
158 #ifdef TX392X
159 	/*
160 	 *  Plum V-RAM isn't accessible until pmap_bootstrap,
161 	 * at this time, frame buffer device is disabled.
162 	 */
163 	bootinfo->fb_addr = 0;
164 #endif /* TX392X */
165 }
166 
167 void
168 tx_mem_init(paddr_t kernend)
169 {
170 
171 	mem_clusters[0].start = 0;
172 	mem_clusters[0].size = kernend;
173 	mem_cluster_cnt = 1;
174 	/* search DRAM bank 0 */
175 	tx_find_dram(kernend, 0x02000000);
176 
177 	/* search DRAM bank 1 */
178 	tx_find_dram(0x02000000, 0x04000000);
179 }
180 
181 void
182 tx_find_dram(paddr_t start, paddr_t end)
183 {
184 	char *page, *startaddr, *endaddr;
185 	uint32_t magic0, magic1;
186 #define MAGIC0		(*(volatile uint32_t *)(page + 0))
187 #define MAGIC1		(*(volatile uint32_t *)(page + 4))
188 
189 	startaddr = (char *)MIPS_PHYS_TO_KSEG1(start);
190 	endaddr = (char *)MIPS_PHYS_TO_KSEG1(end);
191 
192 	page = startaddr;
193 	if (badaddr(page, 4))
194 		return;
195 
196 	do {
197 		magic0 = random();
198 		magic1 = random();
199 	} while (MAGIC0 == magic0 || MAGIC0 == magic1);
200 
201 	MAGIC0 = magic0;
202 	MAGIC1 = magic1;
203 	wbflush();
204 
205 	if (MAGIC0 != magic0 || MAGIC1 != magic1)
206 		return;
207 
208 	for (page += PAGE_SIZE; page < endaddr; page += PAGE_SIZE) {
209 		if (badaddr(page, 4))
210 			return;
211 		if (MAGIC0 == magic0 &&
212 		    MAGIC1 == magic1) {
213 			goto memend_found;
214 		}
215 	}
216 
217 	/* check for 32MByte memory */
218 	page -= PAGE_SIZE;
219 	MAGIC0 = magic0;
220 	MAGIC1 = magic1;
221 	wbflush();
222 	if (MAGIC0 != magic0 || MAGIC1 != magic1)
223 		return; /* no memory in this bank */
224 
225  memend_found:
226 	mem_clusters[mem_cluster_cnt].start = start;
227 	mem_clusters[mem_cluster_cnt].size = page - startaddr;
228 
229 	/* skip kernel area */
230 	if (mem_cluster_cnt == 1)
231 		mem_clusters[mem_cluster_cnt].size -= start;
232 
233 	mem_cluster_cnt++;
234 #undef MAGIC0
235 #undef MAGIC1
236 }
237 
238 void
239 tx_reboot(int howto, char *bootstr)
240 {
241 
242 	goto *(uint32_t *)MIPS_RESET_EXC_VEC;
243 }
244 
245 void
246 tx_cons_init(void)
247 {
248 	int slot;
249 #define CONSPLATIDMATCH(p)						\
250 	platid_match(&platid, &platid_mask_MACH_##p)
251 
252 #ifdef SERIALCONSSLOT
253 	slot = SERIALCONSSLOT;
254 #else
255 	slot = TX39_UARTA;
256 #endif
257 	if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
258 		if(txcom_cnattach(slot, CONSPEED,
259 		    (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
260 			panic("tx_cons_init: can't attach serial console.");
261 		}
262 	} else {
263 #if NM38813C > 0
264 		if(CONSPLATIDMATCH(VICTOR_INTERLINK) &&
265 		    m38813c_cnattach(TX39_SYSADDR_CARD1)) {
266 			goto panic;
267 		}
268 #endif
269 #if NTC5165BUF > 0
270 		if(CONSPLATIDMATCH(COMPAQ_C) &&
271 		    tc5165buf_cnattach(TX39_SYSADDR_CS3)) {
272 			goto panic;
273 		}
274 
275 		if(CONSPLATIDMATCH(SHARP_TELIOS) &&
276 		    tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
277 			goto panic;
278 		}
279 
280 		if(CONSPLATIDMATCH(SHARP_MOBILON) &&
281 		    tc5165buf_cnattach(TX39_SYSADDR_MCS0)) {
282 			goto panic;
283 		}
284 #endif
285 	}
286 
287 	return;
288  panic:
289 	panic("tx_cons_init: can't init console");
290 	/* NOTREACHED */
291 }
292 
293 void
294 tx_conf_register_intr(tx_chipset_tag_t t, void *intrt)
295 {
296 
297 	KASSERT(t == &tx_chipset);
298 	tx_chipset.tc_intrt = intrt;
299 }
300 
301 void
302 tx_conf_register_power(tx_chipset_tag_t t, void *powert)
303 {
304 
305 	KASSERT(t == &tx_chipset);
306 	tx_chipset.tc_powert = powert;
307 }
308 
309 void
310 tx_conf_register_clock(tx_chipset_tag_t t, void *clockt)
311 {
312 
313 	KASSERT(t == &tx_chipset);
314 	tx_chipset.tc_clockt = clockt;
315 }
316 
317 void
318 tx_conf_register_sound(tx_chipset_tag_t t, void *soundt)
319 {
320 
321 	KASSERT(t == &tx_chipset);
322 	tx_chipset.tc_soundt = soundt;
323 }
324 
325 void
326 tx_conf_register_video(tx_chipset_tag_t t, void *videot)
327 {
328 
329 	KASSERT(t == &tx_chipset);
330 	tx_chipset.tc_videot = videot;
331 }
332