xref: /netbsd-src/sys/arch/hpcmips/stand/lcboot/if_cs.c (revision 95e1ffb15694e54f29f8baaa4232152b703c2a5a)
1*95e1ffb1Schristos /* $NetBSD: if_cs.c,v 1.3 2005/12/11 12:17:34 christos Exp $ */
28f53455cSigy 
38f53455cSigy /*
48f53455cSigy  * Copyright (c) 2003 Naoto Shimazaki.
58f53455cSigy  * All rights reserved.
68f53455cSigy  *
78f53455cSigy  * Redistribution and use in source and binary forms, with or without
88f53455cSigy  * modification, are permitted provided that the following conditions
98f53455cSigy  * are met:
108f53455cSigy  * 1. Redistributions of source code must retain the above copyright
118f53455cSigy  *    notice, this list of conditions and the following disclaimer.
128f53455cSigy  * 2. Redistributions in binary form must reproduce the above copyright
138f53455cSigy  *    notice, this list of conditions and the following disclaimer in the
148f53455cSigy  *    documentation and/or other materials provided with the distribution.
158f53455cSigy  *
168f53455cSigy  * THIS SOFTWARE IS PROVIDED BY NAOTO SHIMAZAKI AND CONTRIBUTORS ``AS IS''
178f53455cSigy  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
188f53455cSigy  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
198f53455cSigy  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE NAOTO OR CONTRIBUTORS BE
208f53455cSigy  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
218f53455cSigy  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
228f53455cSigy  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
238f53455cSigy  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
248f53455cSigy  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
258f53455cSigy  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
268f53455cSigy  * THE POSSIBILITY OF SUCH DAMAGE.
278f53455cSigy  */
288f53455cSigy #include <sys/cdefs.h>
29*95e1ffb1Schristos __KERNEL_RCSID(0, "$NetBSD: if_cs.c,v 1.3 2005/12/11 12:17:34 christos Exp $");
308f53455cSigy 
318f53455cSigy #include <sys/param.h>
328f53455cSigy #include <netinet/in.h>
338f53455cSigy 
348f53455cSigy #include <lib/libsa/stand.h>
358f53455cSigy #include <lib/libsa/netif.h>
368f53455cSigy 
378f53455cSigy #include <dev/ic/cs89x0reg.h>
388f53455cSigy 
398f53455cSigy #include "extern.h"
408f53455cSigy 
418f53455cSigy static int	cs_match(struct netif *, void *);
428f53455cSigy static int	cs_probe(struct netif *, void *);
438f53455cSigy static void	cs_init(struct iodesc *, void *);
448f53455cSigy static int	cs_get(struct iodesc *, void *, size_t, time_t);
458f53455cSigy static int	cs_put(struct iodesc *, void *, size_t);
468f53455cSigy static void	cs_end(struct netif *);
478f53455cSigy 
488f53455cSigy static struct netif_stats	cs_stats;
498f53455cSigy 
508f53455cSigy static struct netif_dif	cs_if = {
518f53455cSigy 	.dif_unit	= 0,
528f53455cSigy 	.dif_nsel	= 1,
538f53455cSigy 	.dif_stats	= &cs_stats,
548f53455cSigy 	.dif_private	= NULL,
558f53455cSigy 	.dif_used	= 0,
568f53455cSigy };
578f53455cSigy 
588f53455cSigy struct netif_driver	cs_driver = {
598f53455cSigy 	.netif_bname	= "cs",
608f53455cSigy 	.netif_match	= cs_match,
618f53455cSigy 	.netif_probe	= cs_probe,
628f53455cSigy 	.netif_init	= cs_init,
638f53455cSigy 	.netif_get	= cs_get,
648f53455cSigy 	.netif_put	= cs_put,
658f53455cSigy 	.netif_end	= cs_end,
668f53455cSigy 	.netif_ifs	= &cs_if,
678f53455cSigy 	.netif_nifs	= 1,
688f53455cSigy };
698f53455cSigy 
708f53455cSigy #define CS_IO_BASE	0x14010300U
718f53455cSigy 
728f53455cSigy #define CS_READ_1(off)		REGREAD_1(CS_IO_BASE, (off))
738f53455cSigy #define CS_READ_2(off)		REGREAD_2(CS_IO_BASE, (off))
748f53455cSigy #define CS_WRITE_1(off, val)	REGWRITE_1(CS_IO_BASE, (off), (val))
758f53455cSigy #define CS_WRITE_2(off, val)	REGWRITE_2(CS_IO_BASE, (off), (val))
768f53455cSigy #define CS_READ_PACKET_PAGE(off)					\
778f53455cSigy 		(REGWRITE_2(CS_IO_BASE, PORT_PKTPG_PTR, (off)),		\
788f53455cSigy 		 REGREAD_2(CS_IO_BASE, PORT_PKTPG_DATA))
798f53455cSigy #define CS_WRITE_PACKET_PAGE(off, val)					\
808f53455cSigy 		(REGWRITE_2(CS_IO_BASE, PORT_PKTPG_PTR, (off)),		\
818f53455cSigy 		 REGWRITE_2(CS_IO_BASE, PORT_PKTPG_DATA, (val)))
828f53455cSigy 
838f53455cSigy static inline void
delay(int n)848f53455cSigy delay(int n)
858f53455cSigy {
868f53455cSigy 	int	i = 33 * n;
878f53455cSigy 
888f53455cSigy 	while (--i > 0)
898f53455cSigy 		;
908f53455cSigy }
918f53455cSigy 
928f53455cSigy time_t
getsecs(void)938f53455cSigy getsecs(void)
948f53455cSigy {
958f53455cSigy 	return REGREAD_4(VRETIMEL, 0) >> 15;
968f53455cSigy }
978f53455cSigy 
988f53455cSigy static int
cs_match(struct netif * nif,void * machdep_hint)998f53455cSigy cs_match(struct netif *nif, void *machdep_hint)
1008f53455cSigy {
1018f53455cSigy 	return 1;
1028f53455cSigy }
1038f53455cSigy 
1048f53455cSigy static int
cs_probe(struct netif * nif,void * machdep_hint)1058f53455cSigy cs_probe(struct netif *nif, void *machdep_hint)
1068f53455cSigy {
1078f53455cSigy 	return 0;
1088f53455cSigy }
1098f53455cSigy 
1108f53455cSigy static void
cs_get_eeprom(int offset,u_int16_t * result)11174003aa2Sigy cs_get_eeprom(int offset, u_int16_t *result)
11274003aa2Sigy {
11374003aa2Sigy 	int	timeo;
11474003aa2Sigy 
11574003aa2Sigy 	for (timeo = MAXLOOP; timeo > 0; timeo--) {
11674003aa2Sigy 		if (!(CS_READ_PACKET_PAGE(PKTPG_SELF_ST)
11774003aa2Sigy 		      & SELF_ST_SI_BUSY))
11874003aa2Sigy 			break;
11974003aa2Sigy 	}
12074003aa2Sigy 	if (timeo == 0)
12174003aa2Sigy 		goto eeprom_error;
12274003aa2Sigy 
12374003aa2Sigy 	CS_WRITE_PACKET_PAGE(PKTPG_EEPROM_CMD, offset | EEPROM_CMD_READ);
12474003aa2Sigy 
12574003aa2Sigy 	for (timeo = MAXLOOP; timeo > 0; timeo--) {
12674003aa2Sigy 		if (!(CS_READ_PACKET_PAGE(PKTPG_SELF_ST)
12774003aa2Sigy 		      & SELF_ST_SI_BUSY))
12874003aa2Sigy 			break;
12974003aa2Sigy 	}
13074003aa2Sigy 	if (timeo == 0)
13174003aa2Sigy 		goto eeprom_error;
13274003aa2Sigy 
13374003aa2Sigy 	*result = CS_READ_PACKET_PAGE(PKTPG_EEPROM_DATA);
13474003aa2Sigy 
13574003aa2Sigy 	return;
13674003aa2Sigy 
13774003aa2Sigy eeprom_error:
13874003aa2Sigy 	panic("cannot read mac addr");
13974003aa2Sigy }
14074003aa2Sigy 
14174003aa2Sigy static void
cs_init(struct iodesc * desc,void * machdep_hint)1428f53455cSigy cs_init(struct iodesc *desc, void *machdep_hint)
1438f53455cSigy {
1448f53455cSigy 	int		i;
14574003aa2Sigy 	u_int16_t	*myea;
1468f53455cSigy 
1478f53455cSigy 	/* Issue a software reset command to the chip */
1488f53455cSigy 	CS_WRITE_PACKET_PAGE(PKTPG_SELF_CTL, SELF_CTL_RESET);
1498f53455cSigy 
1508f53455cSigy 	/* We cannot touch the chip until calibration is done */
1518f53455cSigy 	delay(10000);
1528f53455cSigy 
1538f53455cSigy 	/*
1548f53455cSigy 	 * Transition -SBHE H->L L->H is needed between reset and
1558f53455cSigy 	 * the first access to the chip's register.
1568f53455cSigy 	 */
1578f53455cSigy 	CS_READ_1(PORT_PKTPG_PTR + 0);
1588f53455cSigy 	CS_READ_1(PORT_PKTPG_PTR + 1);
1598f53455cSigy 	CS_READ_1(PORT_PKTPG_PTR + 0);
1608f53455cSigy 	CS_READ_1(PORT_PKTPG_PTR + 1);
1618f53455cSigy 
1628f53455cSigy 	/* wait for INIT_DONE */
1638f53455cSigy 	for (i = 10000; i > 0; i--) {
1648f53455cSigy 		u_int16_t	s;
1658f53455cSigy 
1668f53455cSigy 		s = CS_READ_PACKET_PAGE(PKTPG_SELF_ST);
1678f53455cSigy 		if ((s & SELF_ST_INIT_DONE) && !(s & SELF_ST_SI_BUSY))
1688f53455cSigy 			break;
1698f53455cSigy 	}
1708f53455cSigy 	if (i == 0)
1718f53455cSigy 		panic("cannot reset netif");
1728f53455cSigy 
17374003aa2Sigy 	myea = (u_int16_t *) desc->myea;
1748f53455cSigy 
17574003aa2Sigy 	cs_get_eeprom(EEPROM_IND_ADDR_H, &myea[0]);
17674003aa2Sigy 	cs_get_eeprom(EEPROM_IND_ADDR_M, &myea[1]);
17774003aa2Sigy 	cs_get_eeprom(EEPROM_IND_ADDR_L, &myea[2]);
1788f53455cSigy 
17974003aa2Sigy 	for (i = 0; i < 3; i++)
18074003aa2Sigy 		CS_WRITE_PACKET_PAGE(PKTPG_IND_ADDR + (i << 1), myea[i]);
1818f53455cSigy 
1828f53455cSigy 	/*
1838f53455cSigy 	 * Accepting frames:
1848f53455cSigy 	 *	RX_CTL_RX_OK_A:	correct crc, and valid length
1858f53455cSigy 	 *	RX_CTL_IND_A:	dest addr maches individual address
1868f53455cSigy 	 *	RX_CTL_BCAST_A:	dest addr maches broadcast address
1878f53455cSigy 	 */
1888f53455cSigy 	CS_WRITE_PACKET_PAGE(PKTPG_RX_CTL,
1898f53455cSigy 			     RX_CTL_RX_OK_A | RX_CTL_IND_A | RX_CTL_BCAST_A);
1908f53455cSigy 	CS_WRITE_PACKET_PAGE(PKTPG_LINE_CTL, LINE_CTL_RX_ON | LINE_CTL_TX_ON);
1918f53455cSigy }
1928f53455cSigy 
1938f53455cSigy static int
cs_get(struct iodesc * desc,void * pkt,size_t len,time_t timeout)1948f53455cSigy cs_get(struct iodesc *desc, void *pkt, size_t len, time_t timeout)
1958f53455cSigy {
1968f53455cSigy 	time_t		t;
1978f53455cSigy 	int		rlen;
1988f53455cSigy 	int		i;
1998f53455cSigy 	u_int16_t	*p;
2008f53455cSigy 
2018f53455cSigy 	t = getsecs();
2028f53455cSigy 	rlen = 0;
2038f53455cSigy 	while (getsecs() - t < timeout && rlen == 0) {
2048f53455cSigy 		if (!(CS_READ_PACKET_PAGE(PKTPG_RX_EVENT) & RX_EVENT_RX_OK))
2058f53455cSigy 			continue;
2068f53455cSigy 
2078f53455cSigy 		/* drop status */
2088f53455cSigy 		CS_READ_2(PORT_RXTX_DATA);
2098f53455cSigy 
2108f53455cSigy 		/* get frame length */
2118f53455cSigy 		rlen = CS_READ_2(PORT_RXTX_DATA);
2128f53455cSigy 
2138f53455cSigy 		if (rlen > len) {
2148f53455cSigy 			CS_WRITE_PACKET_PAGE(PKTPG_RX_CFG, RX_CFG_SKIP);
2158f53455cSigy 			rlen = 0;
2168f53455cSigy 			continue;
2178f53455cSigy 		}
2188f53455cSigy 
2198f53455cSigy 		p = pkt;
2208f53455cSigy 		for (i = rlen >> 1; i > 0; i--)
2218f53455cSigy 			*p++ = CS_READ_2(PORT_RXTX_DATA);
2228f53455cSigy 		if (rlen & 1)
2238f53455cSigy 			*((u_int8_t *) p + 1) = CS_READ_1(PORT_RXTX_DATA);
2248f53455cSigy 
2258f53455cSigy 		/* exit while loop */
2268f53455cSigy 	}
2278f53455cSigy 
2288f53455cSigy 	return rlen;
2298f53455cSigy }
2308f53455cSigy 
2318f53455cSigy static int
cs_put(struct iodesc * desc,void * pkt,size_t len)2328f53455cSigy cs_put(struct iodesc *desc, void *pkt, size_t len)
2338f53455cSigy {
2348f53455cSigy 	int		timeo;
2358f53455cSigy 	int		i;
2368f53455cSigy 	u_int16_t	*p;
2378f53455cSigy 
2388f53455cSigy 	CS_WRITE_2(PORT_TX_CMD, TX_CMD_START_ALL);
2398f53455cSigy 	CS_WRITE_2(PORT_TX_LENGTH, len);
2408f53455cSigy 
2418f53455cSigy 	for (timeo = 1000000; timeo > 0; timeo--) {
2428f53455cSigy 		if (CS_READ_PACKET_PAGE(PKTPG_BUS_ST) & BUS_ST_RDY4TXNOW)
2438f53455cSigy 			break;
2448f53455cSigy 	}
2458f53455cSigy 	if (timeo == 0)
2468f53455cSigy 		panic("cs: cannot send frame");
2478f53455cSigy 
2488f53455cSigy 	p = pkt;
2498f53455cSigy 	i = (len + 1) >> 1;
2508f53455cSigy 	while (i > 0) {
2518f53455cSigy 		CS_WRITE_2(PORT_RXTX_DATA, *p++);
2528f53455cSigy 		i--;
2538f53455cSigy 	}
2548f53455cSigy 
2558f53455cSigy 	return len;
2568f53455cSigy }
2578f53455cSigy 
2588f53455cSigy static void
cs_end(struct netif * nif)2598f53455cSigy cs_end(struct netif *nif)
2608f53455cSigy {
2618f53455cSigy 	CS_WRITE_PACKET_PAGE(PKTPG_LINE_CTL, 0);
2628f53455cSigy }
263