xref: /netbsd-src/sys/arch/hpcmips/stand/lcboot/com.c (revision d710132b4b8ce7f7cccaaf660cb16aa16b4077a0)
1 /*	$NetBSD: com.c,v 1.1 2003/05/01 07:02:01 igy Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Charles M. Hannum.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * Copyright (c) 1991 The Regents of the University of California.
41  * All rights reserved.
42  *
43  * Redistribution and use in source and binary forms, with or without
44  * modification, are permitted provided that the following conditions
45  * are met:
46  * 1. Redistributions of source code must retain the above copyright
47  *    notice, this list of conditions and the following disclaimer.
48  * 2. Redistributions in binary form must reproduce the above copyright
49  *    notice, this list of conditions and the following disclaimer in the
50  *    documentation and/or other materials provided with the distribution.
51  * 3. All advertising materials mentioning features or use of this software
52  *    must display the following acknowledgement:
53  *	This product includes software developed by the University of
54  *	California, Berkeley and its contributors.
55  * 4. Neither the name of the University nor the names of its contributors
56  *    may be used to endorse or promote products derived from this software
57  *    without specific prior written permission.
58  *
59  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
60  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
61  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
62  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
63  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
64  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
65  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69  * SUCH DAMAGE.
70  *
71  *	@(#)com.c	7.5 (Berkeley) 5/16/91
72  */
73 
74 #include <sys/param.h>
75 
76 #include <lib/libsa/stand.h>
77 
78 #include <hpcmips/vr/vripreg.h>
79 #include <hpcmips/vr/cmureg.h>
80 
81 #include <dev/ic/comreg.h>
82 #include <dev/ic/ns16550reg.h>
83 #include <dev/ic/st16650reg.h>
84 #define com_lcr com_cfcr
85 
86 #include "extern.h"
87 
88 #if 0
89 #define	VRCOM_FREQ	18432000	/* 18.432kHz */
90 #endif
91 
92 int
93 iskey(void)
94 {
95 	return ISSET(REGREAD_1(VR4181_SIU_ADDR, com_lsr), LSR_RXRDY);
96 }
97 
98 int
99 getchar(void)
100 {
101 	u_int8_t	stat;
102 	u_int8_t	c;
103 
104 	/* block until a character becomes available */
105 	while (!ISKEY)
106 		;
107 
108 	c = REGREAD_1(VR4181_SIU_ADDR, com_data);
109 	stat = REGREAD_1(VR4181_SIU_ADDR, com_iir);
110 
111 	return c;
112 }
113 
114 static void
115 comcnputc(int c)
116 {
117 	int	timo;
118 
119 	/* wait for any pending transmission to finish */
120 	timo = 150000;
121 	while (!ISSET(REGREAD_1(VR4181_SIU_ADDR, com_lsr), LSR_TXRDY)
122 	       && --timo)
123 		continue;
124 
125 	REGWRITE_1(VR4181_SIU_ADDR, com_data, c);
126 
127 	/* wait for this transmission to complete */
128 	timo = 1500000;
129 	while (!ISSET(REGREAD_1(VR4181_SIU_ADDR, com_lsr), LSR_TXRDY)
130 	       && --timo)
131 		continue;
132 }
133 
134 void
135 putchar(int c)
136 {
137 	if (c == '\n')
138 		comcnputc('\r');
139 	comcnputc(c);
140 }
141 
142 /*
143  * Initialize UART for use as console or KGDB line.
144  */
145 void
146 comcninit(void)
147 {
148 	int		rate;
149 
150 	/* enable divisor latch access and set bit rate */
151 	REGWRITE_1(VR4181_SIU_ADDR, com_lcr, LCR_DLAB);
152 	rate = 10; /* 115200bps with VRCOM_FREQ */
153 	REGWRITE_1(VR4181_SIU_ADDR, com_dlbl, rate);
154 	REGWRITE_1(VR4181_SIU_ADDR, com_dlbh, rate >> 8);
155 
156 	/*
157 	 * disable divisor latch access and,
158 	 * set "8bit non-parity 1 stop bit"
159 	 */
160 	REGWRITE_1(VR4181_SIU_ADDR, com_lcr, LCR_8BITS);
161 
162 	/* disable all interrupt */
163 	REGWRITE_1(VR4181_SIU_ADDR, com_ier, 0);
164 
165 	/* enable FIFO */
166 	REGWRITE_1(VR4181_SIU_ADDR, com_fifo,
167 		   FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
168 
169 	/* set DTR and RTS low */
170 	REGWRITE_1(VR4181_SIU_ADDR, com_mcr, MCR_DTR | MCR_RTS);
171 }
172