xref: /netbsd-src/sys/arch/hpcmips/hpcmips/bus_space.c (revision 6a493d6bc668897c91594964a732d38505b70cbb)
1 /*	$NetBSD: bus_space.c,v 1.31 2012/01/27 18:52:56 para Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: bus_space.c,v 1.31 2012/01/27 18:52:56 para Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/malloc.h>
39 #include <sys/extent.h>
40 
41 #include <uvm/uvm_extern.h>
42 
43 #include <mips/cache.h>
44 #include <mips/locore.h>
45 #include <mips/pte.h>
46 #include <machine/bus.h>
47 #include <machine/bus_space_hpcmips.h>
48 
49 #ifdef BUS_SPACE_DEBUG
50 #define	DPRINTF(arg) printf arg
51 #else
52 #define	DPRINTF(arg)
53 #endif
54 
55 #define MAX_BUSSPACE_TAG 10
56 
57 /* proto types */
58 bus_space_handle_t __hpcmips_cacheable(struct bus_space_tag_hpcmips*,
59     bus_addr_t, bus_size_t, int);
60 bus_space_protos(_);
61 bus_space_protos(bs_notimpl);
62 
63 /* variables */
64 static  struct bus_space_tag_hpcmips __bus_space[MAX_BUSSPACE_TAG];
65 static int __bus_space_index;
66 static struct bus_space_tag_hpcmips __sys_bus_space = {
67 	{
68 		NULL,
69 		{
70 			/* mapping/unmapping */
71 			__bs_map,
72 			__bs_unmap,
73 			__bs_subregion,
74 
75 			/* allocation/deallocation */
76 			__bs_alloc,
77 			__bs_free,
78 
79 			/* get kernel virtual address */
80 			bs_notimpl_bs_vaddr, /* there is no linear mapping */
81 
82 			/* Mmap bus space for user */
83 			bs_notimpl_bs_mmap,
84 
85 			/* barrier */
86 			__bs_barrier,
87 
88 			/* probe */
89 			__bs_peek,
90 			__bs_poke,
91 
92 			/* read (single) */
93 			__bs_r_1,
94 			__bs_r_2,
95 			__bs_r_4,
96 			bs_notimpl_bs_r_8,
97 
98 			/* read multiple */
99 			__bs_rm_1,
100 			__bs_rm_2,
101 			__bs_rm_4,
102 			bs_notimpl_bs_rm_8,
103 
104 			/* read region */
105 			__bs_rr_1,
106 			__bs_rr_2,
107 			__bs_rr_4,
108 			bs_notimpl_bs_rr_8,
109 
110 			/* write (single) */
111 			__bs_w_1,
112 			__bs_w_2,
113 			__bs_w_4,
114 			bs_notimpl_bs_w_8,
115 
116 			/* write multiple */
117 			__bs_wm_1,
118 			__bs_wm_2,
119 			__bs_wm_4,
120 			bs_notimpl_bs_wm_8,
121 
122 			/* write region */
123 			__bs_wr_1,
124 			__bs_wr_2,
125 			__bs_wr_4,
126 			bs_notimpl_bs_wr_8,
127 
128 			/* set multi */
129 			__bs_sm_1,
130 			__bs_sm_2,
131 			__bs_sm_4,
132 			bs_notimpl_bs_sm_8,
133 
134 			/* set region */
135 			__bs_sr_1,
136 			__bs_sr_2,
137 			__bs_sr_4,
138 			bs_notimpl_bs_sr_8,
139 
140 			/* copy */
141 			__bs_c_1,
142 			__bs_c_2,
143 			__bs_c_4,
144 			bs_notimpl_bs_c_8,
145 		},
146 	},
147 
148 	"whole bus space",	/* bus name */
149 	0,			/* extent base */
150 	0xffffffff,		/* extent size */
151 	NULL,			/* pointer for extent structure */
152 };
153 static bus_space_tag_t __sys_bus_space_tag = &__sys_bus_space.bst;
154 
155 bus_space_tag_t
156 hpcmips_system_bus_space(void)
157 {
158 
159 	return (__sys_bus_space_tag);
160 }
161 
162 struct bus_space_tag_hpcmips *
163 hpcmips_system_bus_space_hpcmips(void)
164 {
165 
166 	return (&__sys_bus_space);
167 }
168 
169 struct bus_space_tag_hpcmips *
170 hpcmips_alloc_bus_space_tag(void)
171 {
172 
173 	if (__bus_space_index >= MAX_BUSSPACE_TAG) {
174 		panic("hpcmips_internal_alloc_bus_space_tag: tag full.");
175 	}
176 
177 	return (&__bus_space[__bus_space_index++]);
178 }
179 
180 void
181 hpcmips_init_bus_space(struct bus_space_tag_hpcmips *t,
182     struct bus_space_tag_hpcmips *basetag,
183     const char *name, u_int32_t base, u_int32_t size)
184 {
185 	u_int32_t pa, endpa;
186 	vaddr_t va;
187 
188 	if (basetag != NULL)
189 		memcpy(t, basetag, sizeof(struct bus_space_tag_hpcmips));
190 	strncpy(t->name, name, sizeof(t->name));
191 	t->name[sizeof(t->name) - 1] = '\0';
192 	t->base = base;
193 	t->size = size;
194 
195 	/*
196 	 * If request physical address is greater than 512MByte,
197 	 * mapping it to kseg2.
198 	 */
199 	if (t->base >= 0x20000000) {
200 		pa = mips_trunc_page(t->base);
201 		endpa = mips_round_page(t->base + t->size);
202 
203 		if (!(va = uvm_km_alloc(kernel_map, endpa - pa, 0,
204 		    UVM_KMF_VAONLY))) {
205 			panic("hpcmips_init_bus_space_extent:"
206 			    "can't allocate kernel virtual");
207 		}
208 		DPRINTF(("pa:0x%08x -> kv:0x%08x+0x%08x",
209 		    (unsigned int)t->base, (unsigned int)va, t->size));
210 		t->base = va; /* kseg2 addr */
211 
212 		for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
213 			pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, 0);
214 		}
215 		pmap_update(pmap_kernel());
216 	}
217 
218 	t->extent = (void*)extent_create(t->name, t->base,
219 	    t->base + t->size,
220 	    0, 0, EX_NOWAIT);
221 	if (!t->extent) {
222 		panic("hpcmips_init_bus_space_extent:"
223 		    "unable to allocate %s map", t->name);
224 	}
225 }
226 
227 bus_space_handle_t
228 __hpcmips_cacheable(struct bus_space_tag_hpcmips *t, bus_addr_t bpa,
229     bus_size_t size, int cacheable)
230 {
231 	vaddr_t va, endva;
232 	pt_entry_t *pte;
233 	u_int32_t opte, npte;
234 
235 	if (t->base >= MIPS_KSEG2_START) {
236 		va = mips_trunc_page(bpa);
237 		endva = mips_round_page(bpa + size);
238 		npte = CPUISMIPS3 ? MIPS3_PG_UNCACHED : MIPS1_PG_N;
239 
240 		mips_dcache_wbinv_range(va, endva - va);
241 
242 		for (; va < endva; va += PAGE_SIZE) {
243 			pte = kvtopte(va);
244 			opte = pte->pt_entry;
245 			if (cacheable) {
246 				opte &= ~npte;
247 			} else {
248 				opte |= npte;
249 			}
250 			pte->pt_entry = opte;
251 			/*
252 			 * Update the same virtual address entry.
253 			 */
254 			tlb_update(va, opte);
255 		}
256 		return (bpa);
257 	}
258 
259 	return (cacheable ? MIPS_PHYS_TO_KSEG0(bpa) : MIPS_PHYS_TO_KSEG1(bpa));
260 }
261 
262 /* ARGSUSED */
263 int
264 __bs_map(bus_space_tag_t tx, bus_addr_t bpa, bus_size_t size, int flags,
265     bus_space_handle_t *bshp)
266 {
267 	struct bus_space_tag_hpcmips *t = (struct bus_space_tag_hpcmips *)tx;
268 	int err;
269 	int cacheable = flags & BUS_SPACE_MAP_CACHEABLE;
270 
271 	DPRINTF(("\tbus_space_map:%#lx(%#lx)+%#lx\n",
272 	    bpa, bpa + t->base, size));
273 
274 	if (!t->extent) { /* Before autoconfiguration, can't use extent */
275 		DPRINTF(("bus_space_map: map temporary region:"
276 		    "0x%08lx-0x%08lx\n", bpa, bpa+size));
277 		bpa += t->base;
278 	} else {
279 		bpa += t->base;
280 		if ((err = extent_alloc_region(t->extent, bpa, size,
281 		    EX_NOWAIT|EX_MALLOCOK))) {
282 			DPRINTF(("\tbus_space_map: "
283 			    "extent_alloc_regiion() failed\n"));
284 			return (err);
285 		}
286 	}
287 	*bshp = __hpcmips_cacheable(t, bpa, size, cacheable);
288 
289 	return (0);
290 }
291 
292 /* ARGSUSED */
293 void
294 __bs_unmap(bus_space_tag_t tx, bus_space_handle_t bsh, bus_size_t size)
295 {
296 	struct bus_space_tag_hpcmips *t = (struct bus_space_tag_hpcmips *)tx;
297 	int err;
298 	u_int32_t addr;
299 
300 	if (!t->extent) {
301 		return; /* Before autoconfiguration, can't use extent */
302 	}
303 
304 	if (t->base < MIPS_KSEG2_START) {
305 		addr = MIPS_KSEG1_TO_PHYS(bsh);
306 	} else {
307 		addr = bsh;
308 	}
309 
310 	if ((err = extent_free(t->extent, addr, size, EX_NOWAIT))) {
311 		DPRINTF(("warning: %#lx-%#lx of %s space lost\n",
312 		    bsh, bsh+size, t->name));
313 	}
314 }
315 
316 /* ARGSUSED */
317 int
318 __bs_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
319     bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
320 {
321 
322 	*nbshp = bsh + offset;
323 
324 	return (0);
325 }
326 
327 /* ARGSUSED */
328 int
329 __bs_alloc(bus_space_tag_t tx, bus_addr_t rstart, bus_addr_t rend,
330     bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
331     bus_addr_t *bpap, bus_space_handle_t *bshp)
332 {
333 	struct bus_space_tag_hpcmips *t = (struct bus_space_tag_hpcmips *)tx;
334 	int cacheable = flags & BUS_SPACE_MAP_CACHEABLE;
335 	u_long bpa;
336 	int err;
337 
338 	if (!t->extent)
339 		panic("bus_space_alloc: no extent");
340 
341 	DPRINTF(("\tbus_space_alloc:%#lx(%#lx)+%#lx\n", bpa,
342 	    bpa - t->base, size));
343 
344 	rstart += t->base;
345 	rend += t->base;
346 	if ((err = extent_alloc_subregion(t->extent, rstart, rend, size,
347 	    alignment, boundary, EX_FAST|EX_NOWAIT|EX_MALLOCOK, &bpa))) {
348 		return (err);
349 	}
350 
351 	*bshp = __hpcmips_cacheable(t, bpa, size, cacheable);
352 
353 	if (bpap) {
354 		*bpap = bpa;
355 	}
356 
357 	return (0);
358 }
359 
360 /* ARGSUSED */
361 void
362 __bs_free(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
363 {
364 	/* bus_space_unmap() does all that we need to do. */
365 	bus_space_unmap(t, bsh, size);
366 }
367 
368 void
369 __bs_barrier(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
370     bus_size_t len, int flags)
371 {
372 	wbflush();
373 }
374 
375 int
376 __bs_peek(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
377     size_t size, void *ptr)
378 {
379 	u_int32_t tmp;
380 
381 	if (badaddr((void *)(bsh + offset), size))
382 		return (-1);
383 
384 	if (ptr == NULL)
385 		ptr = &tmp;
386 
387 	switch(size) {
388 	case 1:
389 		*((u_int8_t *)ptr) = bus_space_read_1(t, bsh, offset);
390 		break;
391 	case 2:
392 		*((u_int16_t *)ptr) = bus_space_read_2(t, bsh, offset);
393 		break;
394 	case 4:
395 		*((u_int32_t *)ptr) = bus_space_read_4(t, bsh, offset);
396 		break;
397 	default:
398 		panic("bus_space_peek: bad size, %d", size);
399 	}
400 
401 	return (0);
402 }
403 
404 int
405 __bs_poke(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
406     size_t size, u_int32_t val)
407 {
408 
409 	if (badaddr((void *)(bsh + offset), size))
410 		return (-1);
411 
412 	switch(size) {
413 	case 1:
414 		bus_space_write_1(t, bsh, offset, val);
415 		break;
416 	case 2:
417 		bus_space_write_2(t, bsh, offset, val);
418 		break;
419 	case 4:
420 		bus_space_write_4(t, bsh, offset, val);
421 		break;
422 	default:
423 		panic("bus_space_poke: bad size, %d", size);
424 	}
425 
426 	return (0);
427 }
428 
429 u_int8_t
430 __bs_r_1(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset)
431 {
432 	wbflush();
433 	return (*(volatile u_int8_t *)(bsh + offset));
434 }
435 
436 u_int16_t
437 __bs_r_2(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset)
438 {
439 	wbflush();
440 	return (*(volatile u_int16_t *)(bsh + offset));
441 }
442 
443 u_int32_t
444 __bs_r_4(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset)
445 {
446 	wbflush();
447 	return (*(volatile u_int32_t *)(bsh + offset));
448 }
449 
450 void
451 __bs_rm_1(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
452     u_int8_t *addr, bus_size_t count) {
453 	while (count--)
454 		*addr++ = bus_space_read_1(t, bsh, offset);
455 }
456 
457 void
458 __bs_rm_2(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
459     u_int16_t *addr, bus_size_t count)
460 {
461 	while (count--)
462 		*addr++ = bus_space_read_2(t, bsh, offset);
463 }
464 
465 void
466 __bs_rm_4(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
467     u_int32_t *addr, bus_size_t count)
468 {
469 	while (count--)
470 		*addr++ = bus_space_read_4(t, bsh, offset);
471 }
472 
473 void
474 __bs_rr_1(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
475     u_int8_t *addr, bus_size_t count)
476 {
477 	while (count--) {
478 		*addr++ = bus_space_read_1(t, bsh, offset);
479 		offset += sizeof(*addr);
480 	}
481 }
482 
483 void
484 __bs_rr_2(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
485     u_int16_t *addr, bus_size_t count)
486 {
487 	while (count--) {
488 		*addr++ = bus_space_read_2(t, bsh, offset);
489 		offset += sizeof(*addr);
490 	}
491 }
492 
493 void
494 __bs_rr_4(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
495     u_int32_t *addr, bus_size_t count)
496 {
497 	while (count--) {
498 		*addr++ = bus_space_read_4(t, bsh, offset);
499 		offset += sizeof(*addr);
500 	}
501 }
502 
503 void
504 __bs_w_1(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
505     u_int8_t value)
506 {
507 	*(volatile u_int8_t *)(bsh + offset) = value;
508 	wbflush();
509 }
510 
511 void
512 __bs_w_2(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
513     u_int16_t value)
514 {
515 	*(volatile u_int16_t *)(bsh + offset) = value;
516 	wbflush();
517 }
518 
519 void
520 __bs_w_4(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
521     u_int32_t value)
522 {
523 	*(volatile u_int32_t *)(bsh + offset) = value;
524 	wbflush();
525 }
526 
527 void
528 __bs_wm_1(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
529     const u_int8_t *addr, bus_size_t count)
530 {
531 	while (count--)
532 		bus_space_write_1(t, bsh, offset, *addr++);
533 }
534 
535 void
536 __bs_wm_2(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
537     const u_int16_t *addr, bus_size_t count)
538 {
539 	while (count--)
540 		bus_space_write_2(t, bsh, offset, *addr++);
541 }
542 
543 void
544 __bs_wm_4(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
545     const u_int32_t *addr, bus_size_t count)
546 {
547 	while (count--)
548 		bus_space_write_4(t, bsh, offset, *addr++);
549 }
550 
551 void
552 __bs_wr_1(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
553     const u_int8_t *addr, bus_size_t count)
554 {
555 	while (count--) {
556 		bus_space_write_1(t, bsh, offset, *addr++);
557 		offset += sizeof(*addr);
558 	}
559 }
560 
561 void
562 __bs_wr_2(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
563     const u_int16_t *addr, bus_size_t count)
564 {
565 	while (count--) {
566 		bus_space_write_2(t, bsh, offset, *addr++);
567 		offset += sizeof(*addr);
568 	}
569 }
570 
571 void
572 __bs_wr_4(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
573     const u_int32_t *addr, bus_size_t count)
574 {
575 	while (count--) {
576 		bus_space_write_4(t, bsh, offset, *addr++);
577 		offset += sizeof(*addr);
578 	}
579 }
580 
581 void
582 __bs_sm_1(bus_space_tag_t t, bus_space_handle_t bsh,
583     bus_size_t offset, u_int8_t value, bus_size_t count)
584 {
585 	while (count--)
586 		bus_space_write_1(t, bsh, offset, value);
587 }
588 
589 void
590 __bs_sm_2(bus_space_tag_t t, bus_space_handle_t bsh,
591     bus_size_t offset, u_int16_t value, bus_size_t count)
592 {
593 	while (count--)
594 		bus_space_write_2(t, bsh, offset, value);
595 }
596 
597 void
598 __bs_sm_4(bus_space_tag_t t, bus_space_handle_t bsh,
599     bus_size_t offset, u_int32_t value, bus_size_t count)
600 {
601 	while (count--)
602 		bus_space_write_4(t, bsh, offset, value);
603 }
604 
605 
606 void
607 __bs_sr_1(bus_space_tag_t t, bus_space_handle_t bsh,
608     bus_size_t offset, u_int8_t value, bus_size_t count)
609 {
610 	while (count--) {
611 		bus_space_write_1(t, bsh, offset, value);
612 		offset += (value);
613 	}
614 }
615 
616 void
617 __bs_sr_2(bus_space_tag_t t, bus_space_handle_t bsh,
618     bus_size_t offset, u_int16_t value, bus_size_t count)
619 {
620 	while (count--) {
621 		bus_space_write_2(t, bsh, offset, value);
622 		offset += (value);
623 	}
624 }
625 
626 void
627 __bs_sr_4(bus_space_tag_t t, bus_space_handle_t bsh,
628     bus_size_t offset, u_int32_t value, bus_size_t count)
629 {
630 	while (count--) {
631 		bus_space_write_4(t, bsh, offset, value);
632 		offset += (value);
633 	}
634 }
635 
636 #define __bs_c_n(n)							\
637 void __CONCAT(__bs_c_,n)(bus_space_tag_t t, bus_space_handle_t h1,	\
638     bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)	\
639 {									\
640 	bus_size_t o;							\
641 									\
642 	if ((h1 + o1) >= (h2 + o2)) {					\
643 		/* src after dest: copy forward */			\
644 		for (o = 0; c != 0; c--, o += n)			\
645 			__CONCAT(bus_space_write_,n)(t, h2, o2 + o,	\
646 			    __CONCAT(bus_space_read_,n)(t, h1, o1 + o));\
647 	} else {							\
648 		/* dest after src: copy backwards */			\
649 		for (o = (c - 1) * n; c != 0; c--, o -= n)		\
650 			__CONCAT(bus_space_write_,n)(t, h2, o2 + o,	\
651 			    __CONCAT(bus_space_read_,n)(t, h1, o1 + o));\
652 	}								\
653 }
654 
655 __bs_c_n(1)
656 __bs_c_n(2)
657 __bs_c_n(4)
658