xref: /netbsd-src/sys/arch/hpcmips/dev/plumpower.c (revision 274254cdae52594c1aa480a736aef78313d15c9c)
1 /*	$NetBSD: plumpower.c,v 1.12 2008/04/28 20:23:21 martin Exp $ */
2 
3 /*-
4  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: plumpower.c,v 1.12 2008/04/28 20:23:21 martin Exp $");
34 
35 #undef PLUMPOWERDEBUG
36 
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/device.h>
40 #include <sys/malloc.h>
41 
42 #include <machine/bus.h>
43 #include <machine/intr.h>
44 
45 #include <hpcmips/tx/tx39var.h>
46 #include <hpcmips/dev/plumvar.h>
47 #include <hpcmips/dev/plumpowervar.h>
48 #include <hpcmips/dev/plumpowerreg.h>
49 
50 #ifdef PLUMPOWERDEBUG
51 int	plumpower_debug = 1;
52 #define	DPRINTF(arg) if (plumpower_debug) printf arg;
53 #define	DPRINTFN(n, arg) if (plumpower_debug > (n)) printf arg;
54 #else
55 #define	DPRINTF(arg)
56 #define DPRINTFN(n, arg)
57 #endif
58 
59 int	plumpower_match(struct device *, struct cfdata *, void *);
60 void	plumpower_attach(struct device *, struct device *, void *);
61 
62 struct plumpower_softc {
63 	struct	device		sc_dev;
64 	plum_chipset_tag_t	sc_pc;
65 	bus_space_tag_t		sc_regt;
66 	bus_space_handle_t	sc_regh;
67 };
68 
69 CFATTACH_DECL(plumpower, sizeof(struct plumpower_softc),
70     plumpower_match, plumpower_attach, NULL, NULL);
71 
72 #ifdef PLUMPOWERDEBUG
73 static void	plumpower_dump(struct plumpower_softc *);
74 #endif
75 
76 int
77 plumpower_match(struct device *parent, struct cfdata *cf, void *aux)
78 {
79 	return 2; /* 1st attach group */
80 }
81 
82 void
83 plumpower_attach(struct device *parent, struct device *self, void *aux)
84 {
85 	struct plum_attach_args *pa = aux;
86 	struct plumpower_softc *sc = (void*)self;
87 
88 	printf("\n");
89 	sc->sc_pc	= pa->pa_pc;
90 	sc->sc_regt	= pa->pa_regt;
91 
92 	if (bus_space_map(sc->sc_regt, PLUM_POWER_REGBASE,
93 	    PLUM_POWER_REGSIZE, 0, &sc->sc_regh)) {
94 		printf(": register map failed\n");
95 		return;
96 	}
97 	plum_conf_register_power(sc->sc_pc, (void*)sc);
98 #ifdef PLUMPOWERDEBUG
99 	plumpower_dump(sc);
100 #endif
101 	/* disable all power/clock */
102 	plum_conf_write(sc->sc_regt, sc->sc_regh,
103 	    PLUM_POWER_PWRCONT_REG, 0);
104 	plum_conf_write(sc->sc_regt, sc->sc_regh,
105 	    PLUM_POWER_CLKCONT_REG, 0);
106 
107 	/* enable MCS interface from TX3922 */
108 	plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_INPENA_REG,
109 	    PLUM_POWER_INPENA);
110 }
111 
112 void
113 plum_power_ioreset(plum_chipset_tag_t pc)
114 {
115 	struct plumpower_softc *sc = pc->pc_powert;
116 	bus_space_tag_t regt = sc->sc_regt;
117 	bus_space_handle_t regh = sc->sc_regh;
118 
119 	plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG,
120 	    PLUM_POWER_RESETC_IO5CL1 |
121 	    PLUM_POWER_RESETC_IO5CL1);
122 	plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 0);
123 }
124 
125 void*
126 plum_power_establish(plum_chipset_tag_t pc, int src)
127 {
128 	struct plumpower_softc *sc = pc->pc_powert;
129 	bus_space_tag_t regt = sc->sc_regt;
130 	bus_space_handle_t regh = sc->sc_regh;
131 	plumreg_t pwrreg, clkreg;
132 
133 	pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
134 	clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
135 
136 	switch(src) {
137 	default:
138 		panic("plum_power_establish: unknown power source");
139 	case PLUM_PWR_LCD:
140 		pwrreg |= PLUM_POWER_PWRCONT_LCDPWR;
141 		plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
142 		pwrreg |= PLUM_POWER_PWRCONT_LCDDSP;
143 		plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
144 		pwrreg |= PLUM_POWER_PWRCONT_LCDOE;
145 		break;
146 	case PLUM_PWR_BKL:
147 		pwrreg |= PLUM_POWER_PWRCONT_BKLIGHT;
148 		break;
149 	case PLUM_PWR_IO5:
150 		/* reset I/O bus (High/Low) */
151 		plum_power_ioreset(pc);
152 
153 		/* supply power */
154 		pwrreg |= PLUM_POWER_PWRCONT_IO5PWR;
155 		plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
156 
157 		/* output enable & supply clock */
158 		pwrreg |= PLUM_POWER_PWRCONT_IO5OE;
159 		clkreg |= PLUM_POWER_CLKCONT_IO5CLK;
160 		break;
161 	case PLUM_PWR_EXTPW0:
162 		pwrreg |= PLUM_POWER_PWRCONT_EXTPW0;
163 		break;
164 	case PLUM_PWR_EXTPW1:
165 		pwrreg |= PLUM_POWER_PWRCONT_EXTPW1;
166 		break;
167 	case PLUM_PWR_EXTPW2:
168 		pwrreg |= PLUM_POWER_PWRCONT_EXTPW2;
169 		break;
170 	case PLUM_PWR_USB:
171 		/* output enable */
172 		pwrreg |= PLUM_POWER_PWRCONT_USBEN;
173 		/* supply clock to the USB host controller */
174 		clkreg |= PLUM_POWER_CLKCONT_USBCLK1;
175 		/*
176 		 * clock supply is adaptively controlled by hardware
177 		 * (recommended)
178 		 */
179 		clkreg &= ~PLUM_POWER_CLKCONT_USBCLK2;
180 		break;
181 	case PLUM_PWR_SM:
182 		clkreg |= PLUM_POWER_CLKCONT_SMCLK;
183 		break;
184 	case PLUM_PWR_PCC1:
185 		clkreg |= PLUM_POWER_CLKCONT_PCCCLK1;
186 		break;
187 	case PLUM_PWR_PCC2:
188 		clkreg |= PLUM_POWER_CLKCONT_PCCCLK2;
189 		break;
190 	}
191 
192 	plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
193 	plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg);
194 #ifdef PLUMPOWERDEBUG
195 	plumpower_dump(sc);
196 #endif
197 	return (void*)src;
198 }
199 
200 void
201 plum_power_disestablish(plum_chipset_tag_t pc, int ph)
202 {
203 	struct plumpower_softc *sc = pc->pc_powert;
204 	bus_space_tag_t regt = sc->sc_regt;
205 	bus_space_handle_t regh = sc->sc_regh;
206 	int src = (int)ph;
207 	plumreg_t pwrreg, clkreg;
208 
209 	pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
210 	clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
211 
212 	switch(src) {
213 	default:
214 		panic("plum_power_disestablish: unknown power source");
215 	case PLUM_PWR_LCD:
216 		pwrreg &= ~PLUM_POWER_PWRCONT_LCDOE;
217 		plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
218 		pwrreg &= ~PLUM_POWER_PWRCONT_LCDDSP;
219 		plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
220 		pwrreg &= ~PLUM_POWER_PWRCONT_LCDPWR;
221 		break;
222 	case PLUM_PWR_BKL:
223 		pwrreg &= ~PLUM_POWER_PWRCONT_BKLIGHT;
224 		break;
225 	case PLUM_PWR_IO5:
226 		pwrreg &= ~(PLUM_POWER_PWRCONT_IO5PWR |
227 		    PLUM_POWER_PWRCONT_IO5OE);
228 		clkreg &= ~PLUM_POWER_CLKCONT_IO5CLK;
229 		break;
230 	case PLUM_PWR_EXTPW0:
231 		pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW0;
232 		break;
233 	case PLUM_PWR_EXTPW1:
234 		pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW1;
235 		break;
236 	case PLUM_PWR_EXTPW2:
237 		pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW2;
238 		break;
239 	case PLUM_PWR_USB:
240 		pwrreg &= ~PLUM_POWER_PWRCONT_USBEN;
241 		clkreg &= ~(PLUM_POWER_CLKCONT_USBCLK1 |
242 		    PLUM_POWER_CLKCONT_USBCLK2);
243 		break;
244 	case PLUM_PWR_SM:
245 		clkreg &= ~PLUM_POWER_CLKCONT_SMCLK;
246 		break;
247 	case PLUM_PWR_PCC1:
248 		clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK1;
249 		break;
250 	case PLUM_PWR_PCC2:
251 		clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK2;
252 		break;
253 	}
254 
255 	plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
256 	plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg);
257 #ifdef PLUMPOWERDEBUG
258 	plumpower_dump(sc);
259 #endif
260 }
261 
262 #ifdef PLUMPOWERDEBUG
263 #define ISPOWERSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_PWRCONT_##m, #m)
264 #define ISCLOCKSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_CLKCONT_##m, #m)
265 static void
266 plumpower_dump(struct plumpower_softc *sc)
267 {
268 	bus_space_tag_t regt = sc->sc_regt;
269 	bus_space_handle_t regh = sc->sc_regh;
270 	plumreg_t reg;
271 
272 	reg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
273 	printf(" power:");
274 	ISPOWERSUPPLY(reg, USBEN);
275 	ISPOWERSUPPLY(reg, IO5OE);
276 	ISPOWERSUPPLY(reg, LCDOE);
277 	ISPOWERSUPPLY(reg, EXTPW2);
278 	ISPOWERSUPPLY(reg, EXTPW1);
279 	ISPOWERSUPPLY(reg, EXTPW0);
280 	ISPOWERSUPPLY(reg, IO5PWR);
281 	ISPOWERSUPPLY(reg, BKLIGHT);
282 	ISPOWERSUPPLY(reg, LCDPWR);
283 	ISPOWERSUPPLY(reg, LCDDSP);
284 	reg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
285 	printf("\n clock:");
286 	ISCLOCKSUPPLY(reg, USBCLK2);
287 	ISCLOCKSUPPLY(reg, USBCLK1);
288 	ISCLOCKSUPPLY(reg, IO5CLK);
289 	ISCLOCKSUPPLY(reg, SMCLK);
290 	ISCLOCKSUPPLY(reg, PCCCLK2);
291 	ISCLOCKSUPPLY(reg, PCCCLK1);
292 	reg = plum_conf_read(regt, regh, PLUM_POWER_INPENA_REG);
293 	printf("\n MCS interface %sebled",
294 	    reg & PLUM_POWER_INPENA ? "en" : "dis");
295 	reg = plum_conf_read(regt, regh, PLUM_POWER_RESETC_REG);
296 	printf("\n IO5 reset:%s %s",
297 	    reg & PLUM_POWER_RESETC_IO5CL0 ? "CLRL" : "",
298 	    reg & PLUM_POWER_RESETC_IO5CL1 ? "CLRH" : "");
299 	printf("\n");
300 }
301 #endif /* PLUMPOWERDEBUG */
302 
303