1 /* $NetBSD: plumohci.c,v 1.7 2002/10/02 05:26:46 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 UCHIYAMA Yasushi 5 * Copyright (c) 1999 MAEKAWA Masahide <bishop@rr.iij4u.or.jp> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 /* 31 * USB Open Host Controller driver. 32 * 33 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 34 * USB spec: http://www.usb.org/developers/data/usb11.pdf 35 */ 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 #include <sys/proc.h> 42 #include <sys/queue.h> 43 44 /* busdma */ 45 #include <sys/mbuf.h> 46 #include <uvm/uvm_extern.h> 47 48 #include <machine/bus.h> 49 #include <machine/bus_dma_hpcmips.h> 50 51 #include <dev/usb/usb.h> 52 #include <dev/usb/usbdi.h> 53 #include <dev/usb/usbdivar.h> 54 #include <dev/usb/usb_mem.h> 55 56 #include <dev/usb/ohcireg.h> 57 #include <dev/usb/ohcivar.h> 58 59 #include <hpcmips/tx/tx39var.h> 60 #include <hpcmips/dev/plumvar.h> 61 #include <hpcmips/dev/plumicuvar.h> 62 #include <hpcmips/dev/plumpowervar.h> 63 #include <hpcmips/dev/plumohcireg.h> 64 65 int plumohci_match(struct device *, struct cfdata *, void *); 66 void plumohci_attach(struct device *, struct device *, void *); 67 int plumohci_intr(void *); 68 69 void __plumohci_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, 70 bus_addr_t, bus_size_t, int); 71 int __plumohci_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t, 72 bus_size_t, bus_dma_segment_t *, int, int *, int); 73 void __plumohci_dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int); 74 int __plumohci_dmamem_map(bus_dma_tag_t, bus_dma_segment_t *, 75 int, size_t, caddr_t *, int); 76 void __plumohci_dmamem_unmap(bus_dma_tag_t, caddr_t, size_t); 77 78 struct bus_dma_tag_hpcmips plumohci_bus_dma_tag = { 79 { 80 NULL, 81 { 82 _hpcmips_bd_map_create, 83 _hpcmips_bd_map_destroy, 84 _hpcmips_bd_map_load, 85 _hpcmips_bd_map_load_mbuf, 86 _hpcmips_bd_map_load_uio, 87 _hpcmips_bd_map_load_raw, 88 _hpcmips_bd_map_unload, 89 __plumohci_dmamap_sync, 90 __plumohci_dmamem_alloc, 91 __plumohci_dmamem_free, 92 __plumohci_dmamem_map, 93 __plumohci_dmamem_unmap, 94 _hpcmips_bd_mem_mmap, 95 }, 96 }, 97 NULL, 98 }; 99 100 struct plumohci_shm { 101 bus_space_handle_t ps_bsh; 102 paddr_t ps_paddr; 103 caddr_t ps_caddr; 104 size_t ps_size; 105 LIST_ENTRY(plumohci_shm) ps_link; 106 }; 107 108 struct plumohci_softc { 109 struct ohci_softc sc; 110 void *sc_ih; 111 void *sc_wakeih; 112 113 LIST_HEAD(, plumohci_shm) sc_shm_head; 114 }; 115 116 CFATTACH_DECL(plumohci, sizeof(struct plumohci_softc), 117 plumohci_match, plumohci_attach, NULL, NULL); 118 119 int 120 plumohci_match(struct device *parent, struct cfdata *match, void *aux) 121 { 122 /* PLUM2 builtin OHCI module */ 123 124 return (1); 125 } 126 127 void 128 plumohci_attach(struct device *parent, struct device *self, void *aux) 129 { 130 struct plumohci_softc *sc = (struct plumohci_softc *)self; 131 struct plum_attach_args *pa = aux; 132 usbd_status r; 133 134 sc->sc.iot = pa->pa_iot; 135 sc->sc.sc_bus.dmatag = &plumohci_bus_dma_tag.bdt; 136 plumohci_bus_dma_tag._dmamap_chipset_v = sc; 137 138 /* Map I/O space */ 139 if (bus_space_map(sc->sc.iot, PLUM_OHCI_REGBASE, OHCI_PAGE_SIZE, 140 0, &sc->sc.ioh)) { 141 printf(": cannot map mem space\n"); 142 return; 143 } 144 145 /* power up */ 146 /* 147 * in the case of PLUM2, UHOSTC uses the VRAM as the shared RAM 148 * so establish power/clock of Video contoroller 149 */ 150 plum_power_establish(pa->pa_pc, PLUM_PWR_EXTPW1); 151 plum_power_establish(pa->pa_pc, PLUM_PWR_USB); 152 153 /* Disable interrupts, so we don't can any spurious ones. */ 154 bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE, 155 OHCI_ALL_INTRS); 156 157 /* master enable */ 158 sc->sc_ih = plum_intr_establish(pa->pa_pc, PLUM_INT_USB, IST_EDGE, 159 IPL_USB, ohci_intr, sc); 160 #if 0 161 /* 162 * enable the clock restart request interrupt 163 * (for USBSUSPEND state) 164 */ 165 sc->sc_wakeih = plum_intr_establish(pa->pa_pc, PLUM_INT_USBWAKE, 166 IST_EDGE, IPL_USB, 167 plumohci_intr, sc); 168 #endif 169 /* 170 * Shared memory list. 171 */ 172 LIST_INIT(&sc->sc_shm_head); 173 174 printf("\n"); 175 176 r = ohci_init(&sc->sc); 177 178 if (r != USBD_NORMAL_COMPLETION) { 179 printf(": init failed, error=%d\n", r); 180 181 plum_intr_disestablish(pa->pa_pc, sc->sc_ih); 182 plum_intr_disestablish(pa->pa_pc, sc->sc_wakeih); 183 184 return; 185 } 186 187 /* Attach usb device. */ 188 sc->sc.sc_child = config_found((void *) sc, &sc->sc.sc_bus, 189 usbctlprint); 190 } 191 192 int 193 plumohci_intr(void *arg) 194 { 195 printf("Plum2 OHCI: wakeup intr\n"); 196 return 0; 197 } 198 199 /* 200 * Plum2 OHCI specific busdma routines. 201 * Plum2 OHCI shared buffer can't allocate on memory 202 * but V-RAM (busspace). 203 */ 204 205 void 206 __plumohci_dmamap_sync(bus_dma_tag_t tx, bus_dmamap_t map, bus_addr_t offset, 207 bus_size_t len, int ops) 208 { 209 struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx; 210 struct plumohci_softc *sc = t->_dmamap_chipset_v; 211 212 /* 213 * Flush the write buffer allocated on the V-RAM. 214 * Accessing any host controller register flushs write buffer 215 */ 216 (void)bus_space_read_4(sc->sc.iot, sc->sc.ioh, OHCI_REVISION); 217 } 218 219 int 220 __plumohci_dmamem_alloc(bus_dma_tag_t tx, bus_size_t size, 221 bus_size_t alignment, bus_size_t boundary, bus_dma_segment_t *segs, 222 int nsegs, int *rsegs, int flags) 223 { 224 struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx; 225 struct plumohci_softc *sc = t->_dmamap_chipset_v; 226 struct plumohci_shm *ps; 227 bus_space_handle_t bsh; 228 paddr_t paddr; 229 caddr_t caddr; 230 int error; 231 232 size = round_page(size); 233 234 /* 235 * Allocate buffer from V-RAM area. 236 */ 237 error = bus_space_alloc(sc->sc.iot, PLUM_OHCI_SHMEMBASE, 238 PLUM_OHCI_SHMEMBASE + PLUM_OHCI_SHMEMSIZE - 1, 239 size, OHCI_PAGE_SIZE, OHCI_PAGE_SIZE, 0, 240 (bus_addr_t*)&caddr, &bsh); 241 if (error) 242 return (1); 243 244 pmap_extract(pmap_kernel(), (vaddr_t)caddr, &paddr); 245 246 ps = malloc(sizeof(struct plumohci_shm), M_DEVBUF, M_NOWAIT); 247 if (ps == 0) 248 return (1); 249 250 ps->ps_bsh = bsh; 251 ps->ps_size = segs[0].ds_len = size; 252 ps->ps_paddr = segs[0].ds_addr = paddr; 253 ps->ps_caddr = caddr; 254 255 LIST_INSERT_HEAD(&sc->sc_shm_head, ps, ps_link); 256 257 *rsegs = 1; 258 259 return (0); 260 } 261 262 void 263 __plumohci_dmamem_free(bus_dma_tag_t tx, bus_dma_segment_t *segs, int nsegs) 264 { 265 struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx; 266 struct plumohci_softc *sc = t->_dmamap_chipset_v; 267 struct plumohci_shm *ps; 268 269 for (ps = LIST_FIRST(&sc->sc_shm_head); ps; 270 ps = LIST_NEXT(ps, ps_link)) { 271 272 if (ps->ps_paddr == segs[0].ds_addr) { 273 bus_space_free(sc->sc.iot, ps->ps_bsh, ps->ps_size); 274 LIST_REMOVE(ps, ps_link); 275 free(ps, M_DEVBUF); 276 277 return; 278 } 279 } 280 281 panic("__plumohci_dmamem_free: can't find corresponding handle."); 282 /* NOTREACHED */ 283 } 284 285 int 286 __plumohci_dmamem_map(bus_dma_tag_t tx, bus_dma_segment_t *segs, int nsegs, 287 size_t size, caddr_t *kvap, int flags) 288 { 289 struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx; 290 struct plumohci_softc *sc = t->_dmamap_chipset_v; 291 struct plumohci_shm *ps; 292 293 for (ps = LIST_FIRST(&sc->sc_shm_head); ps; 294 ps = LIST_NEXT(ps, ps_link)) { 295 if (ps->ps_paddr == segs[0].ds_addr) { 296 297 *kvap = ps->ps_caddr; 298 299 return (0); 300 } 301 } 302 303 return (1); 304 } 305 306 void 307 __plumohci_dmamem_unmap(bus_dma_tag_t t, caddr_t kva, size_t size) 308 { 309 /* nothing to do */ 310 } 311