1 /* $NetBSD: com_hpcio.c,v 1.2 2002/01/05 00:40:38 takemura Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 TAKEMRUA Shin. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. Neither the name of the project nor the names of its contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 */ 31 32 #include "opt_kgdb.h" 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 #include <sys/reboot.h> 38 #include <sys/termios.h> 39 40 #include <machine/intr.h> 41 #include <machine/bus.h> 42 #include <machine/platid.h> 43 #include <machine/platid_mask.h> 44 45 #include <hpcmips/dev/com_hpciovar.h> 46 47 #include <dev/hpc/hpciovar.h> 48 #include <dev/ic/comvar.h> 49 #include <dev/ic/comreg.h> 50 51 #include "locators.h" 52 53 #define COM_HPCIODEBUG 54 #ifdef COM_HPCIODEBUG 55 int com_hpcio_debug = 0; 56 #define DPRINTF(arg...) do { if (com_hpcio_debug) printf(arg); } while (0) 57 #else 58 #define DPRINTF(arg...) do {} while (0) 59 #endif 60 61 #define COM_HPCIO_BYTE_ALIGNMENT 0 62 #define COM_HPCIO_HALFWORD_ALIGNMENT 1 63 64 struct com_hpcio_softc { 65 struct com_softc hsc_com; 66 struct bus_space_tag hsc_iot; 67 struct hpcio_chip *hsc_hc; 68 }; 69 static struct bus_space_tag com_hpcio_cniotx; 70 static bus_space_tag_t com_hpcio_cniot = &com_hpcio_cniotx; 71 static int com_hpcio_cniobase; 72 73 static int com_hpcio_probe(struct device *, struct cfdata *, void *); 74 static void com_hpcio_attach(struct device *, struct device *, void *); 75 static int com_hpcio_common_probe(bus_space_tag_t, int, int *); 76 void com_hpcio_iot_init(bus_space_tag_t iot, bus_space_tag_t base); 77 bus_space_protos(bs_notimpl); 78 bus_space_protos(bs_through); 79 bus_space_protos(com_hpcio); 80 81 struct cfattach com_hpcio_ca = { 82 sizeof(struct com_hpcio_softc), com_hpcio_probe, com_hpcio_attach 83 }; 84 85 struct bus_space_ops com_hpcio_bs_ops = { 86 /* mapping/unmapping */ 87 bs_through_bs_map, 88 bs_through_bs_unmap, 89 bs_through_bs_subregion, 90 91 /* allocation/deallocation */ 92 bs_through_bs_alloc, 93 bs_through_bs_free, 94 95 /* get kernel virtual address */ 96 bs_through_bs_vaddr, /* there is no linear mapping */ 97 98 /* Mmap bus space for user */ 99 bs_through_bs_mmap, 100 101 /* barrier */ 102 bs_through_bs_barrier, 103 104 /* read (single) */ 105 com_hpcio_bs_r_1, 106 bs_notimpl_bs_r_2, 107 bs_notimpl_bs_r_4, 108 bs_notimpl_bs_r_8, 109 110 /* read multiple */ 111 bs_notimpl_bs_rm_1, 112 bs_notimpl_bs_rm_2, 113 bs_notimpl_bs_rm_4, 114 bs_notimpl_bs_rm_8, 115 116 /* read region */ 117 bs_notimpl_bs_rr_1, 118 bs_notimpl_bs_rr_2, 119 bs_notimpl_bs_rr_4, 120 bs_notimpl_bs_rr_8, 121 122 /* write (single) */ 123 com_hpcio_bs_w_1, 124 bs_notimpl_bs_w_2, 125 bs_notimpl_bs_w_4, 126 bs_notimpl_bs_w_8, 127 128 /* write multiple */ 129 com_hpcio_bs_wm_1, 130 bs_notimpl_bs_wm_2, 131 bs_notimpl_bs_wm_4, 132 bs_notimpl_bs_wm_8, 133 134 /* write region */ 135 bs_notimpl_bs_wr_1, 136 bs_notimpl_bs_wr_2, 137 bs_notimpl_bs_wr_4, 138 bs_notimpl_bs_wr_8, 139 140 #ifdef BUS_SPACE_HAS_REAL_STREAM_METHODS 141 /* read stream (single) */ 142 bs_notimpl_bs_rs_1, 143 bs_notimpl_bs_rs_2, 144 bs_notimpl_bs_rs_4, 145 bs_notimpl_bs_rs_8, 146 147 /* read multiple stream */ 148 bs_notimpl_bs_rms_1, 149 bs_notimpl_bs_rms_2, 150 bs_notimpl_bs_rms_4, 151 bs_notimpl_bs_rms_8, 152 153 /* read region stream */ 154 bs_notimpl_bs_rrs_1, 155 bs_notimpl_bs_rrs_2, 156 bs_notimpl_bs_rrs_4, 157 bs_notimpl_bs_rrs_8, 158 159 /* write stream (single) */ 160 bs_notimpl_bs_ws_1, 161 bs_notimpl_bs_ws_2, 162 bs_notimpl_bs_ws_4, 163 bs_notimpl_bs_ws_8, 164 165 /* write multiple stream */ 166 bs_notimpl_bs_wms_1, 167 bs_notimpl_bs_wms_2, 168 bs_notimpl_bs_wms_4, 169 bs_notimpl_bs_wms_8, 170 171 /* write region stream */ 172 bs_notimpl_bs_wrs_1, 173 bs_notimpl_bs_wrs_2, 174 bs_notimpl_bs_wrs_4, 175 bs_notimpl_bs_wrs_8, 176 #endif /* BUS_SPACE_HAS_REAL_STREAM_METHODS */ 177 178 /* set multi */ 179 bs_notimpl_bs_sm_1, 180 bs_notimpl_bs_sm_2, 181 bs_notimpl_bs_sm_4, 182 bs_notimpl_bs_sm_8, 183 184 /* set region */ 185 bs_notimpl_bs_sr_1, 186 bs_notimpl_bs_sr_2, 187 bs_notimpl_bs_sr_4, 188 bs_notimpl_bs_sr_8, 189 190 /* copy */ 191 bs_notimpl_bs_c_1, 192 bs_notimpl_bs_c_2, 193 bs_notimpl_bs_c_4, 194 bs_notimpl_bs_c_8, 195 }; 196 197 int 198 com_hpcio_cndb_attach(bus_space_tag_t iot, int iobase, int rate, 199 int frequency, tcflag_t cflag, int kgdb) 200 { 201 int alignment; 202 203 DPRINTF("com_hpcio_cndb_attach()\n"); 204 if (!com_hpcio_common_probe(iot, iobase, &alignment)) { 205 DPRINTF("com_hpcio_cndb_attach(): probe failed\n"); 206 return (ENOTTY); 207 } 208 if (alignment == COM_HPCIO_HALFWORD_ALIGNMENT) { 209 DPRINTF("com_hpcio_cndb_attach(): half word aligned\n"); 210 com_hpcio_iot_init(&com_hpcio_cniotx, iot); 211 com_hpcio_cniot = &com_hpcio_cniotx; 212 } else { 213 com_hpcio_cniot = iot; 214 } 215 com_hpcio_cniobase = iobase; 216 DPRINTF("com_hpcio_cndb_attach(): probe succeeded\n"); 217 #ifdef KGDB 218 if (kgdb) 219 return (com_kgdb_attach(com_hpcio_cniot, iobase, rate, 220 frequency, cflag)); 221 else 222 #endif 223 return (comcnattach(com_hpcio_cniot, iobase, rate, 224 frequency, cflag)); 225 } 226 227 static int 228 com_hpcio_common_probe(bus_space_tag_t iot, int iobase, int *alignment) 229 { 230 bus_space_handle_t ioh; 231 static struct bus_space_tag tmpiot; 232 int rv; 233 234 /* 235 * try byte aligned register 236 */ 237 *alignment = COM_HPCIO_BYTE_ALIGNMENT; 238 if (bus_space_map(iot, iobase, 1, 0, &ioh)) 239 return 0; 240 rv = comprobe1(iot, ioh); 241 bus_space_unmap(iot, ioh, 1); 242 243 if (rv != 0) 244 return (rv); 245 246 /* 247 * try half word aligned register 248 */ 249 *alignment = COM_HPCIO_HALFWORD_ALIGNMENT; 250 com_hpcio_iot_init(&tmpiot, iot); 251 if (bus_space_map(&tmpiot, iobase, 1, 0, &ioh)) 252 return 0; 253 rv = comprobe1(&tmpiot, ioh); 254 bus_space_unmap(&tmpiot, ioh, 1); 255 256 return (rv); 257 } 258 259 static int 260 com_hpcio_probe(struct device *parent, struct cfdata *cf, void *aux) 261 { 262 struct hpcio_attach_args *haa = aux; 263 bus_space_tag_t iot = haa->haa_iot; 264 int addr, alignment; 265 266 if (cf->cf_loc[HPCIOIFCF_PLATFORM] != HPCIOIFCF_PLATFORM_DEFAULT) { 267 platid_mask_t mask; 268 269 mask = PLATID_DEREF(cf->cf_loc[HPCIOIFCF_PLATFORM]); 270 if (!platid_match(&platid, &mask)) 271 return (0); /* platform id didn't match */ 272 } 273 274 if ((addr = cf->cf_loc[HPCIOIFCF_ADDR]) == HPCIOIFCF_ADDR_DEFAULT) 275 return (0); /* address wasn't specified */ 276 277 return com_hpcio_common_probe(iot, addr, &alignment); 278 } 279 280 281 static void 282 com_hpcio_attach(struct device *parent, struct device *self, void *aux) 283 { 284 struct com_hpcio_softc *hsc = (void *)self; 285 struct com_softc *sc = &hsc->hsc_com; 286 struct hpcio_attach_args *haa = aux; 287 bus_space_tag_t iot; 288 bus_space_handle_t ioh; 289 int addr, port, mode, alignment, *loc; 290 291 loc = sc->sc_dev.dv_cfdata->cf_loc; 292 addr = loc[HPCIOIFCF_ADDR]; 293 printf(" addr %x", addr); 294 if ((com_hpcio_cniot == haa->haa_iot || 295 com_hpcio_cniot->bs_base == haa->haa_iot) && 296 com_hpcio_cniobase == addr && 297 com_is_console(com_hpcio_cniot, addr, 0)) { 298 iot = com_hpcio_cniot; 299 if (com_hpcio_cniot->bs_base == haa->haa_iot) 300 printf(", half word aligned"); 301 } else { 302 com_hpcio_common_probe(haa->haa_iot, addr, &alignment); 303 if (alignment == COM_HPCIO_HALFWORD_ALIGNMENT) { 304 printf(", half word aligned"); 305 iot = &hsc->hsc_iot; 306 com_hpcio_iot_init(iot, haa->haa_iot); 307 } else { 308 iot = haa->haa_iot; 309 } 310 } 311 if (bus_space_map(iot, addr, 1, 0, &ioh)) { 312 printf(": can't map bus space\n"); 313 return; 314 } 315 sc->sc_iobase = addr; 316 sc->sc_iot = iot; 317 sc->sc_ioh = ioh; 318 319 sc->enable = NULL; 320 sc->disable = NULL; 321 322 sc->sc_frequency = COM_FREQ; 323 com_attach_subr(sc); 324 325 hsc->hsc_hc = (*haa->haa_getchip)(haa->haa_sc, loc[HPCIOIFCF_IOCHIP]); 326 port = loc[HPCIOIFCF_PORT]; 327 mode = HPCIO_INTR_LEVEL | HPCIO_INTR_HIGH; 328 hpcio_intr_establish(hsc->hsc_hc, port, mode, comintr, sc); 329 } 330 331 /* 332 * bus stuff (registershalf word aligned) 333 */ 334 void 335 com_hpcio_iot_init(bus_space_tag_t iot, bus_space_tag_t base) 336 { 337 338 iot->bs_base = base; 339 iot->bs_ops = com_hpcio_bs_ops; /* structure assignment */ 340 iot->bs_ops.bs_r_1 = com_hpcio_bs_r_1; 341 iot->bs_ops.bs_w_1 = com_hpcio_bs_w_1; 342 iot->bs_ops.bs_wm_1 = com_hpcio_bs_wm_1; 343 } 344 345 u_int8_t 346 com_hpcio_bs_r_1(bus_space_tag_t t, bus_space_handle_t bsh, 347 bus_size_t offset) 348 { 349 return bus_space_read_1(t->bs_base, bsh, offset * 2); 350 } 351 352 void 353 com_hpcio_bs_w_1(bus_space_tag_t t, bus_space_handle_t bsh, 354 bus_size_t offset, u_int8_t value) 355 { 356 bus_space_write_1(t->bs_base, bsh, offset * 2, value); 357 } 358 359 void 360 com_hpcio_bs_wm_1(bus_space_tag_t t, bus_space_handle_t bsh, 361 bus_size_t offset, const u_int8_t *addr, bus_size_t count) 362 { 363 bus_space_write_multi_1(t->bs_base, bsh, offset * 2, addr, count); 364 } 365