xref: /netbsd-src/sys/arch/hpcarm/dev/sacc_hpcarm.c (revision 4a5a04e4343115db37c85b7cb61fcb56c8a00b07)
1 /*      $NetBSD: sacc_hpcarm.c,v 1.6 2006/03/04 14:36:19 peter Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by IWAMOTO Toshihiro.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * Platform dependent part for SA11[01]1 companion chip on hpcarm.
41  */
42 
43 #include <sys/cdefs.h>
44 __KERNEL_RCSID(0, "$NetBSD: sacc_hpcarm.c,v 1.6 2006/03/04 14:36:19 peter Exp $");
45 
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/types.h>
49 #include <sys/conf.h>
50 #include <sys/device.h>
51 #include <sys/kernel.h>
52 #include <sys/malloc.h>
53 #include <sys/uio.h>
54 
55 #include <machine/bus.h>
56 #include <machine/platid.h>
57 #include <machine/platid_mask.h>
58 
59 #include <arm/sa11x0/sa11x0_reg.h>
60 #include <arm/sa11x0/sa11x0_var.h>
61 #include <arm/sa11x0/sa11x0_gpioreg.h>
62 #include <arm/sa11x0/sa1111_reg.h>
63 #include <arm/sa11x0/sa1111_var.h>
64 
65 #include "locators.h"
66 
67 static void	sacc_attach(struct device *, struct device *, void *);
68 static int	sacc_intr(void *);
69 
70 struct platid_data sacc_platid_table[] = {
71 	{ &platid_mask_MACH_HP_JORNADA_7XX, (void *)1 },
72 	{ NULL, NULL }
73 };
74 
75 CFATTACH_DECL(sacc, sizeof(struct sacc_softc),
76     sacc_probe, sacc_attach, NULL, NULL);
77 
78 #ifdef INTR_DEBUG
79 #define DPRINTF(arg)	printf arg
80 #else
81 #define DPRINTF(arg)
82 #endif
83 
84 static void
85 sacc_attach(struct device *parent, struct device *self, void *aux)
86 {
87 	int i, gpiopin;
88 	uint32_t skid;
89 	struct sacc_softc *sc = (struct sacc_softc *)self;
90 	struct sa11x0_softc *psc = (struct sa11x0_softc *)parent;
91 	struct sa11x0_attach_args *sa = aux;
92 	struct platid_data *p;
93 
94 	printf("\n");
95 
96 	sc->sc_iot = sa->sa_iot;
97 	sc->sc_piot = psc->sc_iot;
98 	sc->sc_gpioh = psc->sc_gpioh;
99 	if ((p = platid_search_data(&platid, sacc_platid_table)) == NULL)
100 		return;
101 
102 	gpiopin = (int) p->data;
103 	sc->sc_gpiomask = 1 << gpiopin;
104 
105 	if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0,
106 			  &sc->sc_ioh)) {
107 		printf("%s: unable to map registers\n", sc->sc_dev.dv_xname);
108 		return;
109 	}
110 
111 	skid = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCSBI_SKID);
112 
113 	printf("%s: SA1111 rev %d.%d\n", sc->sc_dev.dv_xname,
114 	       (skid & 0xf0) >> 3, skid & 0xf);
115 
116 	for (i = 0; i < SACCIC_LEN; i++)
117 		sc->sc_intrhand[i] = NULL;
118 
119 	/* initialize SA1111 interrupt controller */
120 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0, 0);
121 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1, 0);
122 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTTSTSEL, 0);
123 	bus_space_write_4(sc->sc_iot, sc->sc_ioh,
124 			  SACCIC_INTSTATCLR0, 0xffffffff);
125 	bus_space_write_4(sc->sc_iot, sc->sc_ioh,
126 			  SACCIC_INTSTATCLR1, 0xffffffff);
127 
128 	/* connect to SA1110's GPIO intr */
129 	sa11x0_intr_establish(0, gpiopin, 1, IPL_SERIAL, sacc_intr, sc);
130 
131 	/*
132 	 *  Attach each devices
133 	 */
134 	config_search_ia(sa1111_search, self, "sacc", NULL);
135 }
136 
137 static int
138 sacc_intr(void *arg)
139 {
140 	int i;
141 	uint32_t mask;
142 	struct sacc_intrvec intstat;
143 	struct sacc_softc *sc = arg;
144 	struct sacc_intrhand *ih;
145 
146 	intstat.lo =
147 	    bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR0);
148 	intstat.hi =
149 	    bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR1);
150 	DPRINTF(("sacc_intr_dispatch: %x %x\n", intstat.lo, intstat.hi));
151 
152 	/* clear SA1110's GPIO intr status */
153 	bus_space_write_4(sc->sc_piot, sc->sc_gpioh,
154 			  SAGPIO_EDR, sc->sc_gpiomask);
155 
156 	for (i = 0, mask = 1; i < 32; i++, mask <<= 1)
157 		if (intstat.lo & mask) {
158 			/*
159 			 * Clear intr status before calling intr handlers.
160 			 * This cause stray interrupts, but clearing
161 			 * after calling intr handlers cause intr lossage.
162 			 */
163 			bus_space_write_4(sc->sc_iot, sc->sc_ioh,
164 					  SACCIC_INTSTATCLR0, 1 << i);
165 
166 			for (ih = sc->sc_intrhand[i]; ih; ih = ih->ih_next)
167 				softintr_schedule(ih->ih_soft);
168 		}
169 	for (i = 0, mask = 1; i < SACCIC_LEN - 32; i++, mask <<= 1)
170 		if (intstat.hi & mask) {
171 			bus_space_write_4(sc->sc_iot, sc->sc_ioh,
172 					  SACCIC_INTSTATCLR1, 1 << i);
173 			for (ih = sc->sc_intrhand[i + 32]; ih; ih = ih->ih_next)
174 				softintr_schedule(ih->ih_soft);
175 		}
176 	return 1;
177 }
178