1 /* $NetBSD: ipaq_pcic.c,v 1.7 2002/07/20 01:36:56 ichiro Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Ichiro FUKUHARA (ichiro@ichiro.org). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/types.h> 42 #include <sys/conf.h> 43 #include <sys/file.h> 44 #include <sys/device.h> 45 #include <sys/kernel.h> 46 #include <sys/kthread.h> 47 #include <sys/malloc.h> 48 49 #include <machine/bus.h> 50 #include <dev/pcmcia/pcmciachip.h> 51 #include <dev/pcmcia/pcmciavar.h> 52 53 #include <hpcarm/dev/ipaq_saipvar.h> 54 #include <hpcarm/dev/ipaq_pcicreg.h> 55 #include <hpcarm/dev/ipaq_gpioreg.h> 56 57 #include <arm/sa11x0/sa11x0_gpioreg.h> 58 #include <arm/sa11x0/sa11x0_var.h> 59 #include <arm/sa11x0/sa11xx_pcicvar.h> 60 61 #include "ipaqpcic.h" 62 63 static int ipaqpcic_match(struct device *, struct cfdata *, void *); 64 static void ipaqpcic_attach(struct device *, struct device *, void *); 65 static int ipaqpcic_print(void *, const char *); 66 static int ipaqpcic_submatch(struct device *, struct cfdata *, void *); 67 68 static int ipaqpcic_read(struct sapcic_socket *, int); 69 static void ipaqpcic_write(struct sapcic_socket *, int, int); 70 static void ipaqpcic_set_power(struct sapcic_socket *, int); 71 static void ipaqpcic_clear_intr(int); 72 static void *ipaqpcic_intr_establish(struct sapcic_socket *, int, 73 int (*)(void *), void *); 74 static void ipaqpcic_intr_disestablish(struct sapcic_socket *, void *); 75 76 struct ipaqpcic_softc { 77 struct sapcic_softc sc_pc; 78 bus_space_handle_t sc_ioh; 79 struct ipaq_softc *sc_parent; 80 struct sapcic_socket sc_socket[2]; 81 }; 82 83 static void ipaqpcic_init(struct ipaqpcic_softc *); 84 85 static struct sapcic_tag ipaqpcic_functions = { 86 ipaqpcic_read, 87 ipaqpcic_write, 88 ipaqpcic_set_power, 89 ipaqpcic_clear_intr, 90 ipaqpcic_intr_establish, 91 ipaqpcic_intr_disestablish 92 }; 93 94 struct cfattach ipaqpcic_ca = { 95 sizeof(struct ipaqpcic_softc), ipaqpcic_match, ipaqpcic_attach 96 }; 97 98 static int 99 ipaqpcic_match(parent, cf, aux) 100 struct device *parent; 101 struct cfdata *cf; 102 void *aux; 103 { 104 return (1); 105 } 106 107 static void 108 ipaqpcic_attach(parent, self, aux) 109 struct device *parent; 110 struct device *self; 111 void *aux; 112 { 113 int i; 114 struct pcmciabus_attach_args paa; 115 struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)self; 116 struct ipaq_softc *psc = (struct ipaq_softc *)parent; 117 118 printf("\n"); 119 120 sc->sc_pc.sc_iot = psc->sc_iot; 121 sc->sc_ioh = psc->sc_ioh; 122 sc->sc_parent = (struct ipaq_softc *)parent; 123 124 ipaqpcic_init(sc); 125 126 for(i = 0; i < 2; i++) { 127 sc->sc_socket[i].sc = (struct sapcic_softc *)sc; 128 sc->sc_socket[i].socket = i; 129 sc->sc_socket[i].pcictag_cookie = psc; 130 sc->sc_socket[i].pcictag = &ipaqpcic_functions; 131 sc->sc_socket[i].event_thread = NULL; 132 sc->sc_socket[i].event = 0; 133 sc->sc_socket[i].laststatus = SAPCIC_CARD_INVALID; 134 sc->sc_socket[i].shutdown = 0; 135 136 paa.paa_busname = "pcmcia"; 137 paa.pct = (pcmcia_chipset_tag_t)&sa11x0_pcmcia_functions; 138 paa.pch = (pcmcia_chipset_handle_t)&sc->sc_socket[i]; 139 paa.iobase = 0; 140 paa.iosize = 0x4000000; 141 142 sc->sc_socket[i].pcmcia = 143 (struct device *)config_found_sm(&sc->sc_pc.sc_dev, 144 &paa, ipaqpcic_print, ipaqpcic_submatch); 145 146 sa11x0_intr_establish((sa11x0_chipset_tag_t)psc, 147 i ? IRQ_CD1 : IRQ_CD0, 148 1, IPL_BIO, sapcic_intr, 149 &sc->sc_socket[i]); 150 151 /* schedule kthread creation */ 152 kthread_create(sapcic_kthread_create, &sc->sc_socket[i]); 153 154 #if 0 /* XXX */ 155 /* establish_intr should be after creating the kthread */ 156 config_interrupt(&sc->sc_socket[i], ipaqpcic_config_intr); 157 #endif 158 } 159 } 160 161 static int 162 ipaqpcic_print(aux, name) 163 void *aux; 164 const char *name; 165 { 166 return (UNCONF); 167 } 168 169 static int 170 ipaqpcic_submatch(parent, cf, aux) 171 struct device *parent; 172 struct cfdata *cf; 173 void *aux; 174 { 175 return (*cf->cf_attach->ca_match)(parent, cf, aux); 176 } 177 178 static void 179 ipaqpcic_init(sc) 180 struct ipaqpcic_softc *sc; 181 { 182 int cr; 183 184 /* All those are inputs */ 185 cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PDR); 186 cr &= ~(GPIO_H3600_PCMCIA_CD0 | GPIO_H3600_PCMCIA_CD1 | GPIO_H3600_PCMCIA_IRQ0 | 187 GPIO_H3600_PCMCIA_IRQ1); 188 bus_space_write_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PDR, cr); 189 190 sc->sc_parent->ipaq_egpio |= 191 EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON ; 192 sc->sc_parent->ipaq_egpio &= 193 ~(EGPIO_H3600_CARD_RESET | EGPIO_H3600_OPT_RESET); 194 bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh, 195 0, sc->sc_parent->ipaq_egpio); 196 } 197 198 static int 199 ipaqpcic_read(so, reg) 200 struct sapcic_socket *so; 201 int reg; 202 { 203 int cr, bit; 204 struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc; 205 206 cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PLR); 207 208 switch (reg) { 209 case SAPCIC_STATUS_CARD: 210 bit = (so->socket ? GPIO_H3600_PCMCIA_CD0 : 211 GPIO_H3600_PCMCIA_CD1) & cr; 212 if (!bit) 213 return SAPCIC_CARD_INVALID; 214 else 215 return SAPCIC_CARD_VALID; 216 case SAPCIC_STATUS_VS1: 217 case SAPCIC_STATUS_VS2: 218 case SAPCIC_STATUS_READY: 219 bit = (so->socket ? GPIO_H3600_PCMCIA_IRQ0: 220 GPIO_H3600_PCMCIA_IRQ1); 221 return (bit & cr); 222 default: 223 panic("ipaqpcic_read: bogus register\n"); 224 } 225 } 226 227 static void 228 ipaqpcic_write(so, reg, arg) 229 struct sapcic_socket *so; 230 int reg; 231 int arg; 232 { 233 int s; 234 struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc; 235 236 s = splhigh(); 237 switch (reg) { 238 case SAPCIC_CONTROL_RESET: 239 sc->sc_parent->ipaq_egpio |= EGPIO_H3600_CARD_RESET; 240 break; 241 case SAPCIC_CONTROL_LINEENABLE: 242 case SAPCIC_CONTROL_WAITENABLE: 243 case SAPCIC_CONTROL_POWERSELECT: 244 break; 245 246 default: 247 splx(s); 248 panic("ipaqpcic_write: bogus register"); 249 } 250 bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh, 0, 251 sc->sc_parent->ipaq_egpio); 252 splx(s); 253 } 254 255 static void 256 ipaqpcic_set_power(so, arg) 257 struct sapcic_socket *so; 258 int arg; 259 { 260 int s; 261 struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc; 262 263 s = splbio(); 264 switch (arg) { 265 case SAPCIC_POWER_OFF: 266 sc->sc_parent->ipaq_egpio &= 267 ~(EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON); 268 break; 269 case SAPCIC_POWER_3V: 270 case SAPCIC_POWER_5V: 271 sc->sc_parent->ipaq_egpio |= 272 EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON; 273 break; 274 default: 275 panic("ipaqpcic_set_power: bogus arg\n"); 276 } 277 bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh, 278 0, sc->sc_parent->ipaq_egpio); 279 splx(s); 280 } 281 282 static void 283 ipaqpcic_clear_intr(arg) 284 { 285 } 286 287 static void * 288 ipaqpcic_intr_establish(so, level, ih_fun, ih_arg) 289 struct sapcic_socket *so; 290 int level; 291 int (*ih_fun)(void *); 292 void *ih_arg; 293 { 294 int irq; 295 296 irq = so->socket ? IRQ_IRQ0 : IRQ_IRQ1; 297 return (sa11x0_intr_establish((sa11x0_chipset_tag_t)so->pcictag_cookie, 298 irq-16, 1, level, ih_fun, ih_arg)); 299 } 300 301 static void 302 ipaqpcic_intr_disestablish(so, ih) 303 struct sapcic_socket *so; 304 void *ih; 305 { 306 sa11x0_intr_disestablish((sa11x0_chipset_tag_t)so->pcictag_cookie, ih); 307 } 308