1 /* $NetBSD: ipaq_atmelgpio.c,v 1.11 2006/03/25 15:23:49 peter Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Ichiro FUKUHARA (ichiro@ichiro.org). 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 /* 38 * iPAQ uses Atmel microcontroller to service a few of peripheral devices. 39 * This controller connect to UART1 of SA11x0. 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: ipaq_atmelgpio.c,v 1.11 2006/03/25 15:23:49 peter Exp $"); 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/types.h> 48 #include <sys/conf.h> 49 #include <sys/file.h> 50 #include <sys/device.h> 51 #include <sys/kernel.h> 52 #include <sys/kthread.h> 53 #include <sys/malloc.h> 54 55 #include <machine/bus.h> 56 57 #include <hpcarm/dev/ipaq_saipvar.h> 58 #include <hpcarm/dev/ipaq_gpioreg.h> 59 #include <hpcarm/dev/ipaq_atmel.h> 60 #include <hpcarm/dev/ipaq_atmelvar.h> 61 62 #include <arm/sa11x0/sa11x0_gpioreg.h> 63 #include <arm/sa11x0/sa11x0_comreg.h> 64 #include <arm/sa11x0/sa11x0_reg.h> 65 66 #ifdef ATMEL_DEBUG 67 #define DPRINTF(x) printf x 68 #else 69 #define DPRINTF(x) 70 #endif 71 72 static int atmelgpio_match(struct device *, struct cfdata *, void *); 73 static void atmelgpio_attach(struct device *, struct device *, void *); 74 static int atmelgpio_print(void *, const char *); 75 static int atmelgpio_search(struct device *, struct cfdata *, 76 const int *, void *); 77 static void atmelgpio_init(struct atmelgpio_softc *); 78 79 static void rxtx_data(struct atmelgpio_softc *, int, int, 80 uint8_t *, struct atmel_rx *); 81 82 CFATTACH_DECL(atmelgpio, sizeof(struct atmelgpio_softc), 83 atmelgpio_match, atmelgpio_attach, NULL, NULL); 84 85 static int 86 atmelgpio_match(parent, cf, aux) 87 struct device *parent; 88 struct cfdata *cf; 89 void *aux; 90 { 91 return (1); 92 } 93 94 static void 95 atmelgpio_attach(parent, self, aux) 96 struct device *parent; 97 struct device *self; 98 void *aux; 99 { 100 struct atmelgpio_softc *sc = (struct atmelgpio_softc *)self; 101 struct ipaq_softc *psc = (struct ipaq_softc *)parent; 102 103 struct atmel_rx rxbuf; 104 105 printf("\n"); 106 printf("%s: Atmel microcontroller GPIO\n", sc->sc_dev.dv_xname); 107 108 sc->sc_iot = psc->sc_iot; 109 sc->sc_ioh = psc->sc_ioh; 110 sc->sc_parent = (struct ipaq_softc *)parent; 111 112 if (bus_space_map(sc->sc_iot, SACOM1_BASE, SACOM_NPORTS, 0, 113 &sc->sc_ioh)) { 114 printf("%s: unable to map of UART1 registers\n", sc->sc_dev.dv_xname); 115 return; 116 } 117 118 atmelgpio_init(sc); 119 120 #if 1 /* this is sample */ 121 rxtx_data(sc, STATUS_BATTERY, 0, NULL, &rxbuf); 122 123 printf("ac_status = %x\n", rxbuf.data[0]); 124 printf("Battery kind = %x\n", rxbuf.data[1]); 125 printf("Voltage = %d mV\n", 126 1000 * (rxbuf.data[3] << 8 | rxbuf.data[2]) /228); 127 printf("Battery Status = %x\n", rxbuf.data[4]); 128 printf("Battery percentage = %d\n", 129 425 * (rxbuf.data[3] << 8 | rxbuf.data[2]) /1000 - 298); 130 #endif 131 132 /* 133 * Attach each devices 134 */ 135 136 config_search_ia(atmelgpio_search, self, "atmelgpioif", NULL); 137 } 138 139 static int 140 atmelgpio_search(parent, cf, ldesc, aux) 141 struct device *parent; 142 struct cfdata *cf; 143 const int *ldesc; 144 void *aux; 145 { 146 if (config_match(parent, cf, NULL) > 0) 147 config_attach(parent, cf, NULL, atmelgpio_print); 148 return 0; 149 } 150 151 152 static int 153 atmelgpio_print(aux, name) 154 void *aux; 155 const char *name; 156 { 157 return (UNCONF); 158 } 159 160 static void 161 atmelgpio_init(sc) 162 struct atmelgpio_softc *sc; 163 { 164 /* 8 bits no parity 1 stop bit */ 165 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR0, CR0_DSS); 166 167 /* Set baud rate 115k */ 168 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR1, 0); 169 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR2, SACOMSPEED(115200)); 170 171 /* RX/TX enable, RX/TX FIFO interrupt enable */ 172 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR3, 173 (CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE)); 174 } 175 176 static void 177 rxtx_data(sc, id, size, buf, rxbuf) 178 struct atmelgpio_softc *sc; 179 int id, size; 180 uint8_t *buf; 181 struct atmel_rx *rxbuf; 182 { 183 int i, checksum, length, rx_data; 184 uint8_t data[MAX_SENDSIZE]; 185 186 length = size + FRAME_OVERHEAD_SIZE; 187 188 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & SR0_TFS)) 189 ; 190 191 data[0] = (uint8_t)FRAME_SOF; 192 data[1] = (uint8_t)((id << 4) | size); 193 checksum = data[1]; 194 i = 2; 195 while (size--) { 196 data[i++] = *buf; 197 checksum += (uint8_t)(*buf++); 198 } 199 data[length-1] = checksum; 200 201 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_TNF)) 202 ; 203 i = 0; 204 while (i < length) 205 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_DR, data[i++]); 206 207 delay(10000); 208 #if 0 209 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & 210 (SR0_RID | SR0_RFS))) 211 #endif 212 rxbuf->state = STATE_SOF; 213 while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_RNE) { 214 215 rx_data = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_DR); 216 DPRINTF(("DATA = %x\n", rx_data)); 217 218 switch (rxbuf->state) { 219 case STATE_SOF: 220 if (rx_data == FRAME_SOF) 221 rxbuf->state = STATE_ID; 222 break; 223 case STATE_ID: 224 rxbuf->id = (rx_data & 0xf0) >> 4; 225 rxbuf->len = rx_data & 0x0f; 226 rxbuf->idx = 0; 227 rxbuf->checksum = rx_data; 228 rxbuf->state = (rxbuf->len > 0 ) ? STATE_DATA : STATE_EOF; 229 break; 230 case STATE_DATA: 231 rxbuf->checksum += rx_data; 232 rxbuf->data[rxbuf->idx] = rx_data; 233 if (++rxbuf->idx == rxbuf->len) 234 rxbuf->state = STATE_EOF; 235 break; 236 case STATE_EOF: 237 rxbuf->state = STATE_SOF; 238 if (rx_data == FRAME_EOF || rx_data == rxbuf->checksum) 239 DPRINTF(("frame EOF\n")); 240 else 241 DPRINTF(("BadFrame\n")); 242 break; 243 default: 244 break; 245 } 246 } 247 } 248