1 /* $NetBSD: ipaq_atmelgpio.c,v 1.9 2005/12/11 12:17:31 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Ichiro FUKUHARA (ichiro@ichiro.org). 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 /* 38 * iPAQ uses Atmel microcontroller to service a few of peripheral devices. 39 * This controller connect to UART1 of SA11x0. 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: ipaq_atmelgpio.c,v 1.9 2005/12/11 12:17:31 christos Exp $"); 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/types.h> 48 #include <sys/conf.h> 49 #include <sys/file.h> 50 #include <sys/device.h> 51 #include <sys/kernel.h> 52 #include <sys/kthread.h> 53 #include <sys/malloc.h> 54 55 #include <machine/bus.h> 56 57 #include <hpcarm/dev/ipaq_saipvar.h> 58 #include <hpcarm/dev/ipaq_gpioreg.h> 59 #include <hpcarm/dev/ipaq_atmel.h> 60 #include <hpcarm/dev/ipaq_atmelvar.h> 61 #include <hpcarm/sa11x0/sa11x0_gpioreg.h> 62 #include <hpcarm/sa11x0/sa11x0_comreg.h> 63 #include <hpcarm/sa11x0/sa11x0_reg.h> 64 65 #ifdef ATMEL_DEBUG 66 #define DPRINTF(x) printf x 67 #else 68 #define DPRINTF(x) 69 #endif 70 71 static int atmelgpio_match(struct device *, struct cfdata *, void *); 72 static void atmelgpio_attach(struct device *, struct device *, void *); 73 static int atmelgpio_print(void *, const char *); 74 static int atmelgpio_search(struct device *, struct cfdata *, 75 const int *, void *); 76 static void atmelgpio_init(struct atmelgpio_softc *); 77 78 static void rxtx_data(struct atmelgpio_softc *, int, int, 79 u_int8_t *, struct atmel_rx *); 80 81 CFATTACH_DECL(atmelgpio, sizeof(struct atmelgpio_softc), 82 atmelgpio_match, atmelgpio_attach, NULL, NULL); 83 84 static int 85 atmelgpio_match(parent, cf, aux) 86 struct device *parent; 87 struct cfdata *cf; 88 void *aux; 89 { 90 return (1); 91 } 92 93 static void 94 atmelgpio_attach(parent, self, aux) 95 struct device *parent; 96 struct device *self; 97 void *aux; 98 { 99 struct atmelgpio_softc *sc = (struct atmelgpio_softc *)self; 100 struct ipaq_softc *psc = (struct ipaq_softc *)parent; 101 102 struct atmel_rx *rxbuf; 103 104 printf("\n"); 105 printf("%s: Atmel microcontroller GPIO\n", sc->sc_dev.dv_xname); 106 107 sc->sc_iot = psc->sc_iot; 108 sc->sc_ioh = psc->sc_ioh; 109 sc->sc_parent = (struct ipaq_softc *)parent; 110 111 if (bus_space_map(sc->sc_iot, SACOM1_BASE, SACOM_NPORTS, 0, 112 &sc->sc_ioh)) { 113 printf("%s: unable to map of UART1 registers\n", sc->sc_dev.dv_xname); 114 return; 115 } 116 117 atmelgpio_init(sc); 118 119 #if 1 /* this is sample */ 120 rxtx_data(sc, STATUS_BATTERY, 0, NULL, rxbuf); 121 122 printf("ac_status = %x\n", rxbuf->data[0]); 123 printf("Battery kind = %x\n", rxbuf->data[1]); 124 printf("Voltage = %d mV\n", 125 1000 * (rxbuf->data[3] << 8 | rxbuf->data[2]) /228); 126 printf("Battery Status = %x\n", rxbuf->data[4]); 127 printf("Battery percentage = %d\n", 128 425 * (rxbuf->data[3] << 8 | rxbuf->data[2]) /1000 - 298); 129 #endif 130 131 /* 132 * Attach each devices 133 */ 134 135 config_search_ia(atmelgpio_search, self, "atmelgpioif", NULL); 136 } 137 138 static int 139 atmelgpio_search(parent, cf, ldesc, aux) 140 struct device *parent; 141 struct cfdata *cf; 142 const int *ldesc; 143 void *aux; 144 { 145 if (config_match(parent, cf, NULL) > 0) 146 config_attach(parent, cf, NULL, atmelgpio_print); 147 return 0; 148 } 149 150 151 static int 152 atmelgpio_print(aux, name) 153 void *aux; 154 const char *name; 155 { 156 return (UNCONF); 157 } 158 159 static void 160 atmelgpio_init(sc) 161 struct atmelgpio_softc *sc; 162 { 163 /* 8 bits no parity 1 stop bit */ 164 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR0, CR0_DSS); 165 166 /* Set baud rate 115k */ 167 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR1, 0); 168 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR2, SACOMSPEED(115200)); 169 170 /* RX/TX enable, RX/TX FIFO interrupt enable */ 171 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR3, 172 (CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE)); 173 } 174 175 static void 176 rxtx_data(sc, id, size, buf, rxbuf) 177 struct atmelgpio_softc *sc; 178 int id, size; 179 u_int8_t *buf; 180 struct atmel_rx *rxbuf; 181 { 182 int i, checksum, length, rx_data; 183 u_int8_t data[MAX_SENDSIZE]; 184 185 length = size + FRAME_OVERHEAD_SIZE; 186 187 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & SR0_TFS)) 188 ; 189 190 data[0] = (u_int8_t)FRAME_SOF; 191 data[1] = (u_int8_t)((id << 4) | size); 192 checksum = data[1]; 193 i = 2; 194 while (size--) { 195 data[i++] = *buf; 196 checksum += (u_int8_t)(*buf++); 197 } 198 data[length-1] = checksum; 199 200 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_TNF)) 201 ; 202 i = 0; 203 while (i < length) 204 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_DR, data[i++]); 205 206 delay(10000); 207 #if 0 208 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & 209 (SR0_RID | SR0_RFS))) 210 #endif 211 rxbuf->state = STATE_SOF; 212 while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_RNE) { 213 214 rx_data = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_DR); 215 DPRINTF(("DATA = %x\n", rx_data)); 216 217 switch (rxbuf->state) { 218 case STATE_SOF: 219 if (rx_data == FRAME_SOF) 220 rxbuf->state = STATE_ID; 221 break; 222 case STATE_ID: 223 rxbuf->id = (rx_data & 0xf0) >> 4; 224 rxbuf->len = rx_data & 0x0f; 225 rxbuf->idx = 0; 226 rxbuf->checksum = rx_data; 227 rxbuf->state = (rxbuf->len > 0 ) ? STATE_DATA : STATE_EOF; 228 break; 229 case STATE_DATA: 230 rxbuf->checksum += rx_data; 231 rxbuf->data[rxbuf->idx] = rx_data; 232 if (++rxbuf->idx == rxbuf->len) 233 rxbuf->state = STATE_EOF; 234 break; 235 case STATE_EOF: 236 rxbuf->state = STATE_SOF; 237 if (rx_data == FRAME_EOF || rx_data == rxbuf->checksum) 238 DPRINTF(("frame EOF\n")); 239 else 240 DPRINTF(("BadFrame\n")); 241 break; 242 default: 243 break; 244 } 245 } 246 } 247