1 /* $NetBSD: ipaq_atmelgpio.c,v 1.13 2006/09/28 09:03:46 rjs Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Ichiro FUKUHARA (ichiro@ichiro.org). 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 /* 38 * iPAQ uses Atmel microcontroller to service a few of peripheral devices. 39 * This controller connect to UART1 of SA11x0. 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: ipaq_atmelgpio.c,v 1.13 2006/09/28 09:03:46 rjs Exp $"); 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/types.h> 48 #include <sys/conf.h> 49 #include <sys/file.h> 50 #include <sys/device.h> 51 #include <sys/kernel.h> 52 #include <sys/kthread.h> 53 #include <sys/malloc.h> 54 55 #include <machine/bus.h> 56 57 #include <hpcarm/dev/ipaq_saipvar.h> 58 #include <hpcarm/dev/ipaq_gpioreg.h> 59 #include <hpcarm/dev/ipaq_atmel.h> 60 #include <hpcarm/dev/ipaq_atmelvar.h> 61 62 #include <arm/sa11x0/sa11x0_gpioreg.h> 63 #include <arm/sa11x0/sa11x0_comreg.h> 64 #include <arm/sa11x0/sa11x0_reg.h> 65 66 #ifdef ATMEL_DEBUG 67 #define DPRINTF(x) printf x 68 #else 69 #define DPRINTF(x) 70 #endif 71 72 static int atmelgpio_match(struct device *, struct cfdata *, void *); 73 static void atmelgpio_attach(struct device *, struct device *, void *); 74 static int atmelgpio_print(void *, const char *); 75 static int atmelgpio_search(struct device *, struct cfdata *, 76 const int *, void *); 77 static void atmelgpio_init(struct atmelgpio_softc *); 78 79 static void rxtx_data(struct atmelgpio_softc *, int, int, 80 uint8_t *, struct atmel_rx *); 81 82 CFATTACH_DECL(atmelgpio, sizeof(struct atmelgpio_softc), 83 atmelgpio_match, atmelgpio_attach, NULL, NULL); 84 85 static int 86 atmelgpio_match(struct device *parent, struct cfdata *cf, void *aux) 87 { 88 return (1); 89 } 90 91 static void 92 atmelgpio_attach(struct device *parent, struct device *self, void *aux) 93 { 94 struct atmelgpio_softc *sc = (struct atmelgpio_softc *)self; 95 struct ipaq_softc *psc = (struct ipaq_softc *)parent; 96 97 struct atmel_rx rxbuf; 98 99 printf("\n"); 100 printf("%s: Atmel microcontroller GPIO\n", sc->sc_dev.dv_xname); 101 102 sc->sc_iot = psc->sc_iot; 103 sc->sc_ioh = psc->sc_ioh; 104 sc->sc_parent = (struct ipaq_softc *)parent; 105 106 if (bus_space_map(sc->sc_iot, SACOM1_BASE, SACOM_NPORTS, 0, 107 &sc->sc_ioh)) { 108 printf("%s: unable to map of UART1 registers\n", sc->sc_dev.dv_xname); 109 return; 110 } 111 112 atmelgpio_init(sc); 113 114 rxbuf.idx = 0; 115 rxbuf.len = 0; 116 117 #if 1 /* this is sample */ 118 rxtx_data(sc, STATUS_BATTERY, 0, NULL, &rxbuf); 119 120 printf("ac_status = %x\n", rxbuf.data[0]); 121 printf("Battery kind = %x\n", rxbuf.data[1]); 122 printf("Voltage = %d mV\n", 123 1000 * (rxbuf.data[3] << 8 | rxbuf.data[2]) /228); 124 printf("Battery Status = %x\n", rxbuf.data[4]); 125 printf("Battery percentage = %d\n", 126 425 * (rxbuf.data[3] << 8 | rxbuf.data[2]) /1000 - 298); 127 #endif 128 129 rxtx_data(sc, READ_IIC, 0, NULL, &rxbuf); 130 131 /* 132 * Attach each devices 133 */ 134 135 config_search_ia(atmelgpio_search, self, "atmelgpioif", NULL); 136 } 137 138 static int 139 atmelgpio_search(struct device *parent, struct cfdata *cf, const int *ldesc, 140 void *aux) 141 { 142 if (config_match(parent, cf, NULL) > 0) 143 config_attach(parent, cf, NULL, atmelgpio_print); 144 return 0; 145 } 146 147 148 static int 149 atmelgpio_print(void *aux, const char *name) 150 { 151 return (UNCONF); 152 } 153 154 static void 155 atmelgpio_init(struct atmelgpio_softc *sc) 156 { 157 /* 8 bits no parity 1 stop bit */ 158 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR0, CR0_DSS); 159 160 /* Set baud rate 115k */ 161 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR1, 0); 162 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR2, SACOMSPEED(115200)); 163 164 /* RX/TX enable, RX/TX FIFO interrupt enable */ 165 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR3, 166 (CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE)); 167 } 168 169 static void 170 rxtx_data(struct atmelgpio_softc *sc, int id, int size, uint8_t *buf, 171 struct atmel_rx *rxbuf) 172 { 173 int i, checksum, length, rx_data; 174 uint8_t data[MAX_SENDSIZE]; 175 176 length = size + FRAME_OVERHEAD_SIZE; 177 178 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & SR0_TFS)) 179 ; 180 181 data[0] = (uint8_t)FRAME_SOF; 182 data[1] = (uint8_t)((id << 4) | size); 183 checksum = data[1]; 184 i = 2; 185 while (size--) { 186 data[i++] = *buf; 187 checksum += (uint8_t)(*buf++); 188 } 189 data[length-1] = checksum; 190 191 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_TNF)) 192 ; 193 i = 0; 194 while (i < length) 195 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_DR, data[i++]); 196 197 delay(10000); 198 #if 0 199 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & 200 (SR0_RID | SR0_RFS))) 201 #endif 202 rxbuf->state = STATE_SOF; 203 while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_RNE) { 204 205 rx_data = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_DR); 206 DPRINTF(("DATA = %x\n", rx_data)); 207 208 switch (rxbuf->state) { 209 case STATE_SOF: 210 if (rx_data == FRAME_SOF) 211 rxbuf->state = STATE_ID; 212 break; 213 case STATE_ID: 214 rxbuf->id = (rx_data & 0xf0) >> 4; 215 rxbuf->len = rx_data & 0x0f; 216 rxbuf->idx = 0; 217 rxbuf->checksum = rx_data; 218 rxbuf->state = (rxbuf->len > 0 ) ? STATE_DATA : STATE_EOF; 219 break; 220 case STATE_DATA: 221 rxbuf->checksum += rx_data; 222 rxbuf->data[rxbuf->idx] = rx_data; 223 if (++rxbuf->idx == rxbuf->len) 224 rxbuf->state = STATE_EOF; 225 break; 226 case STATE_EOF: 227 rxbuf->state = STATE_SOF; 228 if (rx_data == FRAME_EOF || rx_data == rxbuf->checksum) 229 DPRINTF(("frame EOF\n")); 230 else 231 DPRINTF(("BadFrame\n")); 232 break; 233 default: 234 break; 235 } 236 } 237 } 238