1 /* -*-C++-*- $NetBSD: sh4_dev.cpp,v 1.1 2002/02/11 17:08:59 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <hpcboot.h> 40 #include <hpcmenu.h> 41 #include <console.h> 42 43 #include <sh3/sh_arch.h> //suspend/resumeIntr 44 45 #include <sh3/cpu/sh4.h> 46 #include <sh3/dev/sh_dev.h> 47 48 #include <sh3/dev/sh.h> 49 #include <sh3/dev/hd64465.h> 50 #include <sh3/dev/mq100.h> 51 52 struct SH4dev::intr_priority SH4dev::_ipr_table[] = { 53 // SH7750, SH7750S 54 { "TMU0", SH4_IPRA, 12 }, 55 { "TMU1", SH4_IPRA, 8 }, 56 { "TMU2", SH4_IPRA, 4 }, 57 { "RTC", SH4_IPRA, 0 }, 58 { "WDT", SH4_IPRB, 12 }, 59 { "REF", SH4_IPRB, 8 }, 60 { "SCI", SH4_IPRB, 4 }, 61 { "reserve", SH4_IPRB, 0 }, 62 { "GPIO", SH4_IPRC, 12 }, 63 { "DMAC", SH4_IPRC, 8 }, 64 { "SCIF", SH4_IPRC, 4 }, 65 { "H-UDI", SH4_IPRC, 0 }, 66 // SH7750S 67 { "IRL0", SH4_IPRD, 12 }, 68 { "IRL1", SH4_IPRD, 8 }, 69 { "IRL2", SH4_IPRD, 4 }, 70 { "IRL3", SH4_IPRD, 0 }, 71 { 0, 0, 0} /* terminator */ 72 }; 73 74 void 75 SH4dev::dump(u_int8_t bit) 76 { 77 int kmode; 78 79 super::dump(bit); 80 81 kmode = SetKMode(1); 82 if (bit & DUMP_DEV) { 83 // INTC 84 icu_dump(); 85 } 86 87 if (bit & DUMP_COMPANION) { 88 // HD64465 89 hd64465_dump(); 90 } 91 92 if (bit & DUMP_VIDEO) { 93 // MQ100 94 mq100_dump(); 95 } 96 97 SetKMode(kmode); 98 99 } 100 101 // INTC 102 void 103 SH4dev::icu_dump() 104 { 105 #define ON(x, c) ((x) & (c) ? check[1] : check[0]) 106 #define _(n) DPRINTF((TEXT("%S %S "), #n, ON(r, SH4_ICR_ ## n))) 107 static const char *check[] = { "[_]", "[x]" }; 108 u_int16_t r; 109 110 super::icu_dump_priority(_ipr_table); 111 112 r = _reg_read_2(SH4_ICR); 113 DPRINTF((TEXT("ICR: "))); 114 _(NMIL);_(MAI);_(NMIB);_(NMIE);_(IRLM); 115 DPRINTF((TEXT("0x%04x\n"), r)); 116 117 #if 0 // monitoring SH4 interrupt request. 118 // disable SH3 internal devices interrupt. 119 suspendIntr(); 120 _reg_write_2(SH4_IPRA, 0); 121 _reg_write_2(SH4_IPRB, 0); 122 _reg_write_2(SH4_IPRC, 0); 123 // _reg_write_2(SH4_IPRD, 0); SH7709S only. 124 resumeIntr(0); // all interrupts enable. 125 while (1) { 126 DPRINTF((TEXT("%04x ", _reg_read_2(HD64465_NIRR)))); 127 bitdisp(_reg_read_4(SH4_INTEVT)); 128 } 129 /* NOTREACHED */ 130 #endif 131 #undef _ 132 #undef ON 133 } 134 135 void 136 SH4dev::hd64465_dump() 137 { 138 139 DPRINTF((TEXT("<<<HD64465>>>\n"))); 140 if (_reg_read_2(HD64465_SDIDR) != 0x8122) { 141 DPRINTF((TEXT("not found.\n"))); 142 return; 143 } 144 145 DPRINTF((TEXT("SMSCR: "))); // standby 146 bitdisp(_reg_read_2(HD64465_SMSCR)); 147 DPRINTF((TEXT("SPCCR: "))); // clock 148 bitdisp(_reg_read_2(HD64465_SPCCR)); 149 150 DPRINTF((TEXT("\nNIRR: "))); // request 151 bitdisp(_reg_read_2(HD64465_NIRR)); 152 DPRINTF((TEXT("NIMR: "))); // mask 153 bitdisp(_reg_read_2(HD64465_NIMR)); 154 DPRINTF((TEXT("NITR: "))); // trigger 155 bitdisp(_reg_read_2(HD64465_NITR)); 156 157 #if 0 // monitoring HD64465 interrupt request. 158 suspendIntr(); 159 while (1) 160 bitdisp(_reg_read_2(HD64465_NIRR)); 161 /* NOTREACHED */ 162 #endif 163 } 164 165 void 166 SH4dev::mq100_dump() 167 { 168 u_int32_t a, e; 169 int i; 170 171 // This is HPW650PA test. 640 * 480 linebytes 1280. 172 DPRINTF((TEXT("<<<MQ100/HD64464>>>\n"))); 173 a = MQ100_FB_BASE + 0x4b000; 174 e = a + 640 * 480 * sizeof(u_int16_t); 175 while (a < e) { 176 for (i = 0; i < 640; i++, a += sizeof(u_int16_t)) 177 _reg_write_2(a, ~_reg_read_2(a) & 0xffff); 178 } 179 } 180