1; $NetBSD: arm_sa1100_asm.asm,v 1.1 2010/04/06 16:20:28 nonaka Exp $ 2; 3; Copyright (c) 2001 The NetBSD Foundation, Inc. 4; All rights reserved. 5; 6; This code is derived from software contributed to The NetBSD Foundation 7; by UCHIYAMA Yasushi. 8; 9; Redistribution and use in source and binary forms, with or without 10; modification, are permitted provided that the following conditions 11; are met: 12; 1. Redistributions of source code must retain the above copyright 13; notice, this list of conditions and the following disclaimer. 14; 2. Redistributions in binary form must reproduce the above copyright 15; notice, this list of conditions and the following disclaimer in the 16; documentation and/or other materials provided with the distribution. 17; 3. All advertising materials mentioning features or use of this software 18; must display the following acknowledgement: 19; This product includes software developed by the NetBSD 20; Foundation, Inc. and its contributors. 21; 4. Neither the name of The NetBSD Foundation nor the names of its 22; contributors may be used to endorse or promote products derived 23; from this software without specific prior written permission. 24; 25; THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26; ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29; BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35; POSSIBILITY OF SUCH DAMAGE. 36; 37 38; 39;armasm.exe $(InputPath) 40;arm.obj 41; 42 43 AREA |.text|, CODE, PIC 44 45 ; FlatJump_sa1100 (kaddr_t bootinfo, kaddr_t pvec, kaddr_t stack 46 ; kaddr_t jump) 47 ; bootinfo boot information block address. 48 ; pvec page vector of kernel. 49 ; stack physical address of stack 50 ; jump physical address of boot function 51 ; *** MMU and pipeline behavier are SA-1100 specific. *** 52 EXPORT |FlatJump_sa1100| 53|FlatJump_sa1100| PROC 54 ; disable interrupt 55 mrs r4, cpsr 56 orr r4, r4, #0xc0 57 msr cpsr, r4 58 ; disable MMU, I/D-Cache, Writebuffer. 59 ; interrupt vector address is 0xffff0000 60 ; 32bit exception handler/address range. 61 ldr r4, [pc, #24] 62 ; Disable WB/Cache/MMU 63 mcr p15, 0, r4, c1, c0, 0 64 ; Invalidate I/D-cache. 65 mcr p15, 0, r4, c7, c7, 0 ; Fetch translated fetch 66 ; Invalidate TLB entries. 67 mcr p15, 0, r4, c8, c7, 0 ; Fetch translated decode 68 ; jump to kernel entry physical address. 69 mov pc, r3 ; Fetch translated execute 70 ; NOTREACHED 71 nop ; Fetch nontranslated cache access 72 nop ; Fetch nontranslated writeback 73 mov pc, lr ; Fetch nontranslated 74 DCD 0x00002030 75 ENDP ; |FlatJump_sa1100| 76; 77; UART test 78; 79 ; boot_func (uint32_t mapaddr, uint32_t bootinfo, uint32_t flags) 80 ; 81 EXPORT |boot_func_sa1100| 82|boot_func_sa1100| PROC 83 nop ; Cop15 hazard 84 nop ; Cop15 hazard 85 nop ; Cop15 hazard 86 mov sp, r2 ; set bootloader stack 87; mov r4, r0 88; mov r5, r1 89; bl colorbar 90; mov r0, r4 91; mov r1, r5 92 bl boot_sa1100 93 nop ; NOTREACHED 94 nop 95 ENDP ; |boot_func_sa1100| 96 97 EXPORT |colorbar| 98|colorbar| PROC 99 stmfd sp!, {r4-r7, lr} 100 adr r4, |$FBADDR| 101 ldr r4, [r4] 102 103 mov r7, #8 104 add r0, r0, r7 105|color_loop| 106 mov r6, r0 107 and r6, r6, #7 108 orr r6, r6, r6, LSL #8 109 orr r6, r6, r6, LSL #16 110 add r5, r4, #0x9600 111|fb_loop| 112 str r6, [r4], #4 113 cmp r4, r5 114 blt |fb_loop| 115 116 subs r7, r7, #1 117 bne |color_loop| 118 119 ldmfd sp!, {r4-r7, pc} 120|$FBADDR| 121 DCD 0xc0003000 ; use WindowsCE default. 122 ENDP ; |colorbar| 123 124 EXPORT |boot_sa1100| 125|boot_sa1100| PROC 126; 127; UART test code 128; 129; ; print boot_info address (r0) and page_vector start address (r1). 130; mov r4, r0 131; mov r5, r1 132; mov r0, #'I' 133; bl btputc 134; mov r0, r4 135; bl hexdump 136; mov r0, #'P' 137; bl btputc 138; mov r0, r5 139; bl hexdump 140; mov r7, r4 141; mov r2, r5 ; start 142 143 mov r7, r0 ; if enabled above debug print, remove this. 144 mov r2, r1 ; if enabled above debug print, remove this. 145|page_loop| 146 mvn r0, #0 ; ~0 147 cmp r2, r0 148 beq |page_end| ; if (next == ~0) goto page_end 149 150 mov r1, r2 ; p = next 151 ldr r2, [r1] ; next 152 ldr r3, [r1, #4] ; src 153 ldr r4, [r1, #8] ; dst 154 ldr r5, [r1, #12] ; sz 155 156 cmp r3, r0 157 add r6, r4, r5 ; end address 158 bne |page_memcpy4| ; if (src != ~0) goto page_memcpy4 159 160 mov r0, #0 161|page_memset| ; memset (dst, 0, sz) uncached. 162 str r0, [r4], #4 163 cmp r4, r6 164 blt |page_memset| 165 b |page_loop| 166 167|page_memcpy4| ; memcpy (dst, src, sz) uncached. 168 ldr r0, [r3], #4 169 ldr r5, [r3], #4 170 str r0, [r4], #4 171 cmp r4, r6 172 strlt r5, [r4], #4 173 cmplt r4, r6 174 blt |page_memcpy4| 175 176 b |page_loop| 177|page_end| 178 ; 179 ; jump to kernel 180 ; 181; mov r0, #'E' 182; bl btputc 183; ldr r0, [r7] 184; bl hexdump 185; ldr r0, [r7] 186; ldr r0, [r0] 187; bl hexdump 188 189 ; set stack pointer 190 mov r5, #4096 191 add r6, r6, #8192 192 sub r5, r5, #1 193 bic sp, r6, r5 194 195 ; set bootargs 196 ldr r4, [r7] 197 ldr r0, [r7, #4] 198 ldr r1, [r7, #8] 199 ldr r2, [r7, #12] 200 mov pc, r4 201 ; NOTREACHED 202 203|infinite_loop| 204 nop 205 nop 206 nop 207 nop 208 nop 209 b |infinite_loop| 210 ENDP ; |boot| 211 212|btputc| PROC 213 adr r1, |$UARTTXBSY| 214 ldr r1, [r1] 215|btputc_busy| 216 ldr r2, [r1] 217 and r2, r2, #1 218 cmp r2, #1 219 beq |btputc_busy| 220 adr r1, |$UARTTXADR| 221 ldr r1, [r1] 222 str r0, [r1] 223 mov pc, lr 224 ENDP ;|btputc| 225 226|hexdump| PROC 227 stmfd sp!, {r4-r5, lr} 228 mov r4, r0 229 mov r0, #0x30 230 bl btputc 231 mov r0, #0x78 232 bl btputc 233 mov r0, r4 234 ; Transmit register address 235 adr r1, |$UARTTXADR| 236 ldr r1, [r1] 237 ; Transmit busy register address 238 adr r2, |$UARTTXBSY| 239 ldr r2, [r2] 240 mov r5, #8 241|hex_loop| 242 mov r3, r0, LSR #28 243 cmp r3, #9 244 addgt r3, r3, #0x41 - 10 245 addle r3, r3, #0x30 246|hex_busyloop| 247 ldr r4, [r2] 248 and r4, r4, #1 249 cmp r4, #1 250 beq |hex_busyloop| 251 str r3, [r1] 252 mov r0, r0, LSL #4 253 subs r5, r5, #1 254 bne |hex_loop| 255 mov r0, #0x0d 256 bl btputc 257 mov r0, #0x0a 258 bl btputc 259 ldmfd sp!, {r4-r5, pc} 260 ENDP ;|hexdump| 261 262|$UARTTXADR| 263 DCD 0x80050014 264|$UARTTXBSY| 265 DCD 0x80050020 266 267 EXPORT |boot_func_end_sa1100| [ DATA ] 268|boot_func_end_sa1100| DCD 0x0 269 270 END 271