1; $NetBSD: arm_pxa2x0_asm.asm,v 1.1 2010/04/06 16:20:28 nonaka Exp $ 2; 3; Copyright (c) 2001 The NetBSD Foundation, Inc. 4; All rights reserved. 5; 6; This code is derived from software contributed to The NetBSD Foundation 7; by UCHIYAMA Yasushi. 8; 9; Redistribution and use in source and binary forms, with or without 10; modification, are permitted provided that the following conditions 11; are met: 12; 1. Redistributions of source code must retain the above copyright 13; notice, this list of conditions and the following disclaimer. 14; 2. Redistributions in binary form must reproduce the above copyright 15; notice, this list of conditions and the following disclaimer in the 16; documentation and/or other materials provided with the distribution. 17; 3. All advertising materials mentioning features or use of this software 18; must display the following acknowledgement: 19; This product includes software developed by the NetBSD 20; Foundation, Inc. and its contributors. 21; 4. Neither the name of The NetBSD Foundation nor the names of its 22; contributors may be used to endorse or promote products derived 23; from this software without specific prior written permission. 24; 25; THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26; ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29; BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35; POSSIBILITY OF SUCH DAMAGE. 36; 37 38 AREA |.text|, CODE, PIC 39 40; 41;armasm.exe $(InputPath) 42;arm.obj 43; 44 ; FlatJump_pxa2x0 (kaddr_t bootinfo, kaddr_t pvec, kaddr_t stack 45 ; kaddr_t jump) 46 ; bootinfo boot information block address. 47 ; pvec page vector of kernel. 48 ; stack physical address of stack 49 ; jump physical address of boot function 50 EXPORT |FlatJump_pxa2x0| 51|FlatJump_pxa2x0| PROC 52 ; disable interrupt 53 mrs r4, cpsr 54 orr r4, r4, #0xc0 55 msr cpsr, r4 56 ; Invalidate I/D-cache. 57 mcr p15, 0, r4, c7, c7, 0 58 mov r4, r4 59 sub pc, pc, #4 60 ; disable MMU, I/D-Cache, Writebuffer. 61 ; interrupt vector address is 0xffff0000 62 ; 32bit exception handler/address range. 63 ldr r4, [pc, #20] 64 ; Disable WB/Cache/MMU 65 mcr p15, 0, r4, c1, c0, 0 66 ; Invalidate TLB entries. 67 mcr p15, 0, r4, c8, c7, 0 68 mov r4, r4 ; wait for it to complete 69 sub pc, pc, #4 ; branch to next insn 70 mov pc, r3 71 ; NOTREACHED 72 mov pc, lr 73 DCD 0x00002030 74 ENDP ; |FlatJump_pxa2x0| 75; 76; UART test 77; 78 ; boot_func (uint32_t mapaddr, uint32_t bootinfo, uint32_t flags) 79 ; 80 EXPORT |boot_func_pxa2x0| 81|boot_func_pxa2x0| PROC 82 nop ; cop15 hazard 83 nop ; cop15 hazard 84 nop ; cop15 hazard 85 mov sp, r2 ; set bootloader stack 86 bl boot_pxa2x0 87 nop ; NOTREACHED 88 nop 89 ENDP ; |boot_func_pxa2x0| 90 91 EXPORT |boot_pxa2x0| 92|boot_pxa2x0| PROC 93 mov r4, r0 94 mov r5, r1 95 96; 97; UART test code 98; 99; ; print boot_info address (r0) and page_vector start address (r1). 100; mov r0, #'I' 101; bl btputc 102; mov r0, r4 103; bl hexdump 104; mov r0, #'P' 105; bl btputc 106; mov r0, r5 107; bl hexdump 108 109 mov r7, r4 110 mov r2, r5 ; start 111|page_loop| 112 mvn r0, #0 ; ~0 113 cmp r2, r0 114 beq |page_end| ; if (next == ~0) goto page_end 115 116 mov r1, r2 ; p = next 117 ldr r2, [r1] ; next 118 ldr r3, [r1, #4] ; src 119 ldr r4, [r1, #8] ; dst 120 ldr r5, [r1, #12] ; sz 121 122 bic r4, r4, #0xff000000 123 orr r4, r4, #0xa0000000 124 125 cmp r3, r0 126 add r6, r4, r5 ; end address 127 bne |page_memcpy4| ; if (src != ~0) goto page_memcpy4 128 129 mov r0, #0 130|page_memset| ; memset (dst, 0, sz) uncached. 131 str r0, [r4], #4 132 cmp r4, r6 133 blt |page_memset| 134 b |page_loop| 135 136|page_memcpy4| ; memcpy (dst, src, sz) uncached. 137 ldr r0, [r3], #4 138 ldr r5, [r3], #4 139 str r0, [r4], #4 140 cmp r4, r6 141 strlt r5, [r4], #4 142 cmplt r4, r6 143 blt |page_memcpy4| 144 145 b |page_loop| 146|page_end| 147 ; 148 ; jump to kernel 149 ; 150; mov r0, #'E' 151; bl btputc 152; ldr r0, [r7] 153; bl hexdump 154 155 ; set stack pointer 156 mov r5, #4096 157 add r6, r6, #8192 158 sub r5, r5, #1 159 bic sp, r6, r5 160 161 ; set bootargs 162 ldr r4, [r7] 163 ldr r0, [r7, #4] 164 ldr r1, [r7, #8] 165 ldr r2, [r7, #12] 166 bic r4, r4, #0xff000000 167 orr r4, r4, #0xa0000000 168 mov pc, r4 169 ; NOTREACHED 170 171|infinite_loop| 172 nop 173 nop 174 nop 175 nop 176 nop 177 b |infinite_loop| 178 ENDP ; |boot| 179 180|btputc| PROC 181 adr r1, |$UARTTXBSY| 182 ldr r1, [r1] 183|btputc_busy| 184 ldr r2, [r1] 185 ands r2, r2, #0x20 186 beq |btputc_busy| 187 adr r1, |$UARTTXADR| 188 ldr r1, [r1] 189 str r0, [r1] 190 adr r1, |$UARTINTR| 191 ldr r1, [r1] 192 mov pc, lr 193 ENDP ;|btputc| 194 195|hexdump| PROC 196 stmfd sp!, {r4-r5, lr} 197 mov r4, r0 198 mov r0, #0x30 199 bl btputc 200 mov r0, #0x78 201 bl btputc 202 mov r0, r4 203 ; Transmit register address 204 adr r1, |$UARTTXADR| 205 ldr r1, [r1] 206 ; Transmit busy register address 207 adr r2, |$UARTTXBSY| 208 ldr r2, [r2] 209 mov r5, #8 210|hex_loop| 211 mov r3, r0, LSR #28 212 cmp r3, #9 213 addgt r3, r3, #0x41 - 10 214 addle r3, r3, #0x30 215|hex_busyloop| 216 ldr r4, [r2] 217 ands r4, r4, #0x20 218 beq |hex_busyloop| 219 str r3, [r1] 220 adr r4, |$UARTINTR| 221 ldr r4, [r4] 222 mov r0, r0, LSL #4 223 subs r5, r5, #1 224 bne |hex_loop| 225 mov r0, #0x0d 226 bl btputc 227 mov r0, #0x0a 228 bl btputc 229 ldmfd sp!, {r4-r5, pc} 230 ENDP ;|hexdump| 231 232 ; FFUART 233|$UARTTXADR| 234 DCD 0x40100000 235|$UARTTXBSY| 236 DCD 0x40100014 237|$UARTINTR| 238 DCD 0x40100008 239 240 EXPORT |boot_func_end_pxa2x0| [ DATA ] 241|boot_func_end_pxa2x0| DCD 0x0 242 243 END 244