xref: /netbsd-src/sys/arch/hp300/include/cpu.h (revision e5548b402ae4c44fb816de42c7bba9581ce23ef5)
1 /*	$NetBSD: cpu.h,v 1.47 2005/12/11 12:17:19 christos Exp $	*/
2 
3 /*
4  * Copyright (c) 1982, 1990, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * the Systems Programming Group of the University of Utah Computer
9  * Science Department.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
36  *
37  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
38  */
39 /*
40  * Copyright (c) 1988 University of Utah.
41  *
42  * This code is derived from software contributed to Berkeley by
43  * the Systems Programming Group of the University of Utah Computer
44  * Science Department.
45  *
46  * Redistribution and use in source and binary forms, with or without
47  * modification, are permitted provided that the following conditions
48  * are met:
49  * 1. Redistributions of source code must retain the above copyright
50  *    notice, this list of conditions and the following disclaimer.
51  * 2. Redistributions in binary form must reproduce the above copyright
52  *    notice, this list of conditions and the following disclaimer in the
53  *    documentation and/or other materials provided with the distribution.
54  * 3. All advertising materials mentioning features or use of this software
55  *    must display the following acknowledgement:
56  *	This product includes software developed by the University of
57  *	California, Berkeley and its contributors.
58  * 4. Neither the name of the University nor the names of its contributors
59  *    may be used to endorse or promote products derived from this software
60  *    without specific prior written permission.
61  *
62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
72  * SUCH DAMAGE.
73  *
74  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
75  *
76  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
77  */
78 
79 #ifndef _HP300_CPU_H_
80 #define	_HP300_CPU_H_
81 
82 #if defined(_KERNEL)
83 
84 #if defined(_KERNEL_OPT)
85 #include "opt_lockdebug.h"
86 #endif
87 
88 /*
89  * Exported definitions unique to hp300/68k cpu support.
90  */
91 
92 /*
93  * Get common m68k CPU definitions.
94  */
95 #include <m68k/cpu.h>
96 #include <machine/hp300spu.h>
97 
98 /*
99  * Get interrupt glue.
100  */
101 #include <machine/intr.h>
102 
103 #include <sys/cpu_data.h>
104 struct cpu_info {
105 	struct cpu_data ci_data;	/* MI per-cpu data */
106 };
107 
108 extern struct cpu_info cpu_info_store;
109 
110 #define	curcpu()	(&cpu_info_store)
111 
112 /*
113  * definitions of cpu-dependent requirements
114  * referenced in generic code
115  */
116 #define	cpu_swapin(p)			/* nothing */
117 #define	cpu_swapout(p)			/* nothing */
118 #define	cpu_number()			0
119 
120 void	cpu_proc_fork(struct proc *, struct proc *);
121 
122 /*
123  * Arguments to hardclock and gatherstats encapsulate the previous
124  * machine state in an opaque clockframe.  One the hp300, we use
125  * what the hardware pushes on an interrupt (frame format 0).
126  */
127 struct clockframe {
128 	u_short	sr;		/* sr at time of interrupt */
129 	u_long	pc;		/* pc at time of interrupt */
130 	u_short	vo;		/* vector offset (4-word frame) */
131 };
132 
133 #define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
134 #define	CLKF_BASEPRI(framep)	(((framep)->sr & PSL_IPL) == 0)
135 #define	CLKF_PC(framep)		((framep)->pc)
136 #if 0
137 /* We would like to do it this way... */
138 #define	CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
139 #else
140 /* but until we start using PSL_M, we have to do this instead */
141 #define	CLKF_INTR(framep)	(0)	/* XXX */
142 #endif
143 
144 
145 /*
146  * Preempt the current process if in interrupt from user mode,
147  * or after the current trap/syscall if in system mode.
148  */
149 extern int want_resched;	/* resched() was called */
150 #define	need_resched(ci)	{ want_resched++; aston(); }
151 
152 /*
153  * Give a profiling tick to the current process when the user profiling
154  * buffer pages are invalid.  On the hp300, request an ast to send us
155  * through trap, marking the proc as needing a profiling tick.
156  */
157 #define	need_proftick(p)	{ (p)->p_flag |= P_OWEUPC; aston(); }
158 
159 /*
160  * Notify the current process (p) that it has a signal pending,
161  * process as soon as possible.
162  */
163 #define	signotify(p)	aston()
164 
165 extern int astpending;		/* need to trap before returning to user mode */
166 #define aston() (astpending++)
167 
168 #endif /* _KERNEL */
169 
170 /*
171  * CTL_MACHDEP definitions.
172  */
173 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
174 #define	CPU_MAXID		2	/* number of valid machdep ids */
175 
176 #define CTL_MACHDEP_NAMES { \
177 	{ 0, 0 }, \
178 	{ "console_device", CTLTYPE_STRUCT }, \
179 }
180 
181 /*
182  * The rest of this should probably be moved to <machine/hp300spu.h>,
183  * although some of it could probably be put into generic 68k headers.
184  */
185 
186 #ifdef _KERNEL
187 extern	char *intiobase, *intiolimit;
188 extern	void (*vectab[])(void);
189 
190 struct frame;
191 struct fpframe;
192 struct pcb;
193 
194 /* locore.s functions */
195 void	m68881_save(struct fpframe *);
196 void	m68881_restore(struct fpframe *);
197 int	suline(caddr_t, caddr_t);
198 void	savectx(struct pcb *);
199 void	switch_exit(struct lwp *);
200 void	switch_lwp_exit(struct lwp *);
201 void	proc_trampoline(void);
202 void	loadustp(int);
203 
204 void	doboot(void) __attribute__((__noreturn__));
205 void	ecacheon(void);
206 void	ecacheoff(void);
207 
208 /* clock.c functions */
209 void	hp300_calibrate_delay(void);
210 
211 /* machdep.c functions */
212 int	badaddr(caddr_t);
213 int	badbaddr(caddr_t);
214 
215 /* sys_machdep.c functions */
216 int	cachectl1(unsigned long, vaddr_t, size_t, struct proc *);
217 
218 /* vm_machdep.c functions */
219 void	physaccess(caddr_t, caddr_t, int, int);
220 void	physunaccess(caddr_t, int);
221 int	kvtop(caddr_t);
222 
223 /* what is this supposed to do? i.e. how is it different than startrtclock? */
224 #define	enablertclock()
225 
226 #endif
227 
228 /* physical memory sections */
229 #define	ROMBASE		(0x00000000)
230 #define	INTIOBASE	(0x00400000)
231 #define	INTIOTOP	(0x00600000)
232 #define	EXTIOBASE	(0x00600000)
233 #define	EXTIOTOP	(0x20000000)
234 #define	MAXADDR		(0xFFFFF000)
235 
236 /*
237  * Internal IO space:
238  *
239  * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
240  *
241  * Internal IO space is mapped in the kernel from ``intiobase'' to
242  * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
243  * conversion between physical and kernel virtual addresses is easy.
244  */
245 #define	ISIIOVA(va) \
246 	((char *)(va) >= intiobase && (char *)(va) < intiolimit)
247 #define	IIOV(pa)	((int)(pa)-INTIOBASE+(int)intiobase)
248 #define	IIOP(va)	((int)(va)-(int)intiobase+INTIOBASE)
249 #define	IIOPOFF(pa)	((int)(pa)-INTIOBASE)
250 #define	IIOMAPSIZE	btoc(INTIOTOP-INTIOBASE)	/* 2mb */
251 
252 /*
253  * External IO space:
254  *
255  * DIO ranges from select codes 0-63 at physical addresses given by:
256  *	0x600000 + (sc - 32) * 0x10000
257  * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
258  * their control space and the remaining areas, [0x200000-0x400000) and
259  * [0x800000-0x1000000), are for additional space required by a card;
260  * e.g. a display framebuffer.
261  *
262  * DIO-II ranges from select codes 132-255 at physical addresses given by:
263  *	0x1000000 + (sc - 132) * 0x400000
264  * The address range of DIO-II space is thus [0x1000000-0x20000000).
265  *
266  * DIO/DIO-II space is too large to map in its entirety, instead devices
267  * are mapped into kernel virtual address space allocated from a range
268  * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
269  */
270 #define	DIOBASE		(0x600000)
271 #define	DIOTOP		(0x1000000)
272 #define	DIOCSIZE	(0x10000)
273 #define	DIOIIBASE	(0x01000000)
274 #define	DIOIITOP	(0x20000000)
275 #define	DIOIICSIZE	(0x00400000)
276 
277 /*
278  * HP MMU
279  */
280 #define	MMUBASE		IIOPOFF(0x5F4000)
281 #define	MMUSSTP		0x0
282 #define	MMUUSTP		0x4
283 #define	MMUTBINVAL	0x8
284 #define	MMUSTAT		0xC
285 #define	MMUCMD		MMUSTAT
286 
287 #define	MMU_UMEN	0x0001	/* enable user mapping */
288 #define	MMU_SMEN	0x0002	/* enable supervisor mapping */
289 #define	MMU_CEN		0x0004	/* enable data cache */
290 #define	MMU_BERR	0x0008	/* bus error */
291 #define	MMU_IEN		0x0020	/* enable instruction cache */
292 #define	MMU_FPE		0x0040	/* enable 68881 FP coprocessor */
293 #define	MMU_WPF		0x2000	/* write protect fault */
294 #define	MMU_PF		0x4000	/* page fault */
295 #define	MMU_PTF		0x8000	/* page table fault */
296 
297 #define	MMU_FAULT	(MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
298 #define	MMU_ENAB	(MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
299 
300 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
301 #define M68K_CACHEOPS_MACHDEP
302 #endif
303 
304 #ifdef CACHE_HAVE_PAC
305 #define M68K_CACHEOPS_MACHDEP_PCIA
306 #endif
307 
308 #ifdef CACHE_HAVE_VAC
309 #define M68K_CACHEOPS_MACHDEP_DCIA
310 #define M68K_CACHEOPS_MACHDEP_DCIS
311 #define M68K_CACHEOPS_MACHDEP_DCIU
312 #define M68K_CACHEOPS_MACHDEP_TBIA
313 #define M68K_CACHEOPS_MACHDEP_TBIS
314 #define M68K_CACHEOPS_MACHDEP_TBIAS
315 #define M68K_CACHEOPS_MACHDEP_TBIAU
316 #endif
317 
318 #endif /* _HP300_CPU_H_ */
319