xref: /netbsd-src/sys/arch/hp300/include/cpu.h (revision daf6c4152fcddc27c445489775ed1f66ab4ea9a9)
1 /*	$NetBSD: cpu.h,v 1.65 2011/02/08 20:20:13 rmind Exp $	*/
2 
3 /*
4  * Copyright (c) 1988 University of Utah.
5  * Copyright (c) 1982, 1990, 1993
6  *	The Regents of the University of California.  All rights reserved.
7  *
8  * This code is derived from software contributed to Berkeley by
9  * the Systems Programming Group of the University of Utah Computer
10  * Science Department.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  * 3. Neither the name of the University nor the names of its contributors
21  *    may be used to endorse or promote products derived from this software
22  *    without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  *
36  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
37  *
38  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
39  */
40 
41 #ifndef _HP300_CPU_H_
42 #define	_HP300_CPU_H_
43 
44 #if defined(_KERNEL)
45 
46 #if defined(_KERNEL_OPT)
47 #include "opt_lockdebug.h"
48 #endif
49 
50 /*
51  * Exported definitions unique to hp300/68k cpu support.
52  */
53 
54 /*
55  * Get common m68k CPU definitions.
56  */
57 #include <m68k/cpu.h>
58 #include <machine/hp300spu.h>
59 
60 /*
61  * Get interrupt glue.
62  */
63 #include <machine/intr.h>
64 
65 /*
66  * Arguments to hardclock and gatherstats encapsulate the previous
67  * machine state in an opaque clockframe.  One the hp300, we use
68  * what the hardware pushes on an interrupt (frame format 0).
69  */
70 struct clockframe {
71 	u_short	sr;		/* sr at time of interrupt */
72 	u_long	pc;		/* pc at time of interrupt */
73 	u_short	vo;		/* vector offset (4-word frame) */
74 };
75 
76 #define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
77 #define	CLKF_PC(framep)		((framep)->pc)
78 #if 0
79 /* We would like to do it this way... */
80 #define	CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
81 #else
82 /* but until we start using PSL_M, we have to do this instead */
83 #include <machine/intr.h>
84 #define	CLKF_INTR(framep)	(idepth > 1)	/* XXX */
85 #endif
86 
87 
88 /*
89  * Preempt the current process if in interrupt from user mode,
90  * or after the current trap/syscall if in system mode.
91  */
92 #define	cpu_need_resched(ci, flags)	\
93 	do { ci->ci_want_resched = 1; aston(); } while (/* CONSTCOND */0)
94 
95 /*
96  * Give a profiling tick to the current process when the user profiling
97  * buffer pages are invalid.  On the hp300, request an ast to send us
98  * through trap, marking the proc as needing a profiling tick.
99  */
100 #define	cpu_need_proftick(l)	\
101 	do { (l)->l_pflag |= LP_OWEUPC; aston(); } while (/* CONSTCOND */0)
102 
103 /*
104  * Notify the current process (p) that it has a signal pending,
105  * process as soon as possible.
106  */
107 #define	cpu_signotify(l)	aston()
108 
109 extern int astpending;		/* need to trap before returning to user mode */
110 #define aston() (astpending++)
111 
112 #endif /* _KERNEL */
113 
114 /*
115  * CTL_MACHDEP definitions.
116  */
117 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
118 #define	CPU_MAXID		2	/* number of valid machdep ids */
119 
120 /*
121  * The rest of this should probably be moved to <machine/hp300spu.h>,
122  * although some of it could probably be put into generic 68k headers.
123  */
124 
125 #ifdef _KERNEL
126 extern	uint8_t *intiobase, *intiolimit, *extiobase;
127 extern	void (*vectab[])(void);
128 
129 struct fpframe;
130 
131 /* locore.s functions */
132 void	m68881_save(struct fpframe *);
133 void	m68881_restore(struct fpframe *);
134 int	suline(void *, void *);
135 void	loadustp(int);
136 
137 void	doboot(void) __attribute__((__noreturn__));
138 void	ecacheon(void);
139 void	ecacheoff(void);
140 
141 /* clock.c functions */
142 void	hp300_calibrate_delay(void);
143 
144 /* machdep.c functions */
145 int	badaddr(void *);
146 int	badbaddr(void *);
147 
148 /* what is this supposed to do? i.e. how is it different than startrtclock? */
149 #define	enablertclock()
150 
151 #endif
152 
153 /* physical memory sections */
154 #define	ROMBASE		(0x00000000)
155 #define	INTIOBASE	(0x00400000)
156 #define	INTIOTOP	(0x00600000)
157 #define	EXTIOBASE	(0x00600000)
158 #define	EXTIOTOP	(0x20000000)
159 #define	MAXADDR		((paddr_t)(0 - NBPG))
160 
161 /*
162  * Internal IO space:
163  *
164  * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
165  *
166  * Internal IO space is mapped in the kernel from ``intiobase'' to
167  * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
168  * conversion between physical and kernel virtual addresses is easy.
169  */
170 #define	ISIIOVA(va) \
171 	((uint8_t *)(va) >= intiobase && (uint8_t *)(va) < intiolimit)
172 #define	IIOV(pa)	((paddr_t)(pa)-INTIOBASE+(vaddr_t)intiobase)
173 #define	IIOP(va)	((vaddr_t)(va)-(vaddr_t)intiobase+INTIOBASE)
174 #define	IIOPOFF(pa)	((paddr_t)(pa)-INTIOBASE)
175 #define	IIOMAPSIZE	btoc(INTIOTOP-INTIOBASE)	/* 2mb */
176 
177 /*
178  * External IO space:
179  *
180  * DIO ranges from select codes 0-63 at physical addresses given by:
181  *	0x600000 + (sc - 32) * 0x10000
182  * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
183  * their control space and the remaining areas, [0x200000-0x400000) and
184  * [0x800000-0x1000000), are for additional space required by a card;
185  * e.g. a display framebuffer.
186  *
187  * DIO-II ranges from select codes 132-255 at physical addresses given by:
188  *	0x1000000 + (sc - 132) * 0x400000
189  * The address range of DIO-II space is thus [0x1000000-0x20000000).
190  *
191  * DIO/DIO-II space is too large to map in its entirety, instead devices
192  * are mapped into kernel virtual address space allocated from a range
193  * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
194  */
195 #define	DIOBASE		(0x600000)
196 #define	DIOTOP		(0x1000000)
197 #define	DIOCSIZE	(0x10000)
198 #define	DIOIIBASE	(0x01000000)
199 #define	DIOIITOP	(0x20000000)
200 #define	DIOIICSIZE	(0x00400000)
201 
202 /*
203  * HP MMU
204  */
205 #define	MMUBASE		IIOPOFF(0x5F4000)
206 #define	MMUSSTP		0x0
207 #define	MMUUSTP		0x4
208 #define	MMUTBINVAL	0x8
209 #define	MMUSTAT		0xC
210 #define	MMUCMD		MMUSTAT
211 
212 #define	MMU_UMEN	0x0001	/* enable user mapping */
213 #define	MMU_SMEN	0x0002	/* enable supervisor mapping */
214 #define	MMU_CEN		0x0004	/* enable data cache */
215 #define	MMU_BERR	0x0008	/* bus error */
216 #define	MMU_IEN		0x0020	/* enable instruction cache */
217 #define	MMU_FPE		0x0040	/* enable 68881 FP coprocessor */
218 #define	MMU_WPF		0x2000	/* write protect fault */
219 #define	MMU_PF		0x4000	/* page fault */
220 #define	MMU_PTF		0x8000	/* page table fault */
221 
222 #define	MMU_FAULT	(MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
223 #define	MMU_ENAB	(MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
224 
225 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
226 #define M68K_CACHEOPS_MACHDEP
227 #endif
228 
229 #ifdef CACHE_HAVE_PAC
230 #define M68K_CACHEOPS_MACHDEP_PCIA
231 #endif
232 
233 #ifdef CACHE_HAVE_VAC
234 #define M68K_CACHEOPS_MACHDEP_DCIA
235 #define M68K_CACHEOPS_MACHDEP_DCIS
236 #define M68K_CACHEOPS_MACHDEP_DCIU
237 #define M68K_CACHEOPS_MACHDEP_TBIA
238 #define M68K_CACHEOPS_MACHDEP_TBIS
239 #define M68K_CACHEOPS_MACHDEP_TBIAS
240 #define M68K_CACHEOPS_MACHDEP_TBIAU
241 #endif
242 
243 #endif /* _HP300_CPU_H_ */
244