xref: /netbsd-src/sys/arch/hp300/include/cpu.h (revision c2f76ff004a2cb67efe5b12d97bd3ef7fe89e18d)
1 /*	$NetBSD: cpu.h,v 1.64 2010/12/25 15:05:22 tsutsui Exp $	*/
2 
3 /*
4  * Copyright (c) 1982, 1990, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * the Systems Programming Group of the University of Utah Computer
9  * Science Department.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
36  *
37  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
38  */
39 /*
40  * Copyright (c) 1988 University of Utah.
41  *
42  * This code is derived from software contributed to Berkeley by
43  * the Systems Programming Group of the University of Utah Computer
44  * Science Department.
45  *
46  * Redistribution and use in source and binary forms, with or without
47  * modification, are permitted provided that the following conditions
48  * are met:
49  * 1. Redistributions of source code must retain the above copyright
50  *    notice, this list of conditions and the following disclaimer.
51  * 2. Redistributions in binary form must reproduce the above copyright
52  *    notice, this list of conditions and the following disclaimer in the
53  *    documentation and/or other materials provided with the distribution.
54  * 3. All advertising materials mentioning features or use of this software
55  *    must display the following acknowledgement:
56  *	This product includes software developed by the University of
57  *	California, Berkeley and its contributors.
58  * 4. Neither the name of the University nor the names of its contributors
59  *    may be used to endorse or promote products derived from this software
60  *    without specific prior written permission.
61  *
62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
72  * SUCH DAMAGE.
73  *
74  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
75  *
76  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
77  */
78 
79 #ifndef _HP300_CPU_H_
80 #define	_HP300_CPU_H_
81 
82 #if defined(_KERNEL)
83 
84 #if defined(_KERNEL_OPT)
85 #include "opt_lockdebug.h"
86 #endif
87 
88 /*
89  * Exported definitions unique to hp300/68k cpu support.
90  */
91 
92 /*
93  * Get common m68k CPU definitions.
94  */
95 #include <m68k/cpu.h>
96 #include <machine/hp300spu.h>
97 
98 /*
99  * Get interrupt glue.
100  */
101 #include <machine/intr.h>
102 
103 /*
104  * Arguments to hardclock and gatherstats encapsulate the previous
105  * machine state in an opaque clockframe.  One the hp300, we use
106  * what the hardware pushes on an interrupt (frame format 0).
107  */
108 struct clockframe {
109 	u_short	sr;		/* sr at time of interrupt */
110 	u_long	pc;		/* pc at time of interrupt */
111 	u_short	vo;		/* vector offset (4-word frame) */
112 };
113 
114 #define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
115 #define	CLKF_PC(framep)		((framep)->pc)
116 #if 0
117 /* We would like to do it this way... */
118 #define	CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
119 #else
120 /* but until we start using PSL_M, we have to do this instead */
121 #include <machine/intr.h>
122 #define	CLKF_INTR(framep)	(idepth > 1)	/* XXX */
123 #endif
124 
125 
126 /*
127  * Preempt the current process if in interrupt from user mode,
128  * or after the current trap/syscall if in system mode.
129  */
130 #define	cpu_need_resched(ci, flags)	\
131 	do { ci->ci_want_resched = 1; aston(); } while (/* CONSTCOND */0)
132 
133 /*
134  * Give a profiling tick to the current process when the user profiling
135  * buffer pages are invalid.  On the hp300, request an ast to send us
136  * through trap, marking the proc as needing a profiling tick.
137  */
138 #define	cpu_need_proftick(l)	\
139 	do { (l)->l_pflag |= LP_OWEUPC; aston(); } while (/* CONSTCOND */0)
140 
141 /*
142  * Notify the current process (p) that it has a signal pending,
143  * process as soon as possible.
144  */
145 #define	cpu_signotify(l)	aston()
146 
147 extern int astpending;		/* need to trap before returning to user mode */
148 #define aston() (astpending++)
149 
150 #endif /* _KERNEL */
151 
152 /*
153  * CTL_MACHDEP definitions.
154  */
155 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
156 #define	CPU_MAXID		2	/* number of valid machdep ids */
157 
158 /*
159  * The rest of this should probably be moved to <machine/hp300spu.h>,
160  * although some of it could probably be put into generic 68k headers.
161  */
162 
163 #ifdef _KERNEL
164 extern	uint8_t *intiobase, *intiolimit, *extiobase;
165 extern	void (*vectab[])(void);
166 
167 struct fpframe;
168 
169 /* locore.s functions */
170 void	m68881_save(struct fpframe *);
171 void	m68881_restore(struct fpframe *);
172 int	suline(void *, void *);
173 void	loadustp(int);
174 
175 void	doboot(void) __attribute__((__noreturn__));
176 void	ecacheon(void);
177 void	ecacheoff(void);
178 
179 /* clock.c functions */
180 void	hp300_calibrate_delay(void);
181 
182 /* machdep.c functions */
183 int	badaddr(void *);
184 int	badbaddr(void *);
185 
186 /* what is this supposed to do? i.e. how is it different than startrtclock? */
187 #define	enablertclock()
188 
189 #endif
190 
191 /* physical memory sections */
192 #define	ROMBASE		(0x00000000)
193 #define	INTIOBASE	(0x00400000)
194 #define	INTIOTOP	(0x00600000)
195 #define	EXTIOBASE	(0x00600000)
196 #define	EXTIOTOP	(0x20000000)
197 #define	MAXADDR		((paddr_t)(0 - NBPG))
198 
199 /*
200  * Internal IO space:
201  *
202  * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
203  *
204  * Internal IO space is mapped in the kernel from ``intiobase'' to
205  * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
206  * conversion between physical and kernel virtual addresses is easy.
207  */
208 #define	ISIIOVA(va) \
209 	((uint8_t *)(va) >= intiobase && (uint8_t *)(va) < intiolimit)
210 #define	IIOV(pa)	((paddr_t)(pa)-INTIOBASE+(vaddr_t)intiobase)
211 #define	IIOP(va)	((vaddr_t)(va)-(vaddr_t)intiobase+INTIOBASE)
212 #define	IIOPOFF(pa)	((paddr_t)(pa)-INTIOBASE)
213 #define	IIOMAPSIZE	btoc(INTIOTOP-INTIOBASE)	/* 2mb */
214 
215 /*
216  * External IO space:
217  *
218  * DIO ranges from select codes 0-63 at physical addresses given by:
219  *	0x600000 + (sc - 32) * 0x10000
220  * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
221  * their control space and the remaining areas, [0x200000-0x400000) and
222  * [0x800000-0x1000000), are for additional space required by a card;
223  * e.g. a display framebuffer.
224  *
225  * DIO-II ranges from select codes 132-255 at physical addresses given by:
226  *	0x1000000 + (sc - 132) * 0x400000
227  * The address range of DIO-II space is thus [0x1000000-0x20000000).
228  *
229  * DIO/DIO-II space is too large to map in its entirety, instead devices
230  * are mapped into kernel virtual address space allocated from a range
231  * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
232  */
233 #define	DIOBASE		(0x600000)
234 #define	DIOTOP		(0x1000000)
235 #define	DIOCSIZE	(0x10000)
236 #define	DIOIIBASE	(0x01000000)
237 #define	DIOIITOP	(0x20000000)
238 #define	DIOIICSIZE	(0x00400000)
239 
240 /*
241  * HP MMU
242  */
243 #define	MMUBASE		IIOPOFF(0x5F4000)
244 #define	MMUSSTP		0x0
245 #define	MMUUSTP		0x4
246 #define	MMUTBINVAL	0x8
247 #define	MMUSTAT		0xC
248 #define	MMUCMD		MMUSTAT
249 
250 #define	MMU_UMEN	0x0001	/* enable user mapping */
251 #define	MMU_SMEN	0x0002	/* enable supervisor mapping */
252 #define	MMU_CEN		0x0004	/* enable data cache */
253 #define	MMU_BERR	0x0008	/* bus error */
254 #define	MMU_IEN		0x0020	/* enable instruction cache */
255 #define	MMU_FPE		0x0040	/* enable 68881 FP coprocessor */
256 #define	MMU_WPF		0x2000	/* write protect fault */
257 #define	MMU_PF		0x4000	/* page fault */
258 #define	MMU_PTF		0x8000	/* page table fault */
259 
260 #define	MMU_FAULT	(MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
261 #define	MMU_ENAB	(MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
262 
263 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
264 #define M68K_CACHEOPS_MACHDEP
265 #endif
266 
267 #ifdef CACHE_HAVE_PAC
268 #define M68K_CACHEOPS_MACHDEP_PCIA
269 #endif
270 
271 #ifdef CACHE_HAVE_VAC
272 #define M68K_CACHEOPS_MACHDEP_DCIA
273 #define M68K_CACHEOPS_MACHDEP_DCIS
274 #define M68K_CACHEOPS_MACHDEP_DCIU
275 #define M68K_CACHEOPS_MACHDEP_TBIA
276 #define M68K_CACHEOPS_MACHDEP_TBIS
277 #define M68K_CACHEOPS_MACHDEP_TBIAS
278 #define M68K_CACHEOPS_MACHDEP_TBIAU
279 #endif
280 
281 #endif /* _HP300_CPU_H_ */
282