xref: /netbsd-src/sys/arch/hp300/include/cpu.h (revision b1c86f5f087524e68db12794ee9c3e3da1ab17a0)
1 /*	$NetBSD: cpu.h,v 1.62 2009/12/11 19:43:18 tsutsui Exp $	*/
2 
3 /*
4  * Copyright (c) 1982, 1990, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * the Systems Programming Group of the University of Utah Computer
9  * Science Department.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
36  *
37  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
38  */
39 /*
40  * Copyright (c) 1988 University of Utah.
41  *
42  * This code is derived from software contributed to Berkeley by
43  * the Systems Programming Group of the University of Utah Computer
44  * Science Department.
45  *
46  * Redistribution and use in source and binary forms, with or without
47  * modification, are permitted provided that the following conditions
48  * are met:
49  * 1. Redistributions of source code must retain the above copyright
50  *    notice, this list of conditions and the following disclaimer.
51  * 2. Redistributions in binary form must reproduce the above copyright
52  *    notice, this list of conditions and the following disclaimer in the
53  *    documentation and/or other materials provided with the distribution.
54  * 3. All advertising materials mentioning features or use of this software
55  *    must display the following acknowledgement:
56  *	This product includes software developed by the University of
57  *	California, Berkeley and its contributors.
58  * 4. Neither the name of the University nor the names of its contributors
59  *    may be used to endorse or promote products derived from this software
60  *    without specific prior written permission.
61  *
62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
72  * SUCH DAMAGE.
73  *
74  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
75  *
76  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
77  */
78 
79 #ifndef _HP300_CPU_H_
80 #define	_HP300_CPU_H_
81 
82 #if defined(_KERNEL)
83 
84 #if defined(_KERNEL_OPT)
85 #include "opt_lockdebug.h"
86 #endif
87 
88 /*
89  * Exported definitions unique to hp300/68k cpu support.
90  */
91 
92 /*
93  * Get common m68k CPU definitions.
94  */
95 #include <m68k/cpu.h>
96 #include <machine/hp300spu.h>
97 
98 /*
99  * Get interrupt glue.
100  */
101 #include <machine/intr.h>
102 
103 #include <sys/cpu_data.h>
104 struct cpu_info {
105 	struct cpu_data ci_data;	/* MI per-cpu data */
106 	cpuid_t	ci_cpuid;
107 	int	ci_mtx_count;
108 	int	ci_mtx_oldspl;
109 	int	ci_want_resched;
110 };
111 
112 extern struct cpu_info cpu_info_store;
113 
114 #define	curcpu()	(&cpu_info_store)
115 
116 /*
117  * definitions of cpu-dependent requirements
118  * referenced in generic code
119  */
120 #define	cpu_number()			0
121 
122 void	cpu_proc_fork(struct proc *, struct proc *);
123 
124 /*
125  * Arguments to hardclock and gatherstats encapsulate the previous
126  * machine state in an opaque clockframe.  One the hp300, we use
127  * what the hardware pushes on an interrupt (frame format 0).
128  */
129 struct clockframe {
130 	u_short	sr;		/* sr at time of interrupt */
131 	u_long	pc;		/* pc at time of interrupt */
132 	u_short	vo;		/* vector offset (4-word frame) */
133 };
134 
135 #define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
136 #define	CLKF_PC(framep)		((framep)->pc)
137 #if 0
138 /* We would like to do it this way... */
139 #define	CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
140 #else
141 /* but until we start using PSL_M, we have to do this instead */
142 #include <machine/intr.h>
143 #define	CLKF_INTR(framep)	(idepth > 1)	/* XXX */
144 #endif
145 
146 
147 /*
148  * Preempt the current process if in interrupt from user mode,
149  * or after the current trap/syscall if in system mode.
150  */
151 #define	cpu_need_resched(ci, flags)	\
152 	do { ci->ci_want_resched = 1; aston(); } while (/* CONSTCOND */0)
153 
154 /*
155  * Give a profiling tick to the current process when the user profiling
156  * buffer pages are invalid.  On the hp300, request an ast to send us
157  * through trap, marking the proc as needing a profiling tick.
158  */
159 #define	cpu_need_proftick(l)	\
160 	do { (l)->l_pflag |= LP_OWEUPC; aston(); } while (/* CONSTCOND */0)
161 
162 /*
163  * Notify the current process (p) that it has a signal pending,
164  * process as soon as possible.
165  */
166 #define	cpu_signotify(l)	aston()
167 
168 extern int astpending;		/* need to trap before returning to user mode */
169 #define aston() (astpending++)
170 
171 #endif /* _KERNEL */
172 
173 /*
174  * CTL_MACHDEP definitions.
175  */
176 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
177 #define	CPU_MAXID		2	/* number of valid machdep ids */
178 
179 /*
180  * The rest of this should probably be moved to <machine/hp300spu.h>,
181  * although some of it could probably be put into generic 68k headers.
182  */
183 
184 #ifdef _KERNEL
185 extern	uint8_t *intiobase, *intiolimit, *extiobase;
186 extern	void (*vectab[])(void);
187 
188 struct fpframe;
189 
190 /* locore.s functions */
191 void	m68881_save(struct fpframe *);
192 void	m68881_restore(struct fpframe *);
193 int	suline(void *, void *);
194 void	loadustp(int);
195 
196 void	doboot(void) __attribute__((__noreturn__));
197 void	ecacheon(void);
198 void	ecacheoff(void);
199 
200 /* clock.c functions */
201 void	hp300_calibrate_delay(void);
202 
203 /* machdep.c functions */
204 int	badaddr(void *);
205 int	badbaddr(void *);
206 
207 /* what is this supposed to do? i.e. how is it different than startrtclock? */
208 #define	enablertclock()
209 
210 #endif
211 
212 /* physical memory sections */
213 #define	ROMBASE		(0x00000000)
214 #define	INTIOBASE	(0x00400000)
215 #define	INTIOTOP	(0x00600000)
216 #define	EXTIOBASE	(0x00600000)
217 #define	EXTIOTOP	(0x20000000)
218 #define	MAXADDR		(0 - NBPG)
219 
220 /*
221  * Internal IO space:
222  *
223  * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
224  *
225  * Internal IO space is mapped in the kernel from ``intiobase'' to
226  * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
227  * conversion between physical and kernel virtual addresses is easy.
228  */
229 #define	ISIIOVA(va) \
230 	((uint8_t *)(va) >= intiobase && (uint8_t *)(va) < intiolimit)
231 #define	IIOV(pa)	((paddr_t)(pa)-INTIOBASE+(vaddr_t)intiobase)
232 #define	IIOP(va)	((vaddr_t)(va)-(vaddr_t)intiobase+INTIOBASE)
233 #define	IIOPOFF(pa)	((paddr_t)(pa)-INTIOBASE)
234 #define	IIOMAPSIZE	btoc(INTIOTOP-INTIOBASE)	/* 2mb */
235 
236 /*
237  * External IO space:
238  *
239  * DIO ranges from select codes 0-63 at physical addresses given by:
240  *	0x600000 + (sc - 32) * 0x10000
241  * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
242  * their control space and the remaining areas, [0x200000-0x400000) and
243  * [0x800000-0x1000000), are for additional space required by a card;
244  * e.g. a display framebuffer.
245  *
246  * DIO-II ranges from select codes 132-255 at physical addresses given by:
247  *	0x1000000 + (sc - 132) * 0x400000
248  * The address range of DIO-II space is thus [0x1000000-0x20000000).
249  *
250  * DIO/DIO-II space is too large to map in its entirety, instead devices
251  * are mapped into kernel virtual address space allocated from a range
252  * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
253  */
254 #define	DIOBASE		(0x600000)
255 #define	DIOTOP		(0x1000000)
256 #define	DIOCSIZE	(0x10000)
257 #define	DIOIIBASE	(0x01000000)
258 #define	DIOIITOP	(0x20000000)
259 #define	DIOIICSIZE	(0x00400000)
260 
261 /*
262  * HP MMU
263  */
264 #define	MMUBASE		IIOPOFF(0x5F4000)
265 #define	MMUSSTP		0x0
266 #define	MMUUSTP		0x4
267 #define	MMUTBINVAL	0x8
268 #define	MMUSTAT		0xC
269 #define	MMUCMD		MMUSTAT
270 
271 #define	MMU_UMEN	0x0001	/* enable user mapping */
272 #define	MMU_SMEN	0x0002	/* enable supervisor mapping */
273 #define	MMU_CEN		0x0004	/* enable data cache */
274 #define	MMU_BERR	0x0008	/* bus error */
275 #define	MMU_IEN		0x0020	/* enable instruction cache */
276 #define	MMU_FPE		0x0040	/* enable 68881 FP coprocessor */
277 #define	MMU_WPF		0x2000	/* write protect fault */
278 #define	MMU_PF		0x4000	/* page fault */
279 #define	MMU_PTF		0x8000	/* page table fault */
280 
281 #define	MMU_FAULT	(MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
282 #define	MMU_ENAB	(MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
283 
284 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
285 #define M68K_CACHEOPS_MACHDEP
286 #endif
287 
288 #ifdef CACHE_HAVE_PAC
289 #define M68K_CACHEOPS_MACHDEP_PCIA
290 #endif
291 
292 #ifdef CACHE_HAVE_VAC
293 #define M68K_CACHEOPS_MACHDEP_DCIA
294 #define M68K_CACHEOPS_MACHDEP_DCIS
295 #define M68K_CACHEOPS_MACHDEP_DCIU
296 #define M68K_CACHEOPS_MACHDEP_TBIA
297 #define M68K_CACHEOPS_MACHDEP_TBIS
298 #define M68K_CACHEOPS_MACHDEP_TBIAS
299 #define M68K_CACHEOPS_MACHDEP_TBIAU
300 #endif
301 
302 #endif /* _HP300_CPU_H_ */
303