xref: /netbsd-src/sys/arch/hp300/include/cpu.h (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: cpu.h,v 1.57 2007/10/17 19:54:25 garbled Exp $	*/
2 
3 /*
4  * Copyright (c) 1982, 1990, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * the Systems Programming Group of the University of Utah Computer
9  * Science Department.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
36  *
37  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
38  */
39 /*
40  * Copyright (c) 1988 University of Utah.
41  *
42  * This code is derived from software contributed to Berkeley by
43  * the Systems Programming Group of the University of Utah Computer
44  * Science Department.
45  *
46  * Redistribution and use in source and binary forms, with or without
47  * modification, are permitted provided that the following conditions
48  * are met:
49  * 1. Redistributions of source code must retain the above copyright
50  *    notice, this list of conditions and the following disclaimer.
51  * 2. Redistributions in binary form must reproduce the above copyright
52  *    notice, this list of conditions and the following disclaimer in the
53  *    documentation and/or other materials provided with the distribution.
54  * 3. All advertising materials mentioning features or use of this software
55  *    must display the following acknowledgement:
56  *	This product includes software developed by the University of
57  *	California, Berkeley and its contributors.
58  * 4. Neither the name of the University nor the names of its contributors
59  *    may be used to endorse or promote products derived from this software
60  *    without specific prior written permission.
61  *
62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
72  * SUCH DAMAGE.
73  *
74  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
75  *
76  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
77  */
78 
79 #ifndef _HP300_CPU_H_
80 #define	_HP300_CPU_H_
81 
82 #if defined(_KERNEL)
83 
84 #if defined(_KERNEL_OPT)
85 #include "opt_lockdebug.h"
86 #endif
87 
88 /*
89  * Exported definitions unique to hp300/68k cpu support.
90  */
91 
92 /*
93  * Get common m68k CPU definitions.
94  */
95 #include <m68k/cpu.h>
96 #include <machine/hp300spu.h>
97 
98 /*
99  * Get interrupt glue.
100  */
101 #include <machine/intr.h>
102 
103 #include <sys/cpu_data.h>
104 struct cpu_info {
105 	struct cpu_data ci_data;	/* MI per-cpu data */
106 	cpuid_t	ci_cpuid;
107 	int	ci_mtx_count;
108 	int	ci_mtx_oldspl;
109 	int	ci_want_resched;
110 };
111 
112 extern struct cpu_info cpu_info_store;
113 
114 #define	curcpu()	(&cpu_info_store)
115 
116 /*
117  * definitions of cpu-dependent requirements
118  * referenced in generic code
119  */
120 #define	cpu_swapin(p)			/* nothing */
121 #define	cpu_swapout(p)			/* nothing */
122 #define	cpu_number()			0
123 
124 void	cpu_proc_fork(struct proc *, struct proc *);
125 
126 /*
127  * Arguments to hardclock and gatherstats encapsulate the previous
128  * machine state in an opaque clockframe.  One the hp300, we use
129  * what the hardware pushes on an interrupt (frame format 0).
130  */
131 struct clockframe {
132 	u_short	sr;		/* sr at time of interrupt */
133 	u_long	pc;		/* pc at time of interrupt */
134 	u_short	vo;		/* vector offset (4-word frame) */
135 };
136 
137 #define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
138 #define	CLKF_PC(framep)		((framep)->pc)
139 #if 0
140 /* We would like to do it this way... */
141 #define	CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
142 #else
143 /* but until we start using PSL_M, we have to do this instead */
144 #define	CLKF_INTR(framep)	(0)	/* XXX */
145 #endif
146 
147 
148 /*
149  * Preempt the current process if in interrupt from user mode,
150  * or after the current trap/syscall if in system mode.
151  */
152 #define	cpu_need_resched(ci, flags)	\
153 	do { ci->ci_want_resched = 1; aston(); } while (/* CONSTCOND */0)
154 
155 /*
156  * Give a profiling tick to the current process when the user profiling
157  * buffer pages are invalid.  On the hp300, request an ast to send us
158  * through trap, marking the proc as needing a profiling tick.
159  */
160 #define	cpu_need_proftick(l)	\
161 	do { (l)->l_flag |= LP_OWEUPC; aston(); } while (/* CONSTCOND */0)
162 
163 /*
164  * Notify the current process (p) that it has a signal pending,
165  * process as soon as possible.
166  */
167 #define	cpu_signotify(l)	aston()
168 
169 extern int astpending;		/* need to trap before returning to user mode */
170 #define aston() (astpending++)
171 
172 #endif /* _KERNEL */
173 
174 /*
175  * CTL_MACHDEP definitions.
176  */
177 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
178 #define	CPU_MAXID		2	/* number of valid machdep ids */
179 
180 #define CTL_MACHDEP_NAMES { \
181 	{ 0, 0 }, \
182 	{ "console_device", CTLTYPE_STRUCT }, \
183 }
184 
185 /*
186  * The rest of this should probably be moved to <machine/hp300spu.h>,
187  * although some of it could probably be put into generic 68k headers.
188  */
189 
190 #ifdef _KERNEL
191 extern	uint8_t *intiobase, *intiolimit, *extiobase;
192 extern	void (*vectab[])(void);
193 
194 struct fpframe;
195 
196 /* locore.s functions */
197 void	m68881_save(struct fpframe *);
198 void	m68881_restore(struct fpframe *);
199 int	suline(void *, void *);
200 void	loadustp(int);
201 
202 void	doboot(void) __attribute__((__noreturn__));
203 void	ecacheon(void);
204 void	ecacheoff(void);
205 
206 /* clock.c functions */
207 void	hp300_calibrate_delay(void);
208 
209 /* machdep.c functions */
210 int	badaddr(void *);
211 int	badbaddr(void *);
212 
213 /* what is this supposed to do? i.e. how is it different than startrtclock? */
214 #define	enablertclock()
215 
216 #endif
217 
218 /* physical memory sections */
219 #define	ROMBASE		(0x00000000)
220 #define	INTIOBASE	(0x00400000)
221 #define	INTIOTOP	(0x00600000)
222 #define	EXTIOBASE	(0x00600000)
223 #define	EXTIOTOP	(0x20000000)
224 #define	MAXADDR		(0xFFFFF000)
225 
226 /*
227  * Internal IO space:
228  *
229  * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
230  *
231  * Internal IO space is mapped in the kernel from ``intiobase'' to
232  * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
233  * conversion between physical and kernel virtual addresses is easy.
234  */
235 #define	ISIIOVA(va) \
236 	((uint8_t *)(va) >= intiobase && (uint8_t *)(va) < intiolimit)
237 #define	IIOV(pa)	((paddr_t)(pa)-INTIOBASE+(vaddr_t)intiobase)
238 #define	IIOP(va)	((vaddr_t)(va)-(vaddr_t)intiobase+INTIOBASE)
239 #define	IIOPOFF(pa)	((paddr_t)(pa)-INTIOBASE)
240 #define	IIOMAPSIZE	btoc(INTIOTOP-INTIOBASE)	/* 2mb */
241 
242 /*
243  * External IO space:
244  *
245  * DIO ranges from select codes 0-63 at physical addresses given by:
246  *	0x600000 + (sc - 32) * 0x10000
247  * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
248  * their control space and the remaining areas, [0x200000-0x400000) and
249  * [0x800000-0x1000000), are for additional space required by a card;
250  * e.g. a display framebuffer.
251  *
252  * DIO-II ranges from select codes 132-255 at physical addresses given by:
253  *	0x1000000 + (sc - 132) * 0x400000
254  * The address range of DIO-II space is thus [0x1000000-0x20000000).
255  *
256  * DIO/DIO-II space is too large to map in its entirety, instead devices
257  * are mapped into kernel virtual address space allocated from a range
258  * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
259  */
260 #define	DIOBASE		(0x600000)
261 #define	DIOTOP		(0x1000000)
262 #define	DIOCSIZE	(0x10000)
263 #define	DIOIIBASE	(0x01000000)
264 #define	DIOIITOP	(0x20000000)
265 #define	DIOIICSIZE	(0x00400000)
266 
267 /*
268  * HP MMU
269  */
270 #define	MMUBASE		IIOPOFF(0x5F4000)
271 #define	MMUSSTP		0x0
272 #define	MMUUSTP		0x4
273 #define	MMUTBINVAL	0x8
274 #define	MMUSTAT		0xC
275 #define	MMUCMD		MMUSTAT
276 
277 #define	MMU_UMEN	0x0001	/* enable user mapping */
278 #define	MMU_SMEN	0x0002	/* enable supervisor mapping */
279 #define	MMU_CEN		0x0004	/* enable data cache */
280 #define	MMU_BERR	0x0008	/* bus error */
281 #define	MMU_IEN		0x0020	/* enable instruction cache */
282 #define	MMU_FPE		0x0040	/* enable 68881 FP coprocessor */
283 #define	MMU_WPF		0x2000	/* write protect fault */
284 #define	MMU_PF		0x4000	/* page fault */
285 #define	MMU_PTF		0x8000	/* page table fault */
286 
287 #define	MMU_FAULT	(MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
288 #define	MMU_ENAB	(MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
289 
290 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
291 #define M68K_CACHEOPS_MACHDEP
292 #endif
293 
294 #ifdef CACHE_HAVE_PAC
295 #define M68K_CACHEOPS_MACHDEP_PCIA
296 #endif
297 
298 #ifdef CACHE_HAVE_VAC
299 #define M68K_CACHEOPS_MACHDEP_DCIA
300 #define M68K_CACHEOPS_MACHDEP_DCIS
301 #define M68K_CACHEOPS_MACHDEP_DCIU
302 #define M68K_CACHEOPS_MACHDEP_TBIA
303 #define M68K_CACHEOPS_MACHDEP_TBIS
304 #define M68K_CACHEOPS_MACHDEP_TBIAS
305 #define M68K_CACHEOPS_MACHDEP_TBIAU
306 #endif
307 
308 #endif /* _HP300_CPU_H_ */
309