xref: /netbsd-src/sys/arch/hp300/include/cacheops_machdep.h (revision 274254cdae52594c1aa480a736aef78313d15c9c)
1 /*	$NetBSD: cacheops_machdep.h,v 1.7 2006/02/16 20:17:13 perry Exp $	*/
2 
3 /*
4  * Copyright (c) 1980, 1990, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * the Systems Programming Group of the University of Utah Computer
9  * Science Department.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  */
35 
36 /*
37  * Copyright (c) 1994, 1995 Gordon W. Ross
38  * Copyright (c) 1988 University of Utah.
39  *
40  * This code is derived from software contributed to Berkeley by
41  * the Systems Programming Group of the University of Utah Computer
42  * Science Department.
43  *
44  * Redistribution and use in source and binary forms, with or without
45  * modification, are permitted provided that the following conditions
46  * are met:
47  * 1. Redistributions of source code must retain the above copyright
48  *    notice, this list of conditions and the following disclaimer.
49  * 2. Redistributions in binary form must reproduce the above copyright
50  *    notice, this list of conditions and the following disclaimer in the
51  *    documentation and/or other materials provided with the distribution.
52  * 3. All advertising materials mentioning features or use of this software
53  *    must display the following acknowledgement:
54  *	This product includes software developed by the University of
55  *	California, Berkeley and its contributors.
56  * 4. Neither the name of the University nor the names of its contributors
57  *    may be used to endorse or promote products derived from this software
58  *    without specific prior written permission.
59  *
60  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
61  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
62  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
63  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
64  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
65  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
66  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
67  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
68  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
69  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
70  * SUCH DAMAGE.
71  */
72 
73 #ifndef _HP300_CACHEOPS_MACHDEP_H_
74 #define	_HP300_CACHEOPS_MACHDEP_H_
75 
76 extern vaddr_t MMUbase;
77 
78 static __inline int __attribute__((__unused__))
79 DCIA_md(void)
80 {
81 	volatile int *ip = (void *)(MMUbase + MMUCMD);
82 
83 	if (ectype != EC_VIRT) {
84 		return 0;
85 	}
86 
87 	*ip &= ~MMU_CEN;
88 	*ip |= MMU_CEN;
89 	return 1;
90 }
91 
92 static __inline int __attribute__((__unused__))
93 DCIS_md(void)
94 {
95 	volatile int *ip = (void *)(MMUbase + MMUSSTP);
96 
97 	if (ectype != EC_VIRT) {
98 		return 0;
99 	}
100 
101 	*ip = *ip;
102 	return 1;
103 }
104 
105 static __inline int __attribute__((__unused__))
106 DCIU_md(void)
107 {
108 	volatile int *ip = (void *)(MMUbase + MMUUSTP);
109 
110 	if (ectype != EC_VIRT) {
111 		return 0;
112 	}
113 
114 	*ip = *ip;
115 	return 1;
116 }
117 
118 static __inline int __attribute__((__unused__))
119 PCIA_md(void)
120 {
121 	volatile int *ip = (void *)(MMUbase + MMUCMD);
122 
123 	if (ectype != EC_PHYS || cputype != CPU_68030) {
124 		return 0;
125 	}
126 
127 	*ip &= ~MMU_CEN;
128 	*ip |= MMU_CEN;
129 
130 	/*
131 	 * only some '030 models (345/370/375/400) have external PAC,
132 	 * so we need to do the standard flushing as well.
133 	 */
134 
135 	return 0;
136 }
137 
138 static __inline int __attribute__((__unused__))
139 TBIA_md(void)
140 {
141 	volatile int *ip = (void *)(MMUbase + MMUTBINVAL);
142 
143 	if (mmutype != MMU_HP) {
144 		return 0;
145 	}
146 
147 	(void) *ip;
148 	return 1;
149 }
150 
151 static __inline int __attribute__((__unused__))
152 TBIS_md(vaddr_t va)
153 {
154 	register vaddr_t r_va __asm("%a1") = va;
155 	int s;
156 
157 	if (mmutype != MMU_HP) {
158 		return 0;
159 	}
160 
161 	s = splhigh();
162 	__asm volatile (" movc   %0, %%dfc;"	/* select purge space */
163 			  " movsl  %3, %1@;"	/* purge it */
164 			  " movc   %2, %%dfc;"
165 			  : : "r" (FC_PURGE), "a" (r_va), "r" (FC_USERD),
166 			  "r" (0));
167 	splx(s);
168 	return 1;
169 }
170 
171 static __inline int __attribute__((__unused__))
172 TBIAS_md(void)
173 {
174 	volatile int *ip = (void *)(MMUbase + MMUTBINVAL);
175 
176 	if (mmutype != MMU_HP) {
177 		return 0;
178 	}
179 
180 	*ip = 0x8000;
181 	return 1;
182 }
183 
184 static __inline int __attribute__((__unused__))
185 TBIAU_md(void)
186 {
187 	volatile int *ip = (void *)(MMUbase + MMUTBINVAL);
188 
189 	if (mmutype != MMU_HP) {
190 		return 0;
191 	}
192 
193 	*ip = 0;
194 	return 1;
195 }
196 #endif /* _HP300_CACHEOPS_MACHDEP_H_ */
197