1 /* $NetBSD: fhpib.c,v 1.13 1996/10/13 03:14:10 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1982, 1990, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the University of 18 * California, Berkeley and its contributors. 19 * 4. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)fhpib.c 8.2 (Berkeley) 1/12/94 36 */ 37 38 /* 39 * 98625A/B HPIB driver 40 */ 41 #include "hpib.h" 42 #if NHPIB > 0 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/buf.h> 48 49 #include <hp300/dev/device.h> 50 #include <hp300/dev/fhpibreg.h> 51 #include <hp300/dev/hpibvar.h> 52 #include <hp300/dev/dmavar.h> 53 54 /* 55 * Inline version of fhpibwait to be used in places where 56 * we don't worry about getting hung. 57 */ 58 #define FHPIBWAIT(hd, m) while (((hd)->hpib_intr & (m)) == 0) DELAY(1) 59 60 #ifdef DEBUG 61 int fhpibdebugunit = -1; 62 int fhpibdebug = 0; 63 #define FDB_FAIL 0x01 64 #define FDB_DMA 0x02 65 #define FDB_WAIT 0x04 66 #define FDB_PPOLL 0x08 67 68 int dopriodma = 0; /* use high priority DMA */ 69 int doworddma = 1; /* non-zero if we should attempt word dma */ 70 int doppollint = 1; /* use ppoll interrupts instead of watchdog */ 71 int fhpibppolldelay = 50; 72 73 long fhpibbadint[2] = { 0 }; 74 long fhpibtransfer[NHPIB] = { 0 }; 75 long fhpibnondma[NHPIB] = { 0 }; 76 long fhpibworddma[NHPIB] = { 0 }; 77 long fhpibppollfail[NHPIB] = { 0 }; 78 #endif 79 80 int fhpibcmd[NHPIB]; 81 82 void fhpibreset __P((int)); 83 int fhpibsend __P((int, int, int, void *, int)); 84 int fhpibrecv __P((int, int, int, void *, int)); 85 int fhpibppoll __P((int)); 86 void fhpibppwatch __P((void *)); 87 void fhpibgo __P((int, int, int, void *, int, int, int)); 88 void fhpibdone __P((int)); 89 int fhpibintr __P((void *)); 90 91 /* 92 * Our controller ops structure. 93 */ 94 struct hpib_controller fhpib_controller = { 95 fhpibreset, 96 fhpibsend, 97 fhpibrecv, 98 fhpibppoll, 99 fhpibppwatch, 100 fhpibgo, 101 fhpibdone, 102 fhpibintr 103 }; 104 105 int 106 fhpibtype(hc) 107 register struct hp_ctlr *hc; 108 { 109 register struct hpib_softc *hs = &hpib_softc[hc->hp_unit]; 110 register struct fhpibdevice *hd = (struct fhpibdevice *)hc->hp_addr; 111 112 if (hd->hpib_cid != HPIBC) 113 return (0); 114 115 hs->sc_type = HPIBC; 116 hc->hp_ipl = HPIB_IPL(hd->hpib_ids); 117 118 return (1); 119 } 120 121 void 122 fhpibattach(hc) 123 struct hp_ctlr *hc; 124 { 125 register struct hpib_softc *hs = &hpib_softc[hc->hp_unit]; 126 127 if (hs->sc_type != HPIBC) 128 panic("fhpibattach: unknown type 0x%x", hs->sc_type); 129 /* NOTREACHED */ 130 131 hs->sc_ba = HPIBC_BA; 132 hs->sc_descrip = "98625A or 98625B fast HP-IB"; 133 hs->sc_controller = &fhpib_controller; 134 } 135 136 void 137 fhpibreset(unit) 138 int unit; 139 { 140 register struct hpib_softc *hs = &hpib_softc[unit]; 141 register struct fhpibdevice *hd; 142 143 hd = (struct fhpibdevice *)hs->sc_hc->hp_addr; 144 hd->hpib_cid = 0xFF; 145 DELAY(100); 146 hd->hpib_cmd = CT_8BIT; 147 hd->hpib_ar = AR_ARONC; 148 fhpibifc(hd); 149 hd->hpib_ie = IDS_IE; 150 hd->hpib_data = C_DCL; 151 DELAY(100000); 152 /* 153 * See if we can do word dma. 154 * If so, we should be able to write and read back the appropos bit. 155 */ 156 hd->hpib_ie |= IDS_WDMA; 157 if (hd->hpib_ie & IDS_WDMA) { 158 hd->hpib_ie &= ~IDS_WDMA; 159 hs->sc_flags |= HPIBF_DMA16; 160 #ifdef DEBUG 161 if (fhpibdebug & FDB_DMA) 162 printf("fhpibtype: unit %d has word dma\n", unit); 163 164 #endif 165 } 166 } 167 168 fhpibifc(hd) 169 register struct fhpibdevice *hd; 170 { 171 hd->hpib_cmd |= CT_IFC; 172 hd->hpib_cmd |= CT_INITFIFO; 173 DELAY(100); 174 hd->hpib_cmd &= ~CT_IFC; 175 hd->hpib_cmd |= CT_REN; 176 hd->hpib_stat = ST_ATN; 177 } 178 179 int 180 fhpibsend(unit, slave, sec, ptr, origcnt) 181 int unit, slave, sec, origcnt; 182 void *ptr; 183 { 184 register struct hpib_softc *hs = &hpib_softc[unit]; 185 register struct fhpibdevice *hd; 186 register int cnt = origcnt; 187 register int timo; 188 char *addr = ptr; 189 190 hd = (struct fhpibdevice *)hs->sc_hc->hp_addr; 191 hd->hpib_stat = 0; 192 hd->hpib_imask = IM_IDLE | IM_ROOM; 193 if (fhpibwait(hd, IM_IDLE) < 0) 194 goto senderr; 195 hd->hpib_stat = ST_ATN; 196 hd->hpib_data = C_UNL; 197 hd->hpib_data = C_TAG + hs->sc_ba; 198 hd->hpib_data = C_LAG + slave; 199 if (sec < 0) { 200 if (sec == -2) /* selected device clear KLUDGE */ 201 hd->hpib_data = C_SDC; 202 } else 203 hd->hpib_data = C_SCG + sec; 204 if (fhpibwait(hd, IM_IDLE) < 0) 205 goto senderr; 206 if (cnt) { 207 hd->hpib_stat = ST_WRITE; 208 while (--cnt) { 209 hd->hpib_data = *addr++; 210 timo = hpibtimeout; 211 while ((hd->hpib_intr & IM_ROOM) == 0) { 212 if (--timo <= 0) 213 goto senderr; 214 DELAY(1); 215 } 216 } 217 hd->hpib_stat = ST_EOI; 218 hd->hpib_data = *addr; 219 FHPIBWAIT(hd, IM_ROOM); 220 hd->hpib_stat = ST_ATN; 221 /* XXX: HP-UX claims bug with CS80 transparent messages */ 222 if (sec == 0x12) 223 DELAY(150); 224 hd->hpib_data = C_UNL; 225 (void) fhpibwait(hd, IM_IDLE); 226 } 227 hd->hpib_imask = 0; 228 return (origcnt); 229 230 senderr: 231 hd->hpib_imask = 0; 232 fhpibifc(hd); 233 #ifdef DEBUG 234 if (fhpibdebug & FDB_FAIL) { 235 printf("%s: fhpibsend failed: slave %d, sec %x, ", 236 hs->sc_hc->hp_xname, slave, sec); 237 printf("sent %d of %d bytes\n", origcnt-cnt-1, origcnt); 238 } 239 #endif 240 return (origcnt - cnt - 1); 241 } 242 243 int 244 fhpibrecv(unit, slave, sec, ptr, origcnt) 245 int unit, slave, sec, origcnt; 246 void *ptr; 247 { 248 register struct hpib_softc *hs = &hpib_softc[unit]; 249 register struct fhpibdevice *hd; 250 register int cnt = origcnt; 251 register int timo; 252 char *addr = ptr; 253 254 hd = (struct fhpibdevice *)hs->sc_hc->hp_addr; 255 /* 256 * Slave < 0 implies continuation of a previous receive 257 * that probably timed out. 258 */ 259 if (slave >= 0) { 260 hd->hpib_stat = 0; 261 hd->hpib_imask = IM_IDLE | IM_ROOM | IM_BYTE; 262 if (fhpibwait(hd, IM_IDLE) < 0) 263 goto recverror; 264 hd->hpib_stat = ST_ATN; 265 hd->hpib_data = C_UNL; 266 hd->hpib_data = C_LAG + hs->sc_ba; 267 hd->hpib_data = C_TAG + slave; 268 if (sec != -1) 269 hd->hpib_data = C_SCG + sec; 270 if (fhpibwait(hd, IM_IDLE) < 0) 271 goto recverror; 272 hd->hpib_stat = ST_READ0; 273 hd->hpib_data = 0; 274 } 275 if (cnt) { 276 while (--cnt >= 0) { 277 timo = hpibtimeout; 278 while ((hd->hpib_intr & IM_BYTE) == 0) { 279 if (--timo == 0) 280 goto recvbyteserror; 281 DELAY(1); 282 } 283 *addr++ = hd->hpib_data; 284 } 285 FHPIBWAIT(hd, IM_ROOM); 286 hd->hpib_stat = ST_ATN; 287 hd->hpib_data = (slave == 31) ? C_UNA : C_UNT; 288 (void) fhpibwait(hd, IM_IDLE); 289 } 290 hd->hpib_imask = 0; 291 return (origcnt); 292 293 recverror: 294 fhpibifc(hd); 295 recvbyteserror: 296 hd->hpib_imask = 0; 297 #ifdef DEBUG 298 if (fhpibdebug & FDB_FAIL) { 299 printf("%s: fhpibrecv failed: slave %d, sec %x, ", 300 hs->sc_hc->hp_xname, slave, sec); 301 printf("got %d of %d bytes\n", origcnt-cnt-1, origcnt); 302 } 303 #endif 304 return (origcnt - cnt - 1); 305 } 306 307 void 308 fhpibgo(unit, slave, sec, ptr, count, rw, timo) 309 int unit, slave, sec, count, rw, timo; 310 void *ptr; 311 { 312 register struct hpib_softc *hs = &hpib_softc[unit]; 313 register struct fhpibdevice *hd; 314 register int i; 315 char *addr = ptr; 316 int flags = 0; 317 318 hd = (struct fhpibdevice *)hs->sc_hc->hp_addr; 319 hs->sc_flags |= HPIBF_IO; 320 if (timo) 321 hs->sc_flags |= HPIBF_TIMO; 322 if (rw == B_READ) 323 hs->sc_flags |= HPIBF_READ; 324 #ifdef DEBUG 325 else if (hs->sc_flags & HPIBF_READ) { 326 printf("fhpibgo: HPIBF_READ still set\n"); 327 hs->sc_flags &= ~HPIBF_READ; 328 } 329 #endif 330 hs->sc_count = count; 331 hs->sc_addr = addr; 332 #ifdef DEBUG 333 fhpibtransfer[unit]++; 334 #endif 335 if ((hs->sc_flags & HPIBF_DMA16) && 336 ((int)addr & 1) == 0 && count && (count & 1) == 0 337 #ifdef DEBUG 338 && doworddma 339 #endif 340 ) { 341 #ifdef DEBUG 342 fhpibworddma[unit]++; 343 #endif 344 flags |= DMAGO_WORD; 345 hd->hpib_latch = 0; 346 } 347 #ifdef DEBUG 348 if (dopriodma) 349 flags |= DMAGO_PRI; 350 #endif 351 if (hs->sc_flags & HPIBF_READ) { 352 fhpibcmd[unit] = CT_REN | CT_8BIT; 353 hs->sc_curcnt = count; 354 dmago(hs->sc_dq.dq_ctlr, addr, count, flags|DMAGO_READ); 355 if (fhpibrecv(unit, slave, sec, 0, 0) < 0) { 356 #ifdef DEBUG 357 printf("fhpibgo: recv failed, retrying...\n"); 358 #endif 359 (void) fhpibrecv(unit, slave, sec, 0, 0); 360 } 361 i = hd->hpib_cmd; 362 hd->hpib_cmd = fhpibcmd[unit]; 363 hd->hpib_ie = IDS_DMA(hs->sc_dq.dq_ctlr) | 364 ((flags & DMAGO_WORD) ? IDS_WDMA : 0); 365 return; 366 } 367 fhpibcmd[unit] = CT_REN | CT_8BIT | CT_FIFOSEL; 368 if (count < hpibdmathresh) { 369 #ifdef DEBUG 370 fhpibnondma[unit]++; 371 if (flags & DMAGO_WORD) 372 fhpibworddma[unit]--; 373 #endif 374 hs->sc_curcnt = count; 375 (void) fhpibsend(unit, slave, sec, addr, count); 376 fhpibdone(unit); 377 return; 378 } 379 count -= (flags & DMAGO_WORD) ? 2 : 1; 380 hs->sc_curcnt = count; 381 dmago(hs->sc_dq.dq_ctlr, addr, count, flags); 382 if (fhpibsend(unit, slave, sec, 0, 0) < 0) { 383 #ifdef DEBUG 384 printf("fhpibgo: send failed, retrying...\n"); 385 #endif 386 (void) fhpibsend(unit, slave, sec, 0, 0); 387 } 388 i = hd->hpib_cmd; 389 hd->hpib_cmd = fhpibcmd[unit]; 390 hd->hpib_ie = IDS_DMA(hs->sc_dq.dq_ctlr) | IDS_WRITE | 391 ((flags & DMAGO_WORD) ? IDS_WDMA : 0); 392 } 393 394 /* 395 * A DMA read can finish but the device can still be waiting (MAG-tape 396 * with more data than we're waiting for). This timeout routine 397 * takes care of that. Somehow, the thing gets hosed. For now, since 398 * this should be a very rare occurence, we RESET it. 399 */ 400 void 401 fhpibdmadone(arg) 402 void *arg; 403 { 404 register int unit; 405 register struct hpib_softc *hs; 406 int s = splbio(); 407 408 unit = (int)arg; 409 hs = &hpib_softc[unit]; 410 if (hs->sc_flags & HPIBF_IO) { 411 register struct fhpibdevice *hd; 412 register struct devqueue *dq; 413 414 hd = (struct fhpibdevice *)hs->sc_hc->hp_addr; 415 hd->hpib_imask = 0; 416 hd->hpib_cid = 0xFF; 417 DELAY(100); 418 hd->hpib_cmd = CT_8BIT; 419 hd->hpib_ar = AR_ARONC; 420 fhpibifc(hd); 421 hd->hpib_ie = IDS_IE; 422 hs->sc_flags &= ~(HPIBF_DONE|HPIBF_IO|HPIBF_READ|HPIBF_TIMO); 423 dmafree(&hs->sc_dq); 424 dq = hs->sc_sq.dq_forw; 425 (dq->dq_driver->d_intr)(dq->dq_softc); 426 } 427 (void) splx(s); 428 } 429 430 void 431 fhpibdone(unit) 432 int unit; 433 { 434 register struct hpib_softc *hs = &hpib_softc[unit]; 435 register struct fhpibdevice *hd; 436 register char *addr; 437 register int cnt; 438 439 hd = (struct fhpibdevice *)hs->sc_hc->hp_addr; 440 cnt = hs->sc_curcnt; 441 hs->sc_addr += cnt; 442 hs->sc_count -= cnt; 443 #ifdef DEBUG 444 if ((fhpibdebug & FDB_DMA) && fhpibdebugunit == unit) 445 printf("fhpibdone: addr %x cnt %d\n", 446 hs->sc_addr, hs->sc_count); 447 #endif 448 if (hs->sc_flags & HPIBF_READ) { 449 hd->hpib_imask = IM_IDLE | IM_BYTE; 450 if (hs->sc_flags & HPIBF_TIMO) 451 timeout(fhpibdmadone, (void *)unit, hz >> 2); 452 } else { 453 cnt = hs->sc_count; 454 if (cnt) { 455 addr = hs->sc_addr; 456 hd->hpib_imask = IM_IDLE | IM_ROOM; 457 FHPIBWAIT(hd, IM_IDLE); 458 hd->hpib_stat = ST_WRITE; 459 while (--cnt) { 460 hd->hpib_data = *addr++; 461 FHPIBWAIT(hd, IM_ROOM); 462 } 463 hd->hpib_stat = ST_EOI; 464 hd->hpib_data = *addr; 465 } 466 hd->hpib_imask = IM_IDLE; 467 } 468 hs->sc_flags |= HPIBF_DONE; 469 hd->hpib_stat = ST_IENAB; 470 hd->hpib_ie = IDS_IE; 471 } 472 473 int 474 fhpibintr(arg) 475 void *arg; 476 { 477 register struct hpib_softc *hs = arg; 478 register struct fhpibdevice *hd; 479 register struct devqueue *dq; 480 register int stat0, unit = hs->sc_hc->hp_unit; 481 482 hd = (struct fhpibdevice *)hs->sc_hc->hp_addr; 483 stat0 = hd->hpib_ids; 484 if ((stat0 & (IDS_IE|IDS_IR)) != (IDS_IE|IDS_IR)) { 485 #ifdef DEBUG 486 if ((fhpibdebug & FDB_FAIL) && (stat0 & IDS_IR) && 487 (hs->sc_flags & (HPIBF_IO|HPIBF_DONE)) != HPIBF_IO) 488 printf("%s: fhpibintr: bad status %x\n", 489 hs->sc_hc->hp_xname, stat0); 490 fhpibbadint[0]++; 491 #endif 492 return(0); 493 } 494 if ((hs->sc_flags & (HPIBF_IO|HPIBF_DONE)) == HPIBF_IO) { 495 #ifdef DEBUG 496 fhpibbadint[1]++; 497 #endif 498 return(0); 499 } 500 #ifdef DEBUG 501 if ((fhpibdebug & FDB_DMA) && fhpibdebugunit == unit) 502 printf("fhpibintr: flags %x\n", hs->sc_flags); 503 #endif 504 dq = hs->sc_sq.dq_forw; 505 if (hs->sc_flags & HPIBF_IO) { 506 if (hs->sc_flags & HPIBF_TIMO) 507 untimeout(fhpibdmadone, (void *)unit); 508 stat0 = hd->hpib_cmd; 509 hd->hpib_cmd = fhpibcmd[unit] & ~CT_8BIT; 510 hd->hpib_stat = 0; 511 hd->hpib_cmd = CT_REN | CT_8BIT; 512 stat0 = hd->hpib_intr; 513 hd->hpib_imask = 0; 514 hs->sc_flags &= ~(HPIBF_DONE|HPIBF_IO|HPIBF_READ|HPIBF_TIMO); 515 dmafree(&hs->sc_dq); 516 (dq->dq_driver->d_intr)(dq->dq_softc); 517 } else if (hs->sc_flags & HPIBF_PPOLL) { 518 stat0 = hd->hpib_intr; 519 #ifdef DEBUG 520 if ((fhpibdebug & FDB_FAIL) && 521 doppollint && (stat0 & IM_PPRESP) == 0) 522 printf("%s: fhpibintr: bad intr reg %x\n", 523 hs->sc_hc->hp_xname, stat0); 524 #endif 525 hd->hpib_stat = 0; 526 hd->hpib_imask = 0; 527 #ifdef DEBUG 528 stat0 = fhpibppoll(unit); 529 if ((fhpibdebug & FDB_PPOLL) && unit == fhpibdebugunit) 530 printf("fhpibintr: got PPOLL status %x\n", stat0); 531 if ((stat0 & (0x80 >> dq->dq_slave)) == 0) { 532 /* 533 * XXX give it another shot (68040) 534 */ 535 fhpibppollfail[unit]++; 536 DELAY(fhpibppolldelay); 537 stat0 = fhpibppoll(unit); 538 if ((stat0 & (0x80 >> dq->dq_slave)) == 0 && 539 (fhpibdebug & FDB_PPOLL) && unit == fhpibdebugunit) 540 printf("fhpibintr: PPOLL: unit %d slave %d stat %x\n", 541 unit, dq->dq_slave, stat0); 542 } 543 #endif 544 hs->sc_flags &= ~HPIBF_PPOLL; 545 (dq->dq_driver->d_intr)(dq->dq_softc); 546 } 547 return(1); 548 } 549 550 int 551 fhpibppoll(unit) 552 int unit; 553 { 554 register struct fhpibdevice *hd; 555 register int ppoll; 556 557 hd = (struct fhpibdevice *)hpib_softc[unit].sc_hc->hp_addr; 558 hd->hpib_stat = 0; 559 hd->hpib_psense = 0; 560 hd->hpib_pmask = 0xFF; 561 hd->hpib_imask = IM_PPRESP | IM_PABORT; 562 DELAY(25); 563 hd->hpib_intr = IM_PABORT; 564 ppoll = hd->hpib_data; 565 if (hd->hpib_intr & IM_PABORT) 566 ppoll = 0; 567 hd->hpib_imask = 0; 568 hd->hpib_pmask = 0; 569 hd->hpib_stat = ST_IENAB; 570 return(ppoll); 571 } 572 573 int 574 fhpibwait(hd, x) 575 register struct fhpibdevice *hd; 576 int x; 577 { 578 register int timo = hpibtimeout; 579 580 while ((hd->hpib_intr & x) == 0 && --timo) 581 DELAY(1); 582 if (timo == 0) { 583 #ifdef DEBUG 584 if (fhpibdebug & FDB_FAIL) 585 printf("fhpibwait(%x, %x) timeout\n", hd, x); 586 #endif 587 return(-1); 588 } 589 return(0); 590 } 591 592 /* 593 * XXX: this will have to change if we ever allow more than one 594 * pending operation per HP-IB. 595 */ 596 void 597 fhpibppwatch(arg) 598 void *arg; 599 { 600 register int unit; 601 register struct hpib_softc *hs; 602 register struct fhpibdevice *hd; 603 register int slave; 604 605 unit = (int)arg; 606 hs = &hpib_softc[unit]; 607 if ((hs->sc_flags & HPIBF_PPOLL) == 0) 608 return; 609 hd = (struct fhpibdevice *)hs->sc_hc->hp_addr; 610 slave = (0x80 >> hs->sc_sq.dq_forw->dq_slave); 611 #ifdef DEBUG 612 if (!doppollint) { 613 if (fhpibppoll(unit) & slave) { 614 hd->hpib_stat = ST_IENAB; 615 hd->hpib_imask = IM_IDLE | IM_ROOM; 616 } else 617 timeout(fhpibppwatch, (void *)unit, 1); 618 return; 619 } 620 if ((fhpibdebug & FDB_PPOLL) && unit == fhpibdebugunit) 621 printf("fhpibppwatch: sense request on %d\n", unit); 622 #endif 623 hd->hpib_psense = ~slave; 624 hd->hpib_pmask = slave; 625 hd->hpib_stat = ST_IENAB; 626 hd->hpib_imask = IM_PPRESP | IM_PABORT; 627 hd->hpib_ie = IDS_IE; 628 } 629 #endif /* NHPIB > 0 */ 630