1 /* $NetBSD: ap_ms104_sh4_space.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ap_ms104_sh4_space.c,v 1.1 2010/04/06 15:54:29 nonaka Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/device.h> 38 #include <sys/bus.h> 39 #include <sys/intr.h> 40 41 #include <uvm/uvm_extern.h> 42 43 #include <sh3/bscreg.h> 44 #include <sh3/devreg.h> 45 #include <sh3/mmu.h> 46 #include <sh3/pmap.h> 47 #include <sh3/pte.h> 48 49 #include <machine/cpu.h> 50 51 /* 52 * I/O bus space 53 */ 54 #define AP_MS104_SH4_IOMEM_IO 0 /* space is i/o space */ 55 #define AP_MS104_SH4_IOMEM_MEM 1 /* space is mem space */ 56 #define AP_MS104_SH4_IOMEM_PCMCIA_IO 2 /* PCMCIA IO space */ 57 #define AP_MS104_SH4_IOMEM_PCMCIA_MEM 3 /* PCMCIA Mem space */ 58 #define AP_MS104_SH4_IOMEM_PCMCIA_ATT 4 /* PCMCIA Attr space */ 59 #define AP_MS104_SH4_IOMEM_PCMCIA_8BIT 0x8000 /* PCMCIA BUS 8 BIT WIDTH */ 60 #define AP_MS104_SH4_IOMEM_PCMCIA_IO8 \ 61 (AP_MS104_SH4_IOMEM_PCMCIA_IO|AP_MS104_SH4_IOMEM_PCMCIA_8BIT) 62 #define AP_MS104_SH4_IOMEM_PCMCIA_MEM8 \ 63 (AP_MS104_SH4_IOMEM_PCMCIA_MEM|AP_MS104_SH4_IOMEM_PCMCIA_8BIT) 64 #define AP_MS104_SH4_IOMEM_PCMCIA_ATT8 \ 65 (AP_MS104_SH4_IOMEM_PCMCIA_ATT|AP_MS104_SH4_IOMEM_PCMCIA_8BIT) 66 67 int ap_ms104_sh4_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags, 68 bus_space_handle_t *bshp); 69 void ap_ms104_sh4_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size); 70 int ap_ms104_sh4_iomem_subregion(void *v, bus_space_handle_t bsh, 71 bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp); 72 int ap_ms104_sh4_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend, 73 bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags, 74 bus_addr_t *bpap, bus_space_handle_t *bshp); 75 void ap_ms104_sh4_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size); 76 77 static int ap_ms104_sh4_iomem_add_mapping(bus_addr_t, bus_size_t, int, 78 bus_space_handle_t *); 79 80 static int 81 ap_ms104_sh4_iomem_add_mapping(bus_addr_t bpa, bus_size_t size, int type, 82 bus_space_handle_t *bshp) 83 { 84 u_long pa, endpa; 85 vaddr_t va; 86 pt_entry_t *pte; 87 unsigned int m = 0; 88 int io_type = type & ~AP_MS104_SH4_IOMEM_PCMCIA_8BIT; 89 90 pa = sh3_trunc_page(bpa); 91 endpa = sh3_round_page(bpa + size); 92 93 #ifdef DIAGNOSTIC 94 if (endpa <= pa) 95 panic("ap_ms104_sh4_iomem_add_mapping: overflow"); 96 #endif 97 98 va = uvm_km_alloc(kernel_map, endpa - pa, 0, UVM_KMF_VAONLY); 99 if (va == 0){ 100 printf("ap_ms104_sh4_iomem_add_mapping: nomem\n"); 101 return (ENOMEM); 102 } 103 104 *bshp = (bus_space_handle_t)(va + (bpa & PGOFSET)); 105 106 #define MODE(t, s) \ 107 ((t) & AP_MS104_SH4_IOMEM_PCMCIA_8BIT) ? \ 108 _PG_PCMCIA_ ## s ## 8 : \ 109 _PG_PCMCIA_ ## s ## 16 110 switch (io_type) { 111 default: 112 panic("unknown pcmcia space."); 113 /* NOTREACHED */ 114 case AP_MS104_SH4_IOMEM_PCMCIA_IO: 115 m = MODE(type, IO); 116 break; 117 case AP_MS104_SH4_IOMEM_PCMCIA_MEM: 118 m = MODE(type, MEM); 119 break; 120 case AP_MS104_SH4_IOMEM_PCMCIA_ATT: 121 m = MODE(type, ATTR); 122 break; 123 } 124 #undef MODE 125 126 for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) { 127 pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, 0); 128 pte = __pmap_kpte_lookup(va); 129 KDASSERT(pte); 130 *pte |= m; /* PTEA PCMCIA assistant bit */ 131 sh_tlb_update(0, va, *pte); 132 } 133 134 return (0); 135 } 136 137 int 138 ap_ms104_sh4_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, 139 int flags, bus_space_handle_t *bshp) 140 { 141 bus_addr_t addr = SH3_PHYS_TO_P2SEG(bpa); 142 int error; 143 144 KASSERT((bpa & SH3_PHYS_MASK) == bpa); 145 146 if (bpa < 0x14000000 || bpa >= 0x1c000000) { 147 /* CS0,1,2,3,4,7 */ 148 *bshp = (bus_space_handle_t)addr; 149 return (0); 150 } 151 152 /* CS5,6 */ 153 error = ap_ms104_sh4_iomem_add_mapping(addr, size, (int)(u_long)v, bshp); 154 155 return (error); 156 } 157 158 void 159 ap_ms104_sh4_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size) 160 { 161 u_long va, endva; 162 bus_addr_t bpa; 163 164 if (bsh >= SH3_P2SEG_BASE && bsh <= SH3_P2SEG_END) { 165 /* maybe CS0,1,2,3,4,7 */ 166 return; 167 } 168 169 /* CS5,6 */ 170 va = sh3_trunc_page(bsh); 171 endva = sh3_round_page(bsh + size); 172 173 #ifdef DIAGNOSTIC 174 if (endva <= va) 175 panic("ap_ms104_sh4_io_unmap: overflow"); 176 #endif 177 178 pmap_extract(pmap_kernel(), va, &bpa); 179 bpa += bsh & PGOFSET; 180 181 pmap_kremove(va, endva - va); 182 183 /* 184 * Free the kernel virtual mapping. 185 */ 186 uvm_km_free(kernel_map, va, endva - va, UVM_KMF_VAONLY); 187 } 188 189 int 190 ap_ms104_sh4_iomem_subregion(void *v, bus_space_handle_t bsh, 191 bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp) 192 { 193 194 *nbshp = bsh + offset; 195 196 return (0); 197 } 198 199 int 200 ap_ms104_sh4_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend, 201 bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags, 202 bus_addr_t *bpap, bus_space_handle_t *bshp) 203 { 204 205 *bshp = *bpap = rstart; 206 207 return (0); 208 } 209 210 void 211 ap_ms104_sh4_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size) 212 { 213 214 ap_ms104_sh4_iomem_unmap(v, bsh, size); 215 } 216 217 /* 218 * on-board I/O bus space read/write 219 */ 220 uint8_t ap_ms104_sh4_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset); 221 uint16_t ap_ms104_sh4_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset); 222 uint32_t ap_ms104_sh4_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset); 223 void ap_ms104_sh4_iomem_read_multi_1(void *v, bus_space_handle_t bsh, 224 bus_size_t offset, uint8_t *addr, bus_size_t count); 225 void ap_ms104_sh4_iomem_read_multi_2(void *v, bus_space_handle_t bsh, 226 bus_size_t offset, uint16_t *addr, bus_size_t count); 227 void ap_ms104_sh4_iomem_read_multi_4(void *v, bus_space_handle_t bsh, 228 bus_size_t offset, uint32_t *addr, bus_size_t count); 229 void ap_ms104_sh4_iomem_read_region_1(void *v, bus_space_handle_t bsh, 230 bus_size_t offset, uint8_t *addr, bus_size_t count); 231 void ap_ms104_sh4_iomem_read_region_2(void *v, bus_space_handle_t bsh, 232 bus_size_t offset, uint16_t *addr, bus_size_t count); 233 void ap_ms104_sh4_iomem_read_region_4(void *v, bus_space_handle_t bsh, 234 bus_size_t offset, uint32_t *addr, bus_size_t count); 235 void ap_ms104_sh4_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset, 236 uint8_t value); 237 void ap_ms104_sh4_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset, 238 uint16_t value); 239 void ap_ms104_sh4_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset, 240 uint32_t value); 241 void ap_ms104_sh4_iomem_write_multi_1(void *v, bus_space_handle_t bsh, 242 bus_size_t offset, const uint8_t *addr, bus_size_t count); 243 void ap_ms104_sh4_iomem_write_multi_2(void *v, bus_space_handle_t bsh, 244 bus_size_t offset, const uint16_t *addr, bus_size_t count); 245 void ap_ms104_sh4_iomem_write_multi_4(void *v, bus_space_handle_t bsh, 246 bus_size_t offset, const uint32_t *addr, bus_size_t count); 247 void ap_ms104_sh4_iomem_write_region_1(void *v, bus_space_handle_t bsh, 248 bus_size_t offset, const uint8_t *addr, bus_size_t count); 249 void ap_ms104_sh4_iomem_write_region_2(void *v, bus_space_handle_t bsh, 250 bus_size_t offset, const uint16_t *addr, bus_size_t count); 251 void ap_ms104_sh4_iomem_write_region_4(void *v, bus_space_handle_t bsh, 252 bus_size_t offset, const uint32_t *addr, bus_size_t count); 253 void ap_ms104_sh4_iomem_set_multi_1(void *v, bus_space_handle_t bsh, bus_size_t offset, 254 uint8_t val, bus_size_t count); 255 void ap_ms104_sh4_iomem_set_multi_2(void *v, bus_space_handle_t bsh, bus_size_t offset, 256 uint16_t val, bus_size_t count); 257 void ap_ms104_sh4_iomem_set_multi_4(void *v, bus_space_handle_t bsh, bus_size_t offset, 258 uint32_t val, bus_size_t count); 259 void ap_ms104_sh4_iomem_set_region_1(void *v, bus_space_handle_t bsh, 260 bus_size_t offset, uint8_t val, bus_size_t count); 261 void ap_ms104_sh4_iomem_set_region_2(void *v, bus_space_handle_t bsh, 262 bus_size_t offset, uint16_t val, bus_size_t count); 263 void ap_ms104_sh4_iomem_set_region_4(void *v, bus_space_handle_t bsh, 264 bus_size_t offset, uint32_t val, bus_size_t count); 265 void ap_ms104_sh4_iomem_copy_region_1(void *v, bus_space_handle_t h1, bus_size_t o1, 266 bus_space_handle_t h2, bus_size_t o2, bus_size_t count); 267 void ap_ms104_sh4_iomem_copy_region_2(void *v, bus_space_handle_t h1, bus_size_t o1, 268 bus_space_handle_t h2, bus_size_t o2, bus_size_t count); 269 void ap_ms104_sh4_iomem_copy_region_4(void *v, bus_space_handle_t h1, bus_size_t o1, 270 bus_space_handle_t h2, bus_size_t o2, bus_size_t count); 271 272 struct _bus_space ap_ms104_sh4_bus_io = 273 { 274 .bs_cookie = (void *)AP_MS104_SH4_IOMEM_PCMCIA_IO, 275 276 .bs_map = ap_ms104_sh4_iomem_map, 277 .bs_unmap = ap_ms104_sh4_iomem_unmap, 278 .bs_subregion = ap_ms104_sh4_iomem_subregion, 279 280 .bs_alloc = ap_ms104_sh4_iomem_alloc, 281 .bs_free = ap_ms104_sh4_iomem_free, 282 283 .bs_r_1 = ap_ms104_sh4_iomem_read_1, 284 .bs_r_2 = ap_ms104_sh4_iomem_read_2, 285 .bs_r_4 = ap_ms104_sh4_iomem_read_4, 286 287 .bs_rm_1 = ap_ms104_sh4_iomem_read_multi_1, 288 .bs_rm_2 = ap_ms104_sh4_iomem_read_multi_2, 289 .bs_rm_4 = ap_ms104_sh4_iomem_read_multi_4, 290 291 .bs_rr_1 = ap_ms104_sh4_iomem_read_region_1, 292 .bs_rr_2 = ap_ms104_sh4_iomem_read_region_2, 293 .bs_rr_4 = ap_ms104_sh4_iomem_read_region_4, 294 295 .bs_rs_1 = ap_ms104_sh4_iomem_read_1, 296 .bs_rs_2 = ap_ms104_sh4_iomem_read_2, 297 .bs_rs_4 = ap_ms104_sh4_iomem_read_4, 298 299 .bs_rms_1 = ap_ms104_sh4_iomem_read_multi_1, 300 .bs_rms_2 = ap_ms104_sh4_iomem_read_multi_2, 301 .bs_rms_4 = ap_ms104_sh4_iomem_read_multi_4, 302 303 .bs_rrs_1 = ap_ms104_sh4_iomem_read_region_1, 304 .bs_rrs_2 = ap_ms104_sh4_iomem_read_region_2, 305 .bs_rrs_4 = ap_ms104_sh4_iomem_read_region_4, 306 307 .bs_w_1 = ap_ms104_sh4_iomem_write_1, 308 .bs_w_2 = ap_ms104_sh4_iomem_write_2, 309 .bs_w_4 = ap_ms104_sh4_iomem_write_4, 310 311 .bs_wm_1 = ap_ms104_sh4_iomem_write_multi_1, 312 .bs_wm_2 = ap_ms104_sh4_iomem_write_multi_2, 313 .bs_wm_4 = ap_ms104_sh4_iomem_write_multi_4, 314 315 .bs_wr_1 = ap_ms104_sh4_iomem_write_region_1, 316 .bs_wr_2 = ap_ms104_sh4_iomem_write_region_2, 317 .bs_wr_4 = ap_ms104_sh4_iomem_write_region_4, 318 319 .bs_ws_1 = ap_ms104_sh4_iomem_write_1, 320 .bs_ws_2 = ap_ms104_sh4_iomem_write_2, 321 .bs_ws_4 = ap_ms104_sh4_iomem_write_4, 322 323 .bs_wms_1 = ap_ms104_sh4_iomem_write_multi_1, 324 .bs_wms_2 = ap_ms104_sh4_iomem_write_multi_2, 325 .bs_wms_4 = ap_ms104_sh4_iomem_write_multi_4, 326 327 .bs_wrs_1 = ap_ms104_sh4_iomem_write_region_1, 328 .bs_wrs_2 = ap_ms104_sh4_iomem_write_region_2, 329 .bs_wrs_4 = ap_ms104_sh4_iomem_write_region_4, 330 331 .bs_sm_1 = ap_ms104_sh4_iomem_set_multi_1, 332 .bs_sm_2 = ap_ms104_sh4_iomem_set_multi_2, 333 .bs_sm_4 = ap_ms104_sh4_iomem_set_multi_4, 334 335 .bs_sr_1 = ap_ms104_sh4_iomem_set_region_1, 336 .bs_sr_2 = ap_ms104_sh4_iomem_set_region_2, 337 .bs_sr_4 = ap_ms104_sh4_iomem_set_region_4, 338 339 .bs_c_1 = ap_ms104_sh4_iomem_copy_region_1, 340 .bs_c_2 = ap_ms104_sh4_iomem_copy_region_2, 341 .bs_c_4 = ap_ms104_sh4_iomem_copy_region_4, 342 }; 343 344 struct _bus_space ap_ms104_sh4_bus_mem = 345 { 346 .bs_cookie = (void *)AP_MS104_SH4_IOMEM_PCMCIA_MEM, 347 348 .bs_map = ap_ms104_sh4_iomem_map, 349 .bs_unmap = ap_ms104_sh4_iomem_unmap, 350 .bs_subregion = ap_ms104_sh4_iomem_subregion, 351 352 .bs_alloc = ap_ms104_sh4_iomem_alloc, 353 .bs_free = ap_ms104_sh4_iomem_free, 354 355 .bs_r_1 = ap_ms104_sh4_iomem_read_1, 356 .bs_r_2 = ap_ms104_sh4_iomem_read_2, 357 .bs_r_4 = ap_ms104_sh4_iomem_read_4, 358 359 .bs_rm_1 = ap_ms104_sh4_iomem_read_multi_1, 360 .bs_rm_2 = ap_ms104_sh4_iomem_read_multi_2, 361 .bs_rm_4 = ap_ms104_sh4_iomem_read_multi_4, 362 363 .bs_rr_1 = ap_ms104_sh4_iomem_read_region_1, 364 .bs_rr_2 = ap_ms104_sh4_iomem_read_region_2, 365 .bs_rr_4 = ap_ms104_sh4_iomem_read_region_4, 366 367 .bs_rs_1 = ap_ms104_sh4_iomem_read_1, 368 .bs_rs_2 = ap_ms104_sh4_iomem_read_2, 369 .bs_rs_4 = ap_ms104_sh4_iomem_read_4, 370 371 .bs_rms_1 = ap_ms104_sh4_iomem_read_multi_1, 372 .bs_rms_2 = ap_ms104_sh4_iomem_read_multi_2, 373 .bs_rms_4 = ap_ms104_sh4_iomem_read_multi_4, 374 375 .bs_rrs_1 = ap_ms104_sh4_iomem_read_region_1, 376 .bs_rrs_2 = ap_ms104_sh4_iomem_read_region_2, 377 .bs_rrs_4 = ap_ms104_sh4_iomem_read_region_4, 378 379 .bs_w_1 = ap_ms104_sh4_iomem_write_1, 380 .bs_w_2 = ap_ms104_sh4_iomem_write_2, 381 .bs_w_4 = ap_ms104_sh4_iomem_write_4, 382 383 .bs_wm_1 = ap_ms104_sh4_iomem_write_multi_1, 384 .bs_wm_2 = ap_ms104_sh4_iomem_write_multi_2, 385 .bs_wm_4 = ap_ms104_sh4_iomem_write_multi_4, 386 387 .bs_wr_1 = ap_ms104_sh4_iomem_write_region_1, 388 .bs_wr_2 = ap_ms104_sh4_iomem_write_region_2, 389 .bs_wr_4 = ap_ms104_sh4_iomem_write_region_4, 390 391 .bs_ws_1 = ap_ms104_sh4_iomem_write_1, 392 .bs_ws_2 = ap_ms104_sh4_iomem_write_2, 393 .bs_ws_4 = ap_ms104_sh4_iomem_write_4, 394 395 .bs_wms_1 = ap_ms104_sh4_iomem_write_multi_1, 396 .bs_wms_2 = ap_ms104_sh4_iomem_write_multi_2, 397 .bs_wms_4 = ap_ms104_sh4_iomem_write_multi_4, 398 399 .bs_wrs_1 = ap_ms104_sh4_iomem_write_region_1, 400 .bs_wrs_2 = ap_ms104_sh4_iomem_write_region_2, 401 .bs_wrs_4 = ap_ms104_sh4_iomem_write_region_4, 402 403 .bs_sm_1 = ap_ms104_sh4_iomem_set_multi_1, 404 .bs_sm_2 = ap_ms104_sh4_iomem_set_multi_2, 405 .bs_sm_4 = ap_ms104_sh4_iomem_set_multi_4, 406 407 .bs_sr_1 = ap_ms104_sh4_iomem_set_region_1, 408 .bs_sr_2 = ap_ms104_sh4_iomem_set_region_2, 409 .bs_sr_4 = ap_ms104_sh4_iomem_set_region_4, 410 411 .bs_c_1 = ap_ms104_sh4_iomem_copy_region_1, 412 .bs_c_2 = ap_ms104_sh4_iomem_copy_region_2, 413 .bs_c_4 = ap_ms104_sh4_iomem_copy_region_4, 414 }; 415 416 struct _bus_space ap_ms104_sh4_bus_att = 417 { 418 .bs_cookie = (void *)AP_MS104_SH4_IOMEM_PCMCIA_ATT, 419 420 .bs_map = ap_ms104_sh4_iomem_map, 421 .bs_unmap = ap_ms104_sh4_iomem_unmap, 422 .bs_subregion = ap_ms104_sh4_iomem_subregion, 423 424 .bs_alloc = ap_ms104_sh4_iomem_alloc, 425 .bs_free = ap_ms104_sh4_iomem_free, 426 427 .bs_r_1 = ap_ms104_sh4_iomem_read_1, 428 .bs_r_2 = ap_ms104_sh4_iomem_read_2, 429 .bs_r_4 = ap_ms104_sh4_iomem_read_4, 430 431 .bs_rm_1 = ap_ms104_sh4_iomem_read_multi_1, 432 .bs_rm_2 = ap_ms104_sh4_iomem_read_multi_2, 433 .bs_rm_4 = ap_ms104_sh4_iomem_read_multi_4, 434 435 .bs_rr_1 = ap_ms104_sh4_iomem_read_region_1, 436 .bs_rr_2 = ap_ms104_sh4_iomem_read_region_2, 437 .bs_rr_4 = ap_ms104_sh4_iomem_read_region_4, 438 439 .bs_rs_1 = ap_ms104_sh4_iomem_read_1, 440 .bs_rs_2 = ap_ms104_sh4_iomem_read_2, 441 .bs_rs_4 = ap_ms104_sh4_iomem_read_4, 442 443 .bs_rms_1 = ap_ms104_sh4_iomem_read_multi_1, 444 .bs_rms_2 = ap_ms104_sh4_iomem_read_multi_2, 445 .bs_rms_4 = ap_ms104_sh4_iomem_read_multi_4, 446 447 .bs_rrs_1 = ap_ms104_sh4_iomem_read_region_1, 448 .bs_rrs_2 = ap_ms104_sh4_iomem_read_region_2, 449 .bs_rrs_4 = ap_ms104_sh4_iomem_read_region_4, 450 451 .bs_w_1 = ap_ms104_sh4_iomem_write_1, 452 .bs_w_2 = ap_ms104_sh4_iomem_write_2, 453 .bs_w_4 = ap_ms104_sh4_iomem_write_4, 454 455 .bs_wm_1 = ap_ms104_sh4_iomem_write_multi_1, 456 .bs_wm_2 = ap_ms104_sh4_iomem_write_multi_2, 457 .bs_wm_4 = ap_ms104_sh4_iomem_write_multi_4, 458 459 .bs_wr_1 = ap_ms104_sh4_iomem_write_region_1, 460 .bs_wr_2 = ap_ms104_sh4_iomem_write_region_2, 461 .bs_wr_4 = ap_ms104_sh4_iomem_write_region_4, 462 463 .bs_ws_1 = ap_ms104_sh4_iomem_write_1, 464 .bs_ws_2 = ap_ms104_sh4_iomem_write_2, 465 .bs_ws_4 = ap_ms104_sh4_iomem_write_4, 466 467 .bs_wms_1 = ap_ms104_sh4_iomem_write_multi_1, 468 .bs_wms_2 = ap_ms104_sh4_iomem_write_multi_2, 469 .bs_wms_4 = ap_ms104_sh4_iomem_write_multi_4, 470 471 .bs_wrs_1 = ap_ms104_sh4_iomem_write_region_1, 472 .bs_wrs_2 = ap_ms104_sh4_iomem_write_region_2, 473 .bs_wrs_4 = ap_ms104_sh4_iomem_write_region_4, 474 475 .bs_sm_1 = ap_ms104_sh4_iomem_set_multi_1, 476 .bs_sm_2 = ap_ms104_sh4_iomem_set_multi_2, 477 .bs_sm_4 = ap_ms104_sh4_iomem_set_multi_4, 478 479 .bs_sr_1 = ap_ms104_sh4_iomem_set_region_1, 480 .bs_sr_2 = ap_ms104_sh4_iomem_set_region_2, 481 .bs_sr_4 = ap_ms104_sh4_iomem_set_region_4, 482 483 .bs_c_1 = ap_ms104_sh4_iomem_copy_region_1, 484 .bs_c_2 = ap_ms104_sh4_iomem_copy_region_2, 485 .bs_c_4 = ap_ms104_sh4_iomem_copy_region_4, 486 }; 487 488 /* read */ 489 uint8_t 490 ap_ms104_sh4_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset) 491 { 492 493 return *(volatile uint8_t *)(bsh + offset); 494 } 495 496 uint16_t 497 ap_ms104_sh4_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset) 498 { 499 500 return (*(volatile uint16_t *)(bsh + offset)); 501 } 502 503 uint32_t 504 ap_ms104_sh4_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset) 505 { 506 507 return (*(volatile uint32_t *)(bsh + offset)); 508 } 509 510 void 511 ap_ms104_sh4_iomem_read_multi_1(void *v, bus_space_handle_t bsh, 512 bus_size_t offset, uint8_t *addr, bus_size_t count) 513 { 514 volatile uint8_t *p = (void *)(bsh + offset); 515 516 while (count--) { 517 *addr++ = *p; 518 } 519 } 520 521 void 522 ap_ms104_sh4_iomem_read_multi_2(void *v, bus_space_handle_t bsh, 523 bus_size_t offset, uint16_t *addr, bus_size_t count) 524 { 525 volatile uint16_t *src = (void *)(bsh + offset); 526 volatile uint16_t *dest = (void *)addr; 527 528 while (count--) { 529 *dest++ = *src; 530 } 531 } 532 533 void 534 ap_ms104_sh4_iomem_read_multi_4(void *v, bus_space_handle_t bsh, 535 bus_size_t offset, uint32_t *addr, bus_size_t count) 536 { 537 volatile uint32_t *src = (void *)(bsh + offset); 538 volatile uint32_t *dest = (void *)addr; 539 540 while (count--) { 541 *dest++ = *src; 542 } 543 } 544 545 void 546 ap_ms104_sh4_iomem_read_region_1(void *v, bus_space_handle_t bsh, 547 bus_size_t offset, uint8_t *addr, bus_size_t count) 548 { 549 volatile uint8_t *p = (void *)(bsh + offset); 550 551 while (count--) { 552 *addr++ = *p++; 553 } 554 } 555 556 void 557 ap_ms104_sh4_iomem_read_region_2(void *v, bus_space_handle_t bsh, 558 bus_size_t offset, uint16_t *addr, bus_size_t count) 559 { 560 volatile uint16_t *p = (void *)(bsh + offset); 561 562 while (count--) { 563 *addr++ = *p++; 564 } 565 } 566 567 void 568 ap_ms104_sh4_iomem_read_region_4(void *v, bus_space_handle_t bsh, 569 bus_size_t offset, uint32_t *addr, bus_size_t count) 570 { 571 volatile uint32_t *p = (void *)(bsh + offset); 572 573 while (count--) { 574 *addr++ = *p++; 575 } 576 } 577 578 /* write */ 579 void 580 ap_ms104_sh4_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset, 581 uint8_t value) 582 { 583 584 *(volatile uint8_t *)(bsh + offset) = value; 585 } 586 587 void 588 ap_ms104_sh4_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset, 589 uint16_t value) 590 { 591 592 *(volatile uint16_t *)(bsh + offset) = value; 593 } 594 595 void 596 ap_ms104_sh4_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset, 597 uint32_t value) 598 { 599 600 *(volatile uint32_t *)(bsh + offset) = value; 601 } 602 603 void 604 ap_ms104_sh4_iomem_write_multi_1(void *v, bus_space_handle_t bsh, 605 bus_size_t offset, const uint8_t *addr, bus_size_t count) 606 { 607 volatile uint8_t *p = (void *)(bsh + offset); 608 609 while (count--) { 610 *p = *addr++; 611 } 612 } 613 614 void 615 ap_ms104_sh4_iomem_write_multi_2(void *v, bus_space_handle_t bsh, 616 bus_size_t offset, const uint16_t *addr, bus_size_t count) 617 { 618 volatile uint16_t *dest = (void *)(bsh + offset); 619 volatile const uint16_t *src = (const void *)addr; 620 621 while (count--) { 622 *dest = *src++; 623 } 624 } 625 626 void 627 ap_ms104_sh4_iomem_write_multi_4(void *v, bus_space_handle_t bsh, 628 bus_size_t offset, const uint32_t *addr, bus_size_t count) 629 { 630 volatile uint32_t *dest = (void *)(bsh + offset); 631 volatile const uint32_t *src = (const void *)addr; 632 633 while (count--) { 634 *dest = *src++; 635 } 636 } 637 638 void 639 ap_ms104_sh4_iomem_write_region_1(void *v, bus_space_handle_t bsh, 640 bus_size_t offset, const uint8_t *addr, bus_size_t count) 641 { 642 volatile uint8_t *p = (void *)(bsh + offset); 643 644 while (count--) { 645 *p++ = *addr++; 646 } 647 } 648 649 void 650 ap_ms104_sh4_iomem_write_region_2(void *v, bus_space_handle_t bsh, 651 bus_size_t offset, const uint16_t *addr, bus_size_t count) 652 { 653 volatile uint16_t *p = (void *)(bsh + offset); 654 655 while (count--) { 656 *p++ = *addr++; 657 } 658 } 659 660 void 661 ap_ms104_sh4_iomem_write_region_4(void *v, bus_space_handle_t bsh, 662 bus_size_t offset, const uint32_t *addr, bus_size_t count) 663 { 664 volatile uint32_t *p = (void *)(bsh + offset); 665 666 while (count--) { 667 *p++ = *addr++; 668 } 669 } 670 671 void 672 ap_ms104_sh4_iomem_set_multi_1(void *v, bus_space_handle_t bsh, 673 bus_size_t offset, uint8_t val, bus_size_t count) 674 { 675 volatile uint8_t *p = (void *)(bsh + offset); 676 677 while (count--) { 678 *p = val; 679 } 680 } 681 682 void 683 ap_ms104_sh4_iomem_set_multi_2(void *v, bus_space_handle_t bsh, 684 bus_size_t offset, uint16_t val, bus_size_t count) 685 { 686 volatile uint16_t *dest = (void *)(bsh + offset); 687 688 while (count--) { 689 *dest = val; 690 } 691 } 692 693 void 694 ap_ms104_sh4_iomem_set_multi_4(void *v, bus_space_handle_t bsh, 695 bus_size_t offset, uint32_t val, bus_size_t count) 696 { 697 volatile uint32_t *dest = (void *)(bsh + offset); 698 699 while (count--) { 700 *dest = val; 701 } 702 } 703 704 void 705 ap_ms104_sh4_iomem_set_region_1(void *v, bus_space_handle_t bsh, 706 bus_size_t offset, uint8_t val, bus_size_t count) 707 { 708 volatile uint8_t *addr = (void *)(bsh + offset); 709 710 while (count--) { 711 *addr++ = val; 712 } 713 } 714 715 void 716 ap_ms104_sh4_iomem_set_region_2(void *v, bus_space_handle_t bsh, 717 bus_size_t offset, uint16_t val, bus_size_t count) 718 { 719 volatile uint16_t *dest = (void *)(bsh + offset); 720 721 while (count--) { 722 *dest++ = val; 723 } 724 } 725 726 void 727 ap_ms104_sh4_iomem_set_region_4(void *v, bus_space_handle_t bsh, 728 bus_size_t offset, uint32_t val, bus_size_t count) 729 { 730 volatile uint32_t *dest = (void *)(bsh + offset); 731 732 while (count--) { 733 *dest++ = val; 734 } 735 } 736 737 void 738 ap_ms104_sh4_iomem_copy_region_1(void *v, bus_space_handle_t h1, bus_size_t o1, 739 bus_space_handle_t h2, bus_size_t o2, bus_size_t count) 740 { 741 volatile uint8_t *addr1 = (void *)(h1 + o1); 742 volatile uint8_t *addr2 = (void *)(h2 + o2); 743 744 if (addr1 >= addr2) { /* src after dest: copy forward */ 745 while (count--) { 746 *addr2++ = *addr1++; 747 } 748 } else { /* dest after src: copy backwards */ 749 addr1 += count - 1; 750 addr2 += count - 1; 751 while (count--) { 752 *addr2-- = *addr1--; 753 } 754 } 755 } 756 757 void 758 ap_ms104_sh4_iomem_copy_region_2(void *v, bus_space_handle_t h1, bus_size_t o1, 759 bus_space_handle_t h2, bus_size_t o2, bus_size_t count) 760 { 761 volatile uint16_t *addr1 = (void *)(h1 + o1); 762 volatile uint16_t *addr2 = (void *)(h2 + o2); 763 764 if (addr1 >= addr2) { /* src after dest: copy forward */ 765 while (count--) { 766 *addr2++ = *addr1++; 767 } 768 } else { /* dest after src: copy backwards */ 769 addr1 += count - 1; 770 addr2 += count - 1; 771 while (count--) { 772 *addr2-- = *addr1--; 773 } 774 } 775 } 776 777 void 778 ap_ms104_sh4_iomem_copy_region_4(void *v, bus_space_handle_t h1, bus_size_t o1, 779 bus_space_handle_t h2, bus_size_t o2, bus_size_t count) 780 { 781 volatile uint32_t *addr1 = (void *)(h1 + o1); 782 volatile uint32_t *addr2 = (void *)(h2 + o2); 783 784 if (addr1 >= addr2) { /* src after dest: copy forward */ 785 while (count--) { 786 *addr2++ = *addr1++; 787 } 788 } else { /* dest after src: copy backwards */ 789 addr1 += count - 1; 790 addr2 += count - 1; 791 while (count--) { 792 *addr2-- = *addr1--; 793 } 794 } 795 } 796