1 /* $NetBSD: dcr.h,v 1.1 2006/12/02 22:18:47 freza Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Jachym Holecek 5 * All rights reserved. 6 * 7 * Written for DFC Design, s.r.o. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * DCR is an user accesible bus on Xilinx PPC405D5Xn cores and may contain 34 * arbitrary devices. Because we want to be able to share drivers with 35 * OPB/PLB, we make it a bus space backend. Each platform ("design", "board") 36 * has to provide the leaf _read_4/_write_4 routines specific to device 37 * instances. This is dictated by the fact that DCR can only by accessed 38 * by m{f,t}dcr instructions for which the address is encoded as immediate 39 * operand (and hence needs to be a compile-time constant). 40 * 41 * The flexibility is well worth the price of one indirection (and a sum 42 * and a branch), critical paths can still be implemented with m{f,t}dcr(). 43 */ 44 45 #ifndef _VIRTEX_DCRVAR_H_ 46 #define _VIRTEX_DCRVAR_H_ 47 48 49 /* From evbppc/virtex/machdep.c */ 50 int dcr_subregion(bus_space_tag_t, bus_space_handle_t, bus_size_t, 51 bus_size_t, bus_space_handle_t *); 52 int dcr_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, 53 bus_space_handle_t *); 54 void dcr_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t); 55 56 /* Bus space tag contents, one tag per DCR device. */ 57 #define DCR_BST_BODY(base, read, write) \ 58 .pbs_flags = _BUS_SPACE_BIG_ENDIAN, \ 59 .pbs_offset = 0, \ 60 .pbs_base = (base), \ 61 .pbs_limit = 0x03ff, \ 62 .pbs_scalar = { \ 63 .pbss_write_4 = (write), \ 64 .pbss_read_4 = (read), \ 65 }, \ 66 .pbs_map = dcr_map, \ 67 .pbs_unmap = dcr_unmap, \ 68 .pbs_subregion = dcr_subregion, 69 70 /* 71 * Utility macros for leaf access routines. Note they assume variables 72 * in local scope, and are furthermore assumed to be used in switch() 73 * dispatch over destination address. 74 */ 75 #define WCASE(base, addr) \ 76 case (addr): mtdcr((base) + (addr) / 4, val); break 77 78 #define WDEAD(addr) \ 79 default: panic("%s: unexpected offset %#08x", __func__, (addr)) 80 81 #define RCASE(base, addr) \ 82 case (addr): val = mfdcr((base) + (addr) / 4); break 83 84 #define RDEAD(addr) \ 85 default: panic("%s: unexpected offset %#08x", __func__, (addr)) 86 87 #endif /* _VIRTEX_DCRVAR_H_ */ 88