1/* $NetBSD: obs200_locore.S,v 1.2 2005/12/11 12:17:12 christos Exp $ */ 2/* Original Tag: locore.S,v 1.1 2003/09/23 15:21:58 shige Exp */ 3/* $OpenBSD: locore.S,v 1.4 1997/01/26 09:06:38 rahnds Exp $ */ 4 5/* 6 * Copyright 2001 Wasabi Systems, Inc. 7 * All rights reserved. 8 * 9 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed for the NetBSD Project by 22 * Wasabi Systems, Inc. 23 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 24 * or promote products derived from this software without specific prior 25 * written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40/* 41 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 42 * Copyright (C) 1995, 1996 TooLs GmbH. 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by TooLs GmbH. 56 * 4. The name of TooLs GmbH may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 63 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 64 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 65 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 66 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 67 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 68 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71#undef PPC_4XX_NOCACHE 72#define _NOREGNAMES 73 74#include "opt_ddb.h" 75#include "opt_ipkdb.h" 76#include "opt_lockdebug.h" 77#include "opt_multiprocessor.h" 78#include "opt_ppcarch.h" 79#include "opt_ppcparam.h" 80#include "assym.h" 81#include "ksyms.h" 82 83#include <sys/syscall.h> 84 85#include <machine/param.h> 86#include <machine/psl.h> 87#include <machine/trap.h> 88#include <machine/asm.h> 89 90#include <powerpc/spr.h> 91#include <powerpc/ibm4xx/dcr405gp.h> 92#include <powerpc/ibm4xx/pmap.h> 93 94/* Function pointer for requesting board_config_data from OpenBlockS S/R BIOS */ 95#define BOARD_CFG_FP (0x00100000) 96 97/* 98 * Some instructions gas doesn't understand (yet?) 99 */ 100#define bdneq bdnzf 2, 101 102/* 103 * Globals 104 */ 105GLOBAL(proc0paddr) 106 .long 0 /* proc0 p_addr */ 107 108GLOBAL(intrnames) 109 .asciz "clock", "irq1", "irq2", "irq3" 110 .asciz "irq4", "irq5", "irq6", "irq7" 111 .asciz "irq8", "irq9", "irq10", "irq11" 112 .asciz "irq12", "irq13", "irq14", "irq15" 113 .asciz "irq16", "irq17", "irq18", "irq19" 114 .asciz "irq20", "irq21", "irq22", "irq23" 115 .asciz "irq24", "irq25", "irq26", "irq27" 116 .asciz "irq28", "softnet", "softclock", "softserial" 117 .asciz "statclock" 118GLOBAL(eintrnames) 119 .align 4 120GLOBAL(intrcnt) 121 .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 122 .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 123 .long 0 124GLOBAL(eintrcnt) 125 126/* 127 * This symbol is here for the benefit of kvm_mkdb, and is supposed to 128 * mark the start of kernel text. 129 */ 130 .text 131 .globl _C_LABEL(kernel_text) 132_C_LABEL(kernel_text): 133 134/* 135 * Startup entry. Note, this must be the first thing in the text 136 * segment! 137 */ 138 .text 139 .globl __start 140__start: 141 b 1f 142 /* Reserve some space for info_block required for IBM eval board bootloader */ 143 nop 144 nop 145 nop 146 nop 147 nop 148 nop 149 nop 150 nop 151 nop 152 nop 153 1541: 155 /* Get the board_config_data from openbios */ 156 lis %r3,BOARD_CFG_FP@h 157 ori %r3,%r3,BOARD_CFG_FP@l 158 mr %r31,%r3 /* Save value in r31 */ 159 160 li %r0,0 161 mtmsr %r0 /* Disable FPU/MMU/exceptions */ 162 isync 163 164 /* PPC405GP errata, item #58. 165 * Load string instructions may write incorrect data into the last GPR 166 * targeted in the operation. 167 * Workaround: set OCM0_DSCNTL[DSEN]=0 and OCM0_DSCNTL[DOF]=0 */ 168 mtdcr DCR_OCM0_DSCNTL, %r0 /* Disable Data access to OCM */ 169 mtdcr DCR_OCM0_ISCNTL, %r0 /* Disable Instruction access to OCM. Just in case */ 170/* 171 * Cpu detect. 172 * 173 */ 174__start_cpu0: 175#ifdef PPC_4XX_NOCACHE 176 /* Disable all caches for physical addresses */ 177 li %r0,0 178#else 179 /* Allow cacheing for only the first 2GB of RAM */ 180 lis %r0,0xffff 181#endif 182 mtdccr %r0 183 mticcr %r0 184 185 /* Invalidate all TLB entries */ 186 tlbia 187 sync 188 isync 189/* get start of bss */ 190 lis %r3,_C_LABEL(_edata)-4@ha 191 addi %r3,%r3,_C_LABEL(_edata)-4@l 192/* get end of kernel memory */ 193 lis %r8,_C_LABEL(end)@ha 194 addi %r8,%r8,_C_LABEL(end)@l 195/* zero bss */ 196 li %r4,0 1972: stwu %r4,%r4(3) 198 cmpw %r3,%r8 199 bne+ 2b 200 201#if NKSYMS || defined(DDB) || defined(LKM) 202 /* If we had symbol table location we'd store it here and would've adjusted r8 here */ 203 lis %r7,_C_LABEL(startsym)@ha 204 addi %r7,%r7,_C_LABEL(startsym)@l 205 stw %r8,0(%r7) 206 lis %r7,_C_LABEL(endsym)@ha 207 addi %r7,%r7,_C_LABEL(endsym)@l 208 stw %r8,0(%r7) 209#endif 210 211 /* 212 * Set up TLB entry to cover kernel addresses. 213 * 214 * XXX: Skip TLB 0 for now, due to unresolved TLB 0 replacement 215 * and hard hangs 216 */ 217 li %r0,1 218 mtpid %r0 219 sync 220 221 li %r0,0 222#ifdef PPC_4XX_NOCACHE 223 li %r4,TLB_EX|TLB_WR|TLB_I /* |TLB_W */ 224#else 225 li %r4,TLB_EX|TLB_WR /* |TLB_W */ 226#endif 227 li %r3,TLB_VALID|TLB_PG_16M 228 tlbwe %r4,%r0,1 /* Load the data(Low) portion of the entry */ 229 tlbwe %r3,%r0,0 /* Load the tag(High) portion of the entry */ 230 231#if 1 232 /* Damn. Have to be able to access all real memory.... Hardcode for 32M for now. */ 233 li %r0,1 234 lis %r4,0x01000000@h 235 ori %r3,%r4,0 236#ifdef PPC_4XX_NOCACHE 237 addi %r4,%r4,TLB_EX|TLB_WR|TLB_I /* |TLB_W */ 238#else 239 addi %r4,%r4,TLB_EX|TLB_WR /* |TLB_W */ 240#endif 241 addi %r3,%r3,TLB_VALID|TLB_PG_16M 242 tlbwe %r4,%r0,1 /* Load the data(Low) portion of the entry */ 243 tlbwe %r3,%r0,0 /* Load the tag(High) portion of the entry */ 244#endif 245 246 /* set up a TLB mapping to cover uart0 */ 247 lis %r3,0xef000000@h /* Load the virtual address */ 248 ori %r4,%r3,0 /* Load the physical address */ 249 250 clrrwi %r4,%r4,10 /* Mask off the real page number */ 251 /* write, execute, cache inhibit, guarded */ 252 ori %r4,%r4,(TLB_WR|TLB_EX|TLB_I|TLB_G) 253 254 clrrwi %r3,%r3,10 /* Mask off the effective page number */ 255 ori %r3,%r3,(TLB_VALID|TLB_PG_16M) 256 257 li %r0,2 258 259 tlbwe %r4,%r0,1 /* Load the data portion of the entry */ 260 tlbwe %r3,%r0,0 /* Load the tag portion of the entry */ 261 262 /* END of TLB setup */ 263 264 INIT_CPUINFO(8,1,9,0) 265 mr %r4,%r8 266 267 lis %r3,__start@ha 268 addi %r3,%r3,__start@l 269 270 mr %r6,%r31 /* info_block address */ 271 bl _C_LABEL(initppc) 272 bl _C_LABEL(main) 273 274loop: b loop /* XXX not reached */ 275 276#include <powerpc/ibm4xx/4xx_locore.S> 277