1 /* $NetBSD: machdep.c,v 1.8 2005/12/11 12:17:12 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Juergen Hannken-Illjes. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.8 2005/12/11 12:17:12 christos Exp $"); 41 42 #include "opt_explora.h" 43 #include "ksyms.h" 44 45 #include <sys/param.h> 46 #include <sys/buf.h> 47 #include <sys/msgbuf.h> 48 #include <sys/kernel.h> 49 #include <sys/mount.h> 50 #include <sys/proc.h> 51 #include <sys/user.h> 52 #include <sys/reboot.h> 53 #include <sys/properties.h> 54 #include <sys/ksyms.h> 55 56 #include <uvm/uvm_extern.h> 57 58 #include <net/netisr.h> 59 60 #include <machine/explora.h> 61 #include <machine/bus.h> 62 #include <machine/powerpc.h> 63 #include <machine/tlb.h> 64 #include <machine/trap.h> 65 66 #include <powerpc/spr.h> 67 #include <powerpc/ibm4xx/dcr403cgx.h> 68 69 #if NKSYMS || defined(DDB) || defined(LKM) 70 #include <machine/db_machdep.h> 71 #include <ddb/db_extern.h> 72 #endif 73 74 #define MEMREGIONS 2 75 #define TLB_PG_SIZE (16*1024*1024) 76 77 char cpu_model[80]; 78 char machine[] = MACHINE; /* from <machine/param.h> */ 79 char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */ 80 81 extern struct user *proc0paddr; 82 83 struct propdb *board_info = NULL; 84 struct vm_map *phys_map = NULL; 85 struct vm_map *mb_map = NULL; 86 struct vm_map *exec_map = NULL; 87 char msgbuf[MSGBUFSIZE]; 88 paddr_t msgbuf_paddr; 89 static unsigned cpuspeed = 66000000; 90 static unsigned memsize; 91 92 static struct mem_region phys_mem[MEMREGIONS]; 93 static struct mem_region avail_mem[MEMREGIONS]; 94 95 void bootstrap(u_int, u_int); 96 static void install_extint(void (*)(void)); 97 int lcsplx(int); 98 99 /* 100 * Trap vectors 101 */ 102 extern int defaulttrap, defaultsize; 103 extern int sctrap, scsize; 104 extern int alitrap, alisize; 105 extern int dsitrap, dsisize; 106 extern int isitrap, isisize; 107 extern int mchktrap, mchksize; 108 extern int tlbimiss4xx, tlbim4size; 109 extern int tlbdmiss4xx, tlbdm4size; 110 extern int pitfitwdog, pitfitwdogsize; 111 extern int debugtrap, debugsize; 112 extern int errata51handler, errata51size; 113 #ifdef DDB 114 extern int ddblow, ddbsize; 115 #endif 116 static struct { 117 int vector; 118 void *addr; 119 void *size; 120 } trap_table[] = { 121 { EXC_SC, &sctrap, &scsize }, 122 { EXC_ALI, &alitrap, &alisize }, 123 { EXC_DSI, &dsitrap, &dsisize }, 124 { EXC_ISI, &isitrap, &isisize }, 125 { EXC_MCHK, &mchktrap, &mchksize }, 126 { EXC_ITMISS, &tlbimiss4xx, &tlbim4size }, 127 { EXC_DTMISS, &tlbdmiss4xx, &tlbdm4size }, 128 { EXC_PIT, &pitfitwdog, &pitfitwdogsize }, 129 { EXC_DEBUG, &debugtrap, &debugsize }, 130 { (EXC_DTMISS|EXC_ALI), &errata51handler, &errata51size }, 131 #if defined(DDB) 132 { EXC_PGM, &ddblow, &ddbsize }, 133 #endif /* DDB */ 134 }; 135 136 static void 137 set_tlb(int idx, u_int addr, u_int flags) 138 { 139 u_int lo, hi; 140 141 addr &= ~(TLB_PG_SIZE-1); 142 143 lo = addr | TLB_EX | TLB_WR | flags; 144 #ifdef PPC_4XX_NOCACHE 145 lo |= TLB_I; 146 #endif 147 hi = addr | TLB_VALID | TLB_PG_16M; 148 149 asm volatile( 150 " tlbwe %1,%0,1 \n" 151 " tlbwe %2,%0,0 \n" 152 " sync \n" 153 : : "r" (idx), "r" (lo), "r" (hi) ); 154 } 155 156 void 157 bootstrap(u_int startkernel, u_int endkernel) 158 { 159 u_int i, j, t, br[4]; 160 u_int ntlb, maddr, msize, size; 161 struct cpu_info * const ci = &cpu_info[0]; 162 163 consinit(); 164 165 br[0] = mfdcr(DCR_BR4); 166 br[1] = mfdcr(DCR_BR5); 167 br[2] = mfdcr(DCR_BR6); 168 br[3] = mfdcr(DCR_BR7); 169 170 for (i = 0; i < 4; i++) 171 for (j = i+1; j < 4; j++) 172 if (br[j] < br[i]) 173 t = br[j], br[j] = br[i], br[i] = t; 174 175 for (i = 0, size = 0; i < 4; i++) { 176 if (((br[i] >> 19) & 3) != 3) 177 continue; 178 maddr = ((br[i] >> 24) & 0xff) << 20; 179 msize = 1 << (20 + ((br[i] >> 21) & 7)); 180 if (maddr+msize > size) 181 size = maddr+msize; 182 } 183 184 #ifdef COM_IS_CONSOLE 185 ntlb = TLB_NRESERVED-1; 186 #else 187 ntlb = TLB_NRESERVED-2; 188 #endif 189 if (size > ntlb*TLB_PG_SIZE) 190 size = ntlb*TLB_PG_SIZE; 191 192 phys_mem[0].start = 0; 193 phys_mem[0].size = size & ~PGOFSET; 194 avail_mem[0].start = startkernel; 195 avail_mem[0].size = size-startkernel; 196 197 asm volatile( 198 " mtpid %0 \n" 199 " sync \n" 200 : : "r" (1) ); 201 202 /* 203 * Setup initial tlbs. 204 * Physical memory and console device are 205 * mapped into the first (reserved) tlbs. 206 */ 207 208 t = 0; 209 for (maddr = 0; maddr < phys_mem[0].size; maddr += TLB_PG_SIZE) 210 set_tlb(t++, maddr, 0); 211 212 #ifdef COM_IS_CONSOLE 213 set_tlb(t++, BASE_COM, TLB_I | TLB_G); 214 #else 215 set_tlb(t++, BASE_FB, TLB_I | TLB_G); 216 set_tlb(t++, BASE_FB2, TLB_I | TLB_G); 217 #endif 218 219 /* Disable all external interrupts */ 220 mtdcr(DCR_EXIER, 0); 221 222 /* Disable all timer interrupts */ 223 mtspr(SPR_TCR, 0); 224 225 /* Initialize cache info for memcpy, etc. */ 226 cpu_probe_cache(); 227 228 /* 229 * Initialize lwp0 and current pcb and pmap pointers. 230 */ 231 lwp0.l_cpu = ci; 232 lwp0.l_addr = proc0paddr; 233 memset(lwp0.l_addr, 0, sizeof *lwp0.l_addr); 234 235 curpcb = &proc0paddr->u_pcb; 236 curpcb->pcb_pm = pmap_kernel(); 237 238 /* 239 * Install trap vectors. 240 */ 241 242 for (i = EXC_RSVD; i <= EXC_LAST; i += 0x100) 243 memcpy((void *)i, &defaulttrap, (size_t)&defaultsize); 244 245 for (i = 0; i < sizeof(trap_table)/sizeof(trap_table[0]); i++) { 246 memcpy((void *)trap_table[i].vector, trap_table[i].addr, 247 (size_t)trap_table[i].size); 248 } 249 250 __syncicache((void *)EXC_RST, EXC_LAST - EXC_RST + 0x100); 251 252 /* 253 * Set Exception vector base. 254 * Handle trap instruction as PGM exception. 255 */ 256 257 mtspr(SPR_EVPR, 0); 258 259 t = mfspr(SPR_DBCR0); 260 t &= ~DBCR0_TDE; 261 mtspr(SPR_DBCR0, t); 262 263 /* 264 * External interrupt handler install. 265 */ 266 267 install_extint(ext_intr); 268 269 /* 270 * Now enable translation (and machine checks/recoverable interrupts). 271 */ 272 asm volatile ( 273 " mfmsr %0 \n" 274 " ori %0,%0,%1 \n" 275 " mtmsr %0 \n" 276 " sync \n" 277 : : "r" (0), "K" (PSL_IR|PSL_DR|PSL_ME) ); 278 279 uvm_setpagesize(); 280 281 /* 282 * Initialize pmap module. 283 */ 284 pmap_bootstrap(startkernel, endkernel); 285 286 #if NKSYMS || defined(DDB) || defined(LKM) 287 ksyms_init(0, NULL, NULL); 288 #endif 289 290 fake_mapiodev = 0; 291 } 292 293 static void 294 install_extint(void (*handler)(void)) 295 { 296 extern int extint, extsize; 297 extern u_long extint_call; 298 u_long offset = (u_long)handler - (u_long)&extint_call; 299 int omsr, msr; 300 301 #ifdef DIAGNOSTIC 302 if (offset > 0x1ffffff) 303 panic("install_extint: too far away"); 304 #endif 305 asm volatile ( 306 " mfmsr %0 \n" 307 " andi. %1,%0,%2 \n" 308 " mtmsr %1 \n" 309 : "=r" (omsr), "=r" (msr) : "K" ((u_short)~PSL_EE) ); 310 extint_call = (extint_call & 0xfc000003) | offset; 311 memcpy((void *)EXC_EXI, &extint, (size_t)&extsize); 312 __syncicache((void *)&extint_call, sizeof extint_call); 313 __syncicache((void *)EXC_EXI, (int)&extsize); 314 asm volatile ( 315 " mtmsr %0 \n" 316 : : "r" (omsr) ); 317 } 318 319 void 320 cpu_startup(void) 321 { 322 vaddr_t minaddr, maxaddr; 323 char pbuf[9]; 324 325 /* 326 * Initialize error message buffer (before start of kernel) 327 */ 328 initmsgbuf((caddr_t)msgbuf, round_page(MSGBUFSIZE)); 329 330 printf("%s%s", copyright, version); 331 printf("NCD Explora451\n"); 332 333 memsize = ctob(physmem); 334 format_bytes(pbuf, sizeof(pbuf), ctob(physmem)); 335 printf("total memory = %s\n", pbuf); 336 337 minaddr = 0; 338 /* 339 * Allocate a submap for exec arguments. This map effectively 340 * limits the number of processes exec'ing at any time. 341 */ 342 exec_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 343 16*NCARGS, VM_MAP_PAGEABLE, FALSE, NULL); 344 345 /* 346 * Allocate a submap for physio 347 */ 348 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 349 VM_PHYS_SIZE, 0, FALSE, NULL); 350 351 /* 352 * No need to allocate an mbuf cluster submap. Mbuf clusters 353 * are allocated via the pool allocator, and we use direct-mapped 354 * pool pages. 355 */ 356 357 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 358 printf("avail memory = %s\n", pbuf); 359 360 /* 361 * Set up the board properties database. 362 */ 363 if (!(board_info = propdb_create("board info"))) 364 panic("Cannot create board info database"); 365 366 if (board_info_set("processor-frequency", &cpuspeed, 367 sizeof(&cpuspeed), PROP_CONST, 0)) 368 panic("setting processor-frequency"); 369 if (board_info_set("mem-size", &memsize, 370 sizeof(&memsize), PROP_CONST, 0)) 371 panic("setting mem-size"); 372 } 373 374 int 375 lcsplx(int ipl) 376 { 377 return spllower(ipl); /*XXX*/ 378 } 379 380 void 381 softnet(void) 382 { 383 int isr; 384 385 isr = netisr; 386 netisr = 0; 387 388 #define DONETISR(bit, fn) \ 389 do { \ 390 if (isr & (1 << bit)) \ 391 fn(); \ 392 } while (0) 393 394 #include <net/netisr_dispatch.h> 395 396 #undef DONETISR 397 } 398 399 #include "com.h" 400 void 401 softserial(void) 402 { 403 #if NCOM > 0 404 void comsoft(void); /* XXX from dev/ic/com.c */ 405 406 comsoft(); 407 #endif 408 } 409 410 void 411 cpu_reboot(int howto, char *what) 412 { 413 static int syncing = 0; 414 415 boothowto = howto; 416 if (!cold && !(howto & RB_NOSYNC) && !syncing) { 417 syncing = 1; 418 vfs_shutdown(); 419 resettodr(); 420 } 421 422 splhigh(); 423 424 if (!cold && (howto & RB_DUMP)) 425 /*XXX dumpsys()*/; 426 427 doshutdownhooks(); 428 429 if (howto & RB_HALT) { 430 printf("halted\n\n"); 431 432 while (1) 433 ; 434 } 435 436 printf("rebooting\n\n"); 437 438 /* flush cache for msgbuf */ 439 __syncicache((void *)msgbuf_paddr, round_page(MSGBUFSIZE)); 440 441 ppc4xx_reset(); 442 443 #ifdef DDB 444 while (1) 445 Debugger(); 446 #else 447 while (1) 448 ; 449 #endif 450 } 451 452 void 453 inittodr(time_t base) 454 { 455 if (base > 365*24*60*60 && time.tv_sec < 365*24*60*60) 456 time.tv_sec = base; 457 } 458 459 void 460 resettodr(void) 461 { 462 } 463 464 void 465 mem_regions(struct mem_region **mem, struct mem_region **avail) 466 { 467 *mem = phys_mem; 468 *avail = avail_mem; 469 } 470