xref: /netbsd-src/sys/arch/evbppc/explora/machdep.c (revision 1ad9454efb13a65cd7535ccf867508cb14d9d30e)
1 /*	$NetBSD: machdep.c,v 1.13 2006/09/18 22:05:47 gdamore Exp $	*/
2 
3 /*-
4  * Copyright (c) 2003 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Juergen Hannken-Illjes.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *      This product includes software developed by the NetBSD
21  *      Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #include <sys/cdefs.h>
40 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.13 2006/09/18 22:05:47 gdamore Exp $");
41 
42 #include "opt_explora.h"
43 #include "ksyms.h"
44 
45 #include <sys/param.h>
46 #include <sys/buf.h>
47 #include <sys/msgbuf.h>
48 #include <sys/kernel.h>
49 #include <sys/mount.h>
50 #include <sys/proc.h>
51 #include <sys/user.h>
52 #include <sys/reboot.h>
53 #include <sys/ksyms.h>
54 
55 #include <uvm/uvm_extern.h>
56 
57 #include <prop/proplib.h>
58 
59 #include <net/netisr.h>
60 
61 #include <machine/explora.h>
62 #include <machine/bus.h>
63 #include <machine/powerpc.h>
64 #include <machine/tlb.h>
65 #include <machine/trap.h>
66 
67 #include <powerpc/spr.h>
68 #include <powerpc/ibm4xx/dcr403cgx.h>
69 
70 #if NKSYMS || defined(DDB) || defined(LKM)
71 #include <machine/db_machdep.h>
72 #include <ddb/db_extern.h>
73 #endif
74 
75 #define MEMREGIONS	2
76 #define TLB_PG_SIZE	(16*1024*1024)
77 
78 char cpu_model[80];
79 char machine[] = MACHINE;		/* from <machine/param.h> */
80 char machine_arch[] = MACHINE_ARCH;	/* from <machine/param.h> */
81 
82 static const unsigned int cpuspeed = 66000000;
83 
84 extern struct user *proc0paddr;
85 
86 prop_dictionary_t board_properties;
87 struct vm_map *phys_map = NULL;
88 struct vm_map *mb_map = NULL;
89 struct vm_map *exec_map = NULL;
90 char msgbuf[MSGBUFSIZE];
91 paddr_t msgbuf_paddr;
92 
93 static struct mem_region phys_mem[MEMREGIONS];
94 static struct mem_region avail_mem[MEMREGIONS];
95 
96 void		bootstrap(u_int, u_int);
97 static void	install_extint(void (*)(void));
98 int		lcsplx(int);
99 
100 /*
101  * Trap vectors
102  */
103 extern int defaulttrap, defaultsize;
104 extern int sctrap, scsize;
105 extern int alitrap, alisize;
106 extern int dsitrap, dsisize;
107 extern int isitrap, isisize;
108 extern int mchktrap, mchksize;
109 extern int tlbimiss4xx, tlbim4size;
110 extern int tlbdmiss4xx, tlbdm4size;
111 extern int pitfitwdog, pitfitwdogsize;
112 extern int debugtrap, debugsize;
113 extern int errata51handler, errata51size;
114 #ifdef DDB
115 extern int ddblow, ddbsize;
116 #endif
117 static struct {
118 	int vector;
119 	void *addr;
120 	void *size;
121 } trap_table[] = {
122 	{ EXC_SC,	&sctrap,	&scsize },
123 	{ EXC_ALI,	&alitrap,	&alisize },
124 	{ EXC_DSI,	&dsitrap,	&dsisize },
125 	{ EXC_ISI,	&isitrap,	&isisize },
126 	{ EXC_MCHK,	&mchktrap,	&mchksize },
127 	{ EXC_ITMISS,	&tlbimiss4xx,	&tlbim4size },
128 	{ EXC_DTMISS,	&tlbdmiss4xx,	&tlbdm4size },
129 	{ EXC_PIT,	&pitfitwdog,	&pitfitwdogsize },
130 	{ EXC_DEBUG,	&debugtrap,	&debugsize },
131 	{ (EXC_DTMISS|EXC_ALI), &errata51handler, &errata51size },
132 #if defined(DDB)
133 	{ EXC_PGM,	&ddblow,	&ddbsize },
134 #endif /* DDB */
135 };
136 
137 static void
138 set_tlb(int idx, u_int addr, u_int flags)
139 {
140 	u_int lo, hi;
141 
142 	addr &= ~(TLB_PG_SIZE-1);
143 
144 	lo = addr | TLB_EX | TLB_WR | flags;
145 #ifdef PPC_4XX_NOCACHE
146 	lo |= TLB_I;
147 #endif
148 	hi = addr | TLB_VALID | TLB_PG_16M;
149 
150 	__asm volatile(
151 	    "	tlbwe %1,%0,1	\n"
152 	    "	tlbwe %2,%0,0	\n"
153 	    "	sync		\n"
154 	    : : "r" (idx), "r" (lo), "r" (hi) );
155 }
156 
157 /*
158  * Install a trap vector. We cannot use memcpy because the
159  * destination may be zero.
160  */
161 static void
162 trap_copy(void *src, int dest, size_t len)
163 {
164 	uint32_t *src_p = src;
165 	uint32_t *dest_p = (void *)dest;
166 
167 	while (len > 0) {
168 		*dest_p++ = *src_p++;
169 		len -= sizeof(uint32_t);
170 	}
171 }
172 
173 void
174 bootstrap(u_int startkernel, u_int endkernel)
175 {
176 	u_int i, j, t, br[4];
177 	u_int ntlb, maddr, msize, size;
178 	struct cpu_info * const ci = &cpu_info[0];
179 
180 	consinit();
181 
182 	br[0] = mfdcr(DCR_BR4);
183 	br[1] = mfdcr(DCR_BR5);
184 	br[2] = mfdcr(DCR_BR6);
185 	br[3] = mfdcr(DCR_BR7);
186 
187 	for (i = 0; i < 4; i++)
188 		for (j = i+1; j < 4; j++)
189 			if (br[j] < br[i])
190 				t = br[j], br[j] = br[i], br[i] = t;
191 
192 	for (i = 0, size = 0; i < 4; i++) {
193 		if (((br[i] >> 19) & 3) != 3)
194 			continue;
195 		maddr = ((br[i] >> 24) & 0xff) << 20;
196 		msize = 1 << (20 + ((br[i] >> 21) & 7));
197 		if (maddr+msize > size)
198 			size = maddr+msize;
199 	}
200 
201 #ifdef COM_IS_CONSOLE
202 	ntlb = TLB_NRESERVED-1;
203 #else
204 	ntlb = TLB_NRESERVED-2;
205 #endif
206 	if (size > ntlb*TLB_PG_SIZE)
207 		size = ntlb*TLB_PG_SIZE;
208 
209 	phys_mem[0].start = 0;
210 	phys_mem[0].size = size & ~PGOFSET;
211 	avail_mem[0].start = startkernel;
212 	avail_mem[0].size = size-startkernel;
213 
214 	__asm volatile(
215 	    "	mtpid %0	\n"
216 	    "	sync		\n"
217 	    : : "r" (1) );
218 
219 	/*
220 	 * Setup initial tlbs.
221 	 * Physical memory and  console device are
222 	 * mapped into the first (reserved) tlbs.
223 	 */
224 
225 	t = 0;
226 	for (maddr = 0; maddr < phys_mem[0].size; maddr += TLB_PG_SIZE)
227 		set_tlb(t++, maddr, 0);
228 
229 #ifdef COM_IS_CONSOLE
230 	set_tlb(t++, BASE_COM, TLB_I | TLB_G);
231 #else
232 	set_tlb(t++, BASE_FB, TLB_I | TLB_G);
233 	set_tlb(t++, BASE_FB2, TLB_I | TLB_G);
234 #endif
235 
236 	/* Disable all external interrupts */
237 	mtdcr(DCR_EXIER, 0);
238 
239 	/* Disable all timer interrupts */
240 	mtspr(SPR_TCR, 0);
241 
242 	/* Initialize cache info for memcpy, etc. */
243 	cpu_probe_cache();
244 
245 	/*
246 	 * Initialize lwp0 and current pcb and pmap pointers.
247 	 */
248 	lwp0.l_cpu = ci;
249 	lwp0.l_addr = proc0paddr;
250 	memset(lwp0.l_addr, 0, sizeof *lwp0.l_addr);
251 
252 	curpcb = &proc0paddr->u_pcb;
253 	curpcb->pcb_pm = pmap_kernel();
254 
255 	/*
256 	 * Install trap vectors.
257 	 */
258 
259 	for (i = EXC_RSVD; i <= EXC_LAST; i += 0x100)
260 		trap_copy(&defaulttrap, i, (size_t)&defaultsize);
261 
262 	for (i = 0; i < sizeof(trap_table)/sizeof(trap_table[0]); i++) {
263 		trap_copy(trap_table[i].addr, trap_table[i].vector,
264 		    (size_t)trap_table[i].size);
265 	}
266 
267 	__syncicache((void *)EXC_RST, EXC_LAST - EXC_RST + 0x100);
268 
269 	/*
270 	 * Set Exception vector base.
271 	 * Handle trap instruction as PGM exception.
272 	 */
273 
274 	mtspr(SPR_EVPR, 0);
275 
276 	t = mfspr(SPR_DBCR0);
277 	t &= ~DBCR0_TDE;
278 	mtspr(SPR_DBCR0, t);
279 
280 	/*
281 	 * External interrupt handler install.
282 	 */
283 
284 	install_extint(ext_intr);
285 
286 	/*
287 	 * Now enable translation (and machine checks/recoverable interrupts).
288 	 */
289 	__asm volatile (
290 	    "	mfmsr %0	\n"
291 	    "	ori %0,%0,%1	\n"
292 	    "	mtmsr %0	\n"
293 	    "	sync		\n"
294 	    : : "r" (0), "K" (PSL_IR|PSL_DR|PSL_ME) );
295 
296 	uvm_setpagesize();
297 
298 	/*
299 	 * Initialize pmap module.
300 	 */
301 	pmap_bootstrap(startkernel, endkernel);
302 
303 #if NKSYMS || defined(DDB) || defined(LKM)
304 	ksyms_init(0, NULL, NULL);
305 #endif
306 
307 	fake_mapiodev = 0;
308 }
309 
310 static void
311 install_extint(void (*handler)(void))
312 {
313 	extern int extint, extsize;
314 	extern u_long extint_call;
315 	u_long offset = (u_long)handler - (u_long)&extint_call;
316 	int omsr, msr;
317 
318 #ifdef	DIAGNOSTIC
319 	if (offset > 0x1ffffff)
320 		panic("install_extint: too far away");
321 #endif
322 	__asm volatile (
323 	    "	mfmsr %0	\n"
324 	    "	andi. %1,%0,%2	\n"
325 	    "	mtmsr %1	\n"
326 	    : "=r" (omsr), "=r" (msr) : "K" ((u_short)~PSL_EE) );
327 	extint_call = (extint_call & 0xfc000003) | offset;
328 	memcpy((void *)EXC_EXI, &extint, (size_t)&extsize);
329 	__syncicache((void *)&extint_call, sizeof extint_call);
330 	__syncicache((void *)EXC_EXI, (int)&extsize);
331 	__asm volatile (
332 	    "	mtmsr %0	\n"
333 	    : : "r" (omsr) );
334 }
335 
336 void
337 cpu_startup(void)
338 {
339 	vaddr_t minaddr, maxaddr;
340 	prop_number_t pn;
341 	char pbuf[9];
342 
343 	/*
344 	 * Initialize error message buffer (before start of kernel)
345 	 */
346 	initmsgbuf((caddr_t)msgbuf, round_page(MSGBUFSIZE));
347 
348 	printf("%s%s", copyright, version);
349 	printf("NCD Explora451\n");
350 
351 	format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
352 	printf("total memory = %s\n", pbuf);
353 
354 	minaddr = 0;
355 	/*
356 	 * Allocate a submap for exec arguments.  This map effectively
357 	 * limits the number of processes exec'ing at any time.
358 	 */
359 	exec_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
360 				 16*NCARGS, VM_MAP_PAGEABLE, FALSE, NULL);
361 
362 	/*
363 	 * Allocate a submap for physio
364 	 */
365 	phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
366 				 VM_PHYS_SIZE, 0, FALSE, NULL);
367 
368 	/*
369 	 * No need to allocate an mbuf cluster submap.  Mbuf clusters
370 	 * are allocated via the pool allocator, and we use direct-mapped
371 	 * pool pages.
372 	 */
373 
374 	format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
375 	printf("avail memory = %s\n", pbuf);
376 
377 	/*
378 	 * Set up the board properties database.
379 	 */
380 	board_properties = prop_dictionary_create();
381 	KASSERT(board_properties != NULL);
382 
383 	pn = prop_number_create_integer(ctob(physmem));
384 	KASSERT(pn != NULL);
385 	if (prop_dictionary_set(board_properties, "mem-size", pn) == FALSE)
386 		panic("setting mem-size");
387 	prop_object_release(pn);
388 
389 	pn = prop_number_create_integer(cpuspeed);
390 	KASSERT(pn != NULL);
391 	if (prop_dictionary_set(board_properties, "processor-frequency",
392 				pn) == FALSE)
393 		panic("setting processor-frequency");
394 	prop_object_release(pn);
395 }
396 
397 int
398 lcsplx(int ipl)
399 {
400 	return spllower(ipl);	/*XXX*/
401 }
402 
403 void
404 cpu_reboot(int howto, char *what)
405 {
406 	static int syncing = 0;
407 
408 	boothowto = howto;
409 	if (!cold && !(howto & RB_NOSYNC) && !syncing) {
410 		syncing = 1;
411 		vfs_shutdown();
412 		resettodr();
413 	}
414 
415 	splhigh();
416 
417 	if (!cold && (howto & RB_DUMP))
418 		/*XXX dumpsys()*/;
419 
420 	doshutdownhooks();
421 
422 	if (howto & RB_HALT) {
423 		printf("halted\n\n");
424 
425 		while (1)
426 			;
427 	}
428 
429 	printf("rebooting\n\n");
430 
431 	/* flush cache for msgbuf */
432 	__syncicache((void *)msgbuf_paddr, round_page(MSGBUFSIZE));
433 
434 	ppc4xx_reset();
435 
436 #ifdef DDB
437 	while (1)
438 		Debugger();
439 #else
440 	while (1)
441 		;
442 #endif
443 }
444 
445 void
446 mem_regions(struct mem_region **mem, struct mem_region **avail)
447 {
448 	*mem = phys_mem;
449 	*avail = avail_mem;
450 }
451