1/* $NetBSD: explora_start.S,v 1.7 2010/02/25 23:33:44 matt Exp $ */ 2 3/*- 4 * Copyright (c) 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Juergen Hannken-Illjes. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32/* 33 * Initial state: 34 * 35 * iccr = 0x00008001 0x80000000-0x87ffffff 0xf80000000-0xffffffff 36 * dccr = 0x00008001 0x80000000-0x87ffffff 0xf80000000-0xffffffff 37 * dcwr = 0x00000000 38 * msr = 0x00001000 ME=machine check enable 39 * 40 */ 41 42#include "assym.h" 43 44#define _NOREGNAMES 45 46#include <machine/param.h> 47#include <machine/psl.h> 48#include <machine/trap.h> 49#include <machine/asm.h> 50 51#include <powerpc/spr.h> 52#include <powerpc/ibm4xx/spr.h> 53#include <powerpc/ibm4xx/dcr403cgx.h> 54#include <powerpc/ibm4xx/pmap.h> 55 56#include "opt_ddb.h" 57#include "opt_ppcparam.h" 58 59/* 60 * Initially the dram starts at 0x01000000. This is way too high. 61 * We relocate dram to 0x00000000. We use the video ram at 0xf0000000 62 * as a temporary staging area. 63 */ 64 65#define STAGE1_BASE 0xf0000000 66 67 .text 68 .globl __start 69__start: 70 b 1f 71 nop 72 nop 73 .long 0 74 .ascii "XncdPPC\0" 75 .long 0 76 .long 0 77 781: 79 /* Disable exceptions, caches, invalidate all TLB's. */ 80 81 li 0,0 82 mtmsr 0 83 mttcr 0 84 mtdccr 0 85 mticcr 0 86 sync 87 isync 88 89/* Clear caches and invalidate tlbs */ 90 li 7,256 91 mtctr 7 92 li 6,0 931: 94 dccci 0,6 95 addi 6,6,16 96 bdnz 1b 97 98 li 7,512 99 mtctr 7 100 li 6,0 1011: 102 iccci 0,6 103 addi 6,6,16 104 bdnz 1b 105 106 tlbia 107 sync 108 isync 109 110/* Get current address -- NOT the same as . */ 111 112 bl _next 113_next: 114 mflr 3 115 subi 3,3,_next-__start 116 lis 4,STAGE1_BASE@h 117 ori 4,4,STAGE1_BASE@l 118 li 5,stage1size 119 1201: 121 lbz 1,0(3) 122 mr 0,5 123 cmpwi 0,0 124 stb 1,0(4) 125 addi 3,3,1 126 addi 4,4,1 127 addi 5,5,-1 128 bgt 1b 129 130/* Jump into the staging area so we can remap the dram. */ 131 132 lis 0,stage1reloc@h 133 ori 0,0,stage1reloc@l 134 mtlr 0 135 blr 136 137stage1reloc = .-__start+STAGE1_BASE 138 139/* Remap the dram from 0x01000000 to 0x00000000. */ 140 141#define REMAP(r, tmp1, tmp2) \ 142 mfbr##r tmp1 ; \ 143 lis tmp2,0xff ; \ 144 ori tmp2,tmp2,0xffff ; \ 145 cmplw tmp1,tmp2 ; \ 146 ble 1f ; \ 147 addis tmp1,tmp1,0xf000 ; \ 148 mtbr##r tmp1 ; \ 1491: 150 151 REMAP(4, 1, 2) 152 REMAP(5, 1, 2) 153 REMAP(6, 1, 2) 154 REMAP(7, 1, 2) 155 156#undef REMAP 157 158/* Initial setup. */ 159 160 ba stage2 161 162stage2: 163 164#ifdef PPC_4XX_NOCACHE 165 li 0,0 166#else 167 lis 0,0xfffc 168#endif 169 mtdccr 0 170 mticcr 0 171 sync 172 isync 173 174/* get start of bss */ 175 lis 7,_C_LABEL(edata)-4@h 176 ori 7,7,_C_LABEL(edata)-4@l 177/* get end of kernel */ 178 lis 4,_C_LABEL(end)@h 179 ori 4,4,_C_LABEL(end)@l 180/* clear bss */ 181 li 3,0 1821: 183 stwu 3,4(7) 184 cmpw 7,4 185 bne+ 1b 186 187 INIT_CPUINFO(4,1,9,0) 188 189 lis 3,__start@h 190 ori 3,3,__start@l 191 192/* Run the remaining setup in C. */ 193 bl _C_LABEL(bootstrap) 194 195 bl _C_LABEL(main) 196 197 /* NOTREACHED */ 1982: nop 199 b 2b 200 201stage1size = .-__start 202 203#include <powerpc/ibm4xx/4xx_locore.S> 204