xref: /netbsd-src/sys/arch/evbppc/explora/explora_start.S (revision 274254cdae52594c1aa480a736aef78313d15c9c)
1/*	$NetBSD: explora_start.S,v 1.5 2008/04/28 20:23:17 martin Exp $	*/
2
3/*-
4 * Copyright (c) 2003 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Juergen Hannken-Illjes.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32/*
33 * Initial state:
34 *
35 * iccr = 0x00008001 0x80000000-0x87ffffff 0xf80000000-0xffffffff
36 * dccr = 0x00008001 0x80000000-0x87ffffff 0xf80000000-0xffffffff
37 * dcwr = 0x00000000
38 * msr  = 0x00001000 ME=machine check enable
39 *
40 */
41
42#include "assym.h"
43
44#define _NOREGNAMES
45
46#include <machine/param.h>
47#include <machine/psl.h>
48#include <machine/trap.h>
49#include <machine/asm.h>
50
51#include <powerpc/spr.h>
52#include <powerpc/ibm4xx/dcr403cgx.h>
53#include <powerpc/ibm4xx/pmap.h>
54
55#include "opt_ddb.h"
56#include "opt_ppcparam.h"
57
58GLOBAL(proc0paddr)
59	.long	0			/* proc0 p_addr */
60
61/*
62 * Initially the dram starts at 0x01000000. This is way too high.
63 * We relocate dram to 0x00000000. We use the video ram at 0xf0000000
64 * as a temporary staging area.
65 */
66
67#define STAGE1_BASE	0xf0000000
68
69	.text
70	.globl	__start
71__start:
72	b	1f
73	nop
74	nop
75	.long	0
76	.ascii	"XncdPPC\0"
77	.long	0
78	.long	0
79
801:
81	/* Disable exceptions, caches, invalidate all TLB's. */
82
83	li	0,0
84	mtmsr	0
85	mttcr	0
86	mtdccr	0
87	mticcr	0
88	sync
89	isync
90
91/* Clear caches and invalidate tlbs */
92	li	7,256
93	mtctr	7
94	li	6,0
951:
96	dccci	0,6
97	addi	6,6,16
98	bdnz	1b
99
100	li	7,512
101	mtctr	7
102	li	6,0
1031:
104	iccci	0,6
105	addi	6,6,16
106	bdnz	1b
107
108	tlbia
109	sync
110	isync
111
112/* Get current address -- NOT the same as . */
113
114	bl	_next
115_next:
116	mflr	3
117	subi	3,3,_next-__start
118	lis	4,STAGE1_BASE@h
119	ori	4,4,STAGE1_BASE@l
120	li	5,stage1size
121
1221:
123	lbz	1,0(3)
124	mr	0,5
125	cmpwi	0,0
126	stb	1,0(4)
127	addi	3,3,1
128	addi	4,4,1
129	addi	5,5,-1
130	bgt	1b
131
132/* Jump into the staging area so we can remap the dram. */
133
134	lis	0,stage1reloc@h
135	ori	0,0,stage1reloc@l
136	mtlr	0
137	blr
138
139stage1reloc = .-__start+STAGE1_BASE
140
141/* Remap the dram from 0x01000000 to 0x00000000. */
142
143#define REMAP(r, tmp1, tmp2) \
144	mfbr##r	tmp1 ; \
145	lis	tmp2,0xff ; \
146	ori	tmp2,tmp2,0xffff ; \
147	cmplw	tmp1,tmp2 ; \
148	ble	1f ; \
149	addis	tmp1,tmp1,0xf000 ; \
150	mtbr##r	tmp1 ; \
1511:
152
153	REMAP(4, 1, 2)
154	REMAP(5, 1, 2)
155	REMAP(6, 1, 2)
156	REMAP(7, 1, 2)
157
158#undef REMAP
159
160/* Initial setup. */
161
162	ba	stage2
163
164stage2:
165
166#ifdef PPC_4XX_NOCACHE
167	li	0,0
168#else
169	lis	0,0xfffc
170#endif
171	mtdccr	0
172	mticcr	0
173	sync
174	isync
175
176/* get start of bss */
177	lis	7,_C_LABEL(edata)-4@h
178	ori	7,7,_C_LABEL(edata)-4@l
179/* get end of kernel */
180	lis	4,_C_LABEL(end)@h
181	ori	4,4,_C_LABEL(end)@l
182/* clear bss */
183	li	3,0
1841:
185	stwu	3,4(7)
186	cmpw	7,4
187	bne+	1b
188
189	INIT_CPUINFO(4,1,9,0)
190
191	lis	3,__start@h
192	ori	3,3,__start@l
193
194/* Run the remaining setup in C. */
195	bl	_C_LABEL(bootstrap)
196
197	bl	_C_LABEL(main)
198
199	/* NOTREACHED */
2002:	nop
201	b	2b
202
203stage1size = .-__start
204
205#include <powerpc/ibm4xx/4xx_locore.S>
206