1 /* $NetBSD: gt.c,v 1.9 2005/12/11 12:17:11 christos Exp $ */ 2 3 /* 4 * Copyright 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: gt.c,v 1.9 2005/12/11 12:17:11 christos Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/device.h> 44 45 #include <dev/pci/pcivar.h> 46 47 #include <evbmips/malta/maltareg.h> 48 #include <evbmips/malta/maltavar.h> 49 50 #include <evbmips/malta/dev/gtreg.h> 51 #include <evbmips/malta/dev/gtvar.h> 52 53 #include "pci.h" 54 55 /* 56 * Galileo systems (so far) are always single-processor, so this is sufficient. 57 */ 58 #define PCI_CONF_LOCK(s) (s) = splhigh() 59 #define PCI_CONF_UNLOCK(s) splx((s)) 60 61 static void gt_attach_hook(struct device *, struct device *, 62 struct pcibus_attach_args *); 63 static int gt_bus_maxdevs(void *, int); 64 static pcitag_t gt_make_tag(void *, int, int, int); 65 static void gt_decompose_tag(void *, pcitag_t, int *, int *, int *); 66 static pcireg_t gt_conf_read(void *, pcitag_t, int); 67 static void gt_conf_write(void *, pcitag_t, int, pcireg_t); 68 69 void 70 gt_pci_init(pci_chipset_tag_t pc, struct gt_config *mcp) 71 { 72 73 pc->pc_conf_v = mcp; 74 pc->pc_attach_hook = gt_attach_hook; 75 pc->pc_bus_maxdevs = gt_bus_maxdevs; 76 pc->pc_make_tag = gt_make_tag; 77 pc->pc_decompose_tag = gt_decompose_tag; 78 pc->pc_conf_read = gt_conf_read; 79 pc->pc_conf_write = gt_conf_write; 80 } 81 82 static void 83 gt_attach_hook(struct device *parent, struct device *self, 84 struct pcibus_attach_args *pba) 85 { 86 87 /* Nothing to do... */ 88 } 89 90 static int gt_match(struct device *, struct cfdata *, void *); 91 static void gt_attach(struct device *, struct device *, void *); 92 static int gt_print(void *aux, const char *pnp); 93 94 CFATTACH_DECL(gt, sizeof(struct device), 95 gt_match, gt_attach, NULL, NULL); 96 97 static int 98 gt_match(parent, match, aux) 99 struct device *parent; 100 struct cfdata *match; 101 void *aux; 102 { 103 return 1; 104 } 105 106 static void 107 gt_attach(parent, self, aux) 108 struct device *parent; 109 struct device *self; 110 void *aux; 111 { 112 struct malta_config *mcp = &malta_configuration; 113 struct pcibus_attach_args pba; 114 115 printf("\n"); 116 117 #if NPCI > 0 118 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 119 pba.pba_bus = 0; 120 pba.pba_bridgetag = NULL; 121 pba.pba_iot = &mcp->mc_iot; 122 pba.pba_memt = &mcp->mc_memt; 123 pba.pba_dmat = &mcp->mc_pci_dmat; /* pci_bus_dma_tag */ 124 pba.pba_dmat64 = NULL; 125 pba.pba_pc = &mcp->mc_pc; 126 127 config_found_ia(self, "pcibus", &pba, gt_print); 128 #endif 129 return; 130 } 131 132 static int 133 gt_print(aux, pnp) 134 void *aux; 135 const char *pnp; 136 { 137 /* XXX */ 138 return 0; 139 } 140 141 static int 142 gt_bus_maxdevs(void *v, int busno) 143 { 144 145 /* The galileo has problems accessing device 31. */ 146 if (busno == 0) 147 return (31); 148 return (32); 149 } 150 151 static pcitag_t 152 gt_make_tag(void *v, int b, int d, int f) 153 { 154 155 return ((b << 16) | (d << 11) | (f << 8)); 156 } 157 158 static void 159 gt_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp) 160 { 161 162 if (bp != NULL) 163 *bp = (tag >> 16) & 0xff; 164 if (dp != NULL) 165 *dp = (tag >> 11) & 0x1f; 166 if (fp != NULL) 167 *fp = (tag >> 8) & 0x7; 168 } 169 170 static pcireg_t 171 gt_conf_read(void *v, pcitag_t tag, int offset) 172 { 173 pcireg_t data; 174 int bus, dev, func, s; 175 176 gt_decompose_tag(NULL /* XXX */, tag, &bus, &dev, &func); 177 178 /* The galileo has problems accessing device 31. */ 179 if (bus == 0 && dev == 31) 180 return ((pcireg_t) -1); 181 182 /* XXX: no support for bus > 0 yet */ 183 if (bus > 0) 184 return ((pcireg_t) -1); 185 186 PCI_CONF_LOCK(s); 187 188 /* Clear cause register bits. */ 189 GT_REGVAL(GT_INTR_CAUSE) = 0; 190 191 GT_REGVAL(GT_PCI0_CFG_ADDR) = (1 << 31) | tag | offset; 192 data = GT_REGVAL(GT_PCI0_CFG_DATA); 193 194 /* Check for master abort. */ 195 if (GT_REGVAL(GT_INTR_CAUSE) & (GTIC_MASABORT0 | GTIC_TARABORT0)) 196 data = (pcireg_t) -1; 197 198 PCI_CONF_UNLOCK(s); 199 200 return (data); 201 } 202 203 static void 204 gt_conf_write(void *v, pcitag_t tag, int offset, pcireg_t data) 205 { 206 int bus, dev, func, s; 207 208 gt_decompose_tag(NULL /* XXX */, tag, &bus, &dev, &func); 209 210 /* The galileo has problems accessing device 31. */ 211 if (bus == 0 && dev == 31) 212 return; 213 214 /* XXX: no support for bus > 0 yet */ 215 if (bus > 0) 216 return; 217 218 PCI_CONF_LOCK(s); 219 220 /* Clear cause register bits. */ 221 GT_REGVAL(GT_INTR_CAUSE) = 0; 222 223 GT_REGVAL(GT_PCI0_CFG_ADDR) = (1 << 31) | tag | offset; 224 GT_REGVAL(GT_PCI0_CFG_DATA) = data; 225 226 PCI_CONF_UNLOCK(s); 227 } 228