xref: /netbsd-src/sys/arch/evbmips/atheros/machdep.c (revision 09afef20633f5fe63d92dfe43ee3a9380dc06883)
1 /* $NetBSD: machdep.c,v 1.20 2009/11/27 03:23:08 rmind Exp $ */
2 
3 /*
4  * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
5  * Copyright (c) 2006 Garrett D'Amore.
6  * All rights reserved.
7  *
8  * Portions of this code were written by Garrett D'Amore for the
9  * Champaign-Urbana Community Wireless Network Project.
10  *
11  * Redistribution and use in source and binary forms, with or
12  * without modification, are permitted provided that the following
13  * conditions are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above
17  *    copyright notice, this list of conditions and the following
18  *    disclaimer in the documentation and/or other materials provided
19  *    with the distribution.
20  * 3. All advertising materials mentioning features or use of this
21  *    software must display the following acknowledgements:
22  *      This product includes software developed by the Urbana-Champaign
23  *      Independent Media Center.
24  *	This product includes software developed by Garrett D'Amore.
25  * 4. Urbana-Champaign Independent Media Center's name and Garrett
26  *    D'Amore's name may not be used to endorse or promote products
27  *    derived from this software without specific prior written permission.
28  *
29  * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
30  * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
31  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
32  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33  * ARE DISCLAIMED.  IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
34  * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
35  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
36  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
39  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
40  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
41  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42  */
43 /*-
44  * Copyright (c) 2006 Itronix Inc.
45  * All rights reserved.
46  *
47  * Portions written by Garrett D'Amore for Itronix Inc.
48  *
49  * Redistribution and use in source and binary forms, with or without
50  * modification, are permitted provided that the following conditions
51  * are met:
52  * 1. Redistributions of source code must retain the above copyright
53  *    notice, this list of conditions and the following disclaimer.
54  * 2. Redistributions in binary form must reproduce the above copyright
55  *    notice, this list of conditions and the following disclaimer in the
56  *    documentation and/or other materials provided with the distribution.
57  * 3. The name of Itronix Inc. may not be used to endorse
58  *    or promote products derived from this software without specific
59  *    prior written permission.
60  *
61  * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
62  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
63  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
64  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
65  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
66  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
67  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
68  * ON ANY THEORY OF LIABILITY, WHETHER IN
69  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
70  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
71  * POSSIBILITY OF SUCH DAMAGE.
72  */
73 /*
74  * Copyright (c) 1992, 1993
75  *	The Regents of the University of California.  All rights reserved.
76  *
77  * This code is derived from software contributed to Berkeley by
78  * the Systems Programming Group of the University of Utah Computer
79  * Science Department, The Mach Operating System project at
80  * Carnegie-Mellon University and Ralph Campbell.
81  *
82  * Redistribution and use in source and binary forms, with or without
83  * modification, are permitted provided that the following conditions
84  * are met:
85  * 1. Redistributions of source code must retain the above copyright
86  *    notice, this list of conditions and the following disclaimer.
87  * 2. Redistributions in binary form must reproduce the above copyright
88  *    notice, this list of conditions and the following disclaimer in the
89  *    documentation and/or other materials provided with the distribution.
90  * 3. Neither the name of the University nor the names of its contributors
91  *    may be used to endorse or promote products derived from this software
92  *    without specific prior written permission.
93  *
94  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
95  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
96  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
97  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
98  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
99  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
100  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
101  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
102  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
103  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
104  * SUCH DAMAGE.
105  *
106  *	@(#)machdep.c	8.3 (Berkeley) 1/12/94
107  * 	from: Utah Hdr: machdep.c 1.63 91/04/24
108  */
109 /*
110  * Copyright (c) 1988 University of Utah.
111  *
112  * This code is derived from software contributed to Berkeley by
113  * the Systems Programming Group of the University of Utah Computer
114  * Science Department, The Mach Operating System project at
115  * Carnegie-Mellon University and Ralph Campbell.
116  *
117  * Redistribution and use in source and binary forms, with or without
118  * modification, are permitted provided that the following conditions
119  * are met:
120  * 1. Redistributions of source code must retain the above copyright
121  *    notice, this list of conditions and the following disclaimer.
122  * 2. Redistributions in binary form must reproduce the above copyright
123  *    notice, this list of conditions and the following disclaimer in the
124  *    documentation and/or other materials provided with the distribution.
125  * 3. All advertising materials mentioning features or use of this software
126  *    must display the following acknowledgement:
127  *	This product includes software developed by the University of
128  *	California, Berkeley and its contributors.
129  * 4. Neither the name of the University nor the names of its contributors
130  *    may be used to endorse or promote products derived from this software
131  *    without specific prior written permission.
132  *
133  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
134  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
135  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
136  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
137  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
138  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
139  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
140  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
141  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
142  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
143  * SUCH DAMAGE.
144  *
145  *	@(#)machdep.c	8.3 (Berkeley) 1/12/94
146  * 	from: Utah Hdr: machdep.c 1.63 91/04/24
147  */
148 
149 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
150 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.20 2009/11/27 03:23:08 rmind Exp $");
151 
152 #include "opt_ddb.h"
153 #include "opt_kgdb.h"
154 #include "opt_modular.h"
155 
156 #include <sys/param.h>
157 #include <sys/systm.h>
158 #include <sys/kernel.h>
159 #include <sys/buf.h>
160 #include <sys/reboot.h>
161 #include <sys/mount.h>
162 #include <sys/kcore.h>
163 #include <sys/boot_flag.h>
164 #include <sys/termios.h>
165 #include <sys/ksyms.h>
166 #include <sys/device.h>
167 
168 #include <uvm/uvm_extern.h>
169 
170 #include <dev/cons.h>
171 
172 #include "ksyms.h"
173 
174 #if NKSYMS || defined(DDB) || defined(MODULAR)
175 #include <machine/db_machdep.h>
176 #include <ddb/db_extern.h>
177 #endif
178 
179 #include <mips/cache.h>
180 #include <mips/locore.h>
181 #include <mips/cpuregs.h>
182 
183 #include <mips/atheros/include/ar531xvar.h>
184 #include <mips/atheros/include/arbusvar.h>
185 
186 /* Our exported CPU info; we can have only one. */
187 struct cpu_info cpu_info_store;
188 
189 /* Maps for VM objects. */
190 struct vm_map *mb_map = NULL;
191 struct vm_map *phys_map = NULL;
192 
193 int maxmem;			/* max memory per process */
194 
195 int mem_cluster_cnt;
196 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
197 
198 void	mach_init(void); /* XXX */
199 
200 static void
201 cal_timer(void)
202 {
203 	uint32_t	cntfreq;
204 
205 	cntfreq = curcpu()->ci_cpu_freq = ar531x_cpu_freq();
206 
207 	/* MIPS 4Kc CP0 counts every other clock */
208 	if (mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
209 		cntfreq /= 2;
210 
211 	curcpu()->ci_cycles_per_hz = (cntfreq + hz / 2) / hz;
212 
213 	/* Compute number of cycles per 1us (1/MHz). 0.5MHz is for roundup. */
214 	curcpu()->ci_divisor_delay = ((cntfreq + 500000) / 1000000);
215 }
216 
217 void
218 mach_init(void)
219 {
220 	void *kernend;
221 	u_long first, last;
222 	struct pcb *pcb0;
223 	vaddr_t v;
224 	uint32_t memsize;
225 
226 	extern char edata[], end[];	/* XXX */
227 
228 	/* clear the BSS segment */
229 	kernend = (void *)mips_round_page(end);
230 
231 	memset(edata, 0, (char *)kernend - edata);
232 
233 	/* setup early console */
234 	ar531x_early_console();
235 
236 	/* set CPU model info for sysctl_hw */
237 	snprintf(cpu_model, 64, "%s", ar531x_cpuname());
238 
239 	/*
240 	 * Set up the exception vectors and CPU-specific function
241 	 * vectors early on.  We need the wbflush() vector set up
242 	 * before comcnattach() is called (or at least before the
243 	 * first printf() after that is called).
244 	 * Sets up mips_cpu_flags that may be queried by other
245 	 * functions called during startup.
246 	 * Also clears the I+D caches.
247 	 */
248 	mips_vector_init();
249 
250 	/*
251 	 * Calibrate timers.
252 	 */
253 	cal_timer();
254 
255 	/*
256 	 * Set the VM page size.
257 	 */
258 	uvm_setpagesize();
259 
260 	/*
261 	 * Look at arguments passed to us and compute boothowto.
262 	 */
263 	boothowto = RB_AUTOBOOT;
264 #ifdef KADB
265 	boothowto |= RB_KDB;
266 #endif
267 
268 	/*
269 	 * This would be a good place to parse a boot command line, if
270 	 * we got one from the bootloader.  Right now we have no way to
271 	 * get one from e.g. vxworks.
272 	 */
273 
274 	/*
275 	 * Determine the memory size.
276 	 *
277 	 * Note: Reserve the first page!  That's where the trap
278 	 * vectors are located.
279 	 */
280 	memsize = ar531x_memsize();
281 
282 	printf("Memory size: 0x%08x\n", memsize);
283 	physmem = btoc(memsize);
284 
285 	mem_clusters[mem_cluster_cnt].start = PAGE_SIZE;
286 	mem_clusters[mem_cluster_cnt].size =
287 	    memsize - mem_clusters[mem_cluster_cnt].start;
288 	mem_cluster_cnt++;
289 
290 	/*
291 	 * Load the rest of the available pages into the VM system.
292 	 */
293 	first = round_page(MIPS_KSEG0_TO_PHYS(kernend));
294 	last = mem_clusters[0].start + mem_clusters[0].size;
295 	uvm_page_physload(atop(first), atop(last), atop(first), atop(last),
296 	    VM_FREELIST_DEFAULT);
297 
298 	/*
299 	 * Initialize message buffer (at end of core).
300 	 */
301 	mips_init_msgbuf();
302 
303 	/*
304 	 * Initialize the virtual memory system.
305 	 */
306 	pmap_bootstrap();
307 
308 	/*
309 	 * Allocate uarea page for lwp0 and set it.
310 	 */
311 	v = uvm_pageboot_alloc(USPACE);
312 	uvm_lwp_setuarea(&lwp0, v);
313 
314 	pcb0 = lwp_getpcb(&lwp0);
315 	pcb0->pcb_context[11] = MIPS_INT_MASK | MIPS_SR_INT_IE; /* SR */
316 
317 	lwp0.l_md.md_regs = (struct frame *)(v + USPACE) - 1;
318 
319 	/*
320 	 * Initialize busses.
321 	 */
322 	ar531x_businit();
323 
324 	/*
325 	 * Turn off (ignore) the hardware watchdog.  If we got this
326 	 * far, then we shouldn't need it anymore.
327 	 */
328 	ar531x_wdog(0);
329 
330 	/*
331 	 * Turn off watchpoint that may have been enabled by the
332 	 * PROM.  VxWorks bootloader seems to leave one set.
333 	 */
334 	__asm volatile (
335 		"mtc0	$0, $" ___STRING(MIPS_COP_0_WATCH_LO) " \n\t"
336 		"nop\n\t"
337 		"nop\n\t");
338 
339 	/*
340 	 * Initialize debuggers, and break into them, if appropriate.
341 	 */
342 #ifdef DDB
343 	if (boothowto & RB_KDB)
344 		Debugger();
345 #endif
346 }
347 
348 void
349 consinit(void)
350 {
351 
352 	/*
353 	 * Everything related to console initialization is done
354 	 * in mach_init().
355 	 */
356 	ar531x_consinit();
357 }
358 
359 void
360 cpu_startup(void)
361 {
362 	char pbuf[9];
363 	vaddr_t minaddr, maxaddr;
364 #ifdef DEBUG
365 	extern int pmapdebug;		/* XXX */
366 	int opmapdebug = pmapdebug;
367 
368 	pmapdebug = 0;		/* Shut up pmap debug during bootstrap */
369 #endif
370 
371 	/*
372 	 * Good {morning,afternoon,evening,night}.
373 	 */
374 	printf("%s%s", copyright, version);
375 	printf("%s\n", cpu_model);
376 	format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
377 	printf("total memory = %s\n", pbuf);
378 
379 	minaddr = 0;
380 	/*
381 	 * Allocate a submap for physio
382 	 */
383 	phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
384 	    VM_PHYS_SIZE, 0, FALSE, NULL);
385 
386 	/*
387 	 * No need to allocate an mbuf cluster submap.  Mbuf clusters
388 	 * are allocated via the pool allocator, and we use KSEG to
389 	 * map those pages.
390 	 */
391 
392 #ifdef DEBUG
393 	pmapdebug = opmapdebug;
394 #endif
395 	format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
396 	printf("avail memory = %s\n", pbuf);
397 }
398 
399 void
400 cpu_reboot(int howto, char *bootstr)
401 {
402 	static int waittime = -1;
403 
404 	/* Take a snapshot before clobbering any registers. */
405 	if (curproc)
406 		savectx(curpcb);
407 
408 	/* If "always halt" was specified as a boot flag, obey. */
409 	if (boothowto & RB_HALT)
410 		howto |= RB_HALT;
411 
412 	boothowto = howto;
413 
414 	/* If system is cold, just halt. */
415 	if (cold) {
416 		boothowto |= RB_HALT;
417 		goto haltsys;
418 	}
419 
420 	if ((boothowto & RB_NOSYNC) == 0 && waittime < 0) {
421 		waittime = 0;
422 
423 		/*
424 		 * Synchronize the disks....
425 		 */
426 		vfs_shutdown();
427 
428 		/*
429 		 * If we've been adjusting the clock, the todr
430 		 * will be out of synch; adjust it now.
431 		 */
432 		resettodr();
433 	}
434 
435 	/* Disable interrupts. */
436 	splhigh();
437 
438 	if (boothowto & RB_DUMP)
439 		dumpsys();
440 
441  haltsys:
442 	/* Run any shutdown hooks. */
443 	doshutdownhooks();
444 
445 	pmf_system_shutdown(boothowto);
446 
447 #if 0
448 	if ((boothowto & RB_POWERDOWN) == RB_POWERDOWN)
449 		if (board && board->ab_poweroff)
450 			board->ab_poweroff();
451 #endif
452 
453 	/*
454 	 * Firmware may autoboot (depending on settings), and we cannot pass
455 	 * flags to it (at least I haven't figured out how to yet), so
456 	 * we "pseudo-halt" now.
457 	 */
458 	if (boothowto & RB_HALT) {
459 		printf("\n");
460 		printf("The operating system has halted.\n");
461 		printf("Please press any key to reboot.\n\n");
462 		cnpollc(1);	/* For proper keyboard command handling */
463 		cngetc();
464 		cnpollc(0);
465 	}
466 
467 	printf("reseting board...\n\n");
468 	mips_icache_sync_all();
469 	mips_dcache_wbinv_all();
470 	__asm volatile("jr	%0" :: "r"(MIPS_RESET_EXC_VEC));
471 	printf("Oops, back from reset\n\nSpinning...");
472 	for (;;)
473 		/* spin forever */ ;	/* XXX */
474 	/*NOTREACHED*/
475 }
476