1 /* $NetBSD: omsal400.c,v 1.11 2020/08/17 07:50:41 simonb Exp $ */ 2 3 /*- 4 * Copyright (c) 2006 Itronix Inc. 5 * Copyright (c) 2006 Shigeyuki Fukushima. 6 * All rights reserved. 7 * 8 * Written by Garrett D'Amore for Itronix Inc 9 * Written by Shigeyuki Fukushima. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer in the documentation and/or other materials provided 19 * with the distribution. 20 * 3. The name of the author may not be used to endorse or promote 21 * products derived from this software without specific prior 22 * written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 25 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 28 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 30 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 33 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: omsal400.c,v 1.11 2020/08/17 07:50:41 simonb Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/bus.h> 43 #include <sys/cpu.h> 44 45 #include <mips/locore.h> 46 #include <mips/cpuregs.h> 47 48 #include <mips/alchemy/dev/augpiovar.h> 49 #include <mips/alchemy/dev/aupcmciavar.h> 50 51 #include <evbmips/alchemy/obiovar.h> 52 #include <evbmips/alchemy/board.h> 53 #include <evbmips/alchemy/omsal400reg.h> 54 55 #define GET16(x) \ 56 (*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x))) 57 #define PUT16(x, v) \ 58 (*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)) = (v)) 59 60 static void omsal400_init(void); 61 static int omsal400_pci_intr_map(const struct pci_attach_args *, 62 pci_intr_handle_t *); 63 static void omsal400_poweroff(void); 64 static void omsal400_reboot(void); 65 static bus_addr_t omsal400_slot_offset(int); 66 static int omsal400_slot_irq(int, int); 67 static void omsal400_slot_enable(int); 68 static void omsal400_slot_disable(int); 69 static int omsal400_slot_status(int); 70 static const char *omsal400_slot_name(int); 71 72 static const struct obiodev omsal400_devices[] = { 73 { NULL }, 74 }; 75 76 static struct aupcmcia_machdep omsal400_pcmcia = { 77 1, /* nslots */ 78 omsal400_slot_offset, 79 omsal400_slot_irq, 80 omsal400_slot_enable, 81 omsal400_slot_disable, 82 omsal400_slot_status, 83 omsal400_slot_name, 84 }; 85 86 static struct alchemy_board omsal400_info = { 87 "Plathome Open Micro Server AL400/AMD Alchemy Au1550", 88 omsal400_devices, 89 omsal400_init, 90 omsal400_pci_intr_map, 91 omsal400_reboot, 92 omsal400_poweroff, 93 &omsal400_pcmcia, 94 }; 95 96 /* The OMS AL400 kernels only support little endian */ 97 CTASSERT(_BYTE_ORDER == _LITTLE_ENDIAN); 98 99 const struct alchemy_board * 100 board_info(void) 101 { 102 103 return &omsal400_info; 104 } 105 106 void 107 omsal400_init(void) 108 { 109 /* uint16_t whoami; */ 110 111 if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) != MIPS_AU1550) 112 panic("omsal400: CPU not Au1550"); 113 114 #if 0 /* XXX: TODO borad identification */ 115 /* check the whoami register for a match */ 116 whoami = GET16(DBAU1550_WHOAMI); 117 118 if (DBAU1550_WHOAMI_BOARD(whoami) != DBAU1550_WHOAMI_DBAU1550_REV1) 119 panic("dbau1550: WHOAMI (%x) not DBAu1550!", whoami); 120 121 printf("DBAu1550 (cabernet), CPLDv%d, ", 122 DBAU1550_WHOAMI_CPLD(whoami)); 123 124 if (DBAU1550_WHOAMI_DAUGHTER(whoami) != 0xf) 125 printf("daughtercard 0x%x\n", 126 DBAU1550_WHOAMI_DAUGHTER(whoami)); 127 else 128 printf("no daughtercard\n"); 129 #endif 130 131 /* leave console and clocks alone -- YAMON should have got it right! */ 132 } 133 134 int 135 omsal400_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 136 { 137 /* 138 * This platform has 4 PCI devices: 139 * dev 1 (PCI_INTD): PCI Connector 140 * dev 2 (PCI_INTC): NEC USB 2.0 uPD720101 141 * dev 3 (PCI_INTB): Intel GB Ether 82541PI 142 * dev 4 (PCI_INTA): Intel GB Ether 82541PI 143 */ 144 static const int irqmap[4/*device*/][4/*pin*/] = { 145 { 6, -1, -1, -1 }, /* 1: PCI Connecter (not used) */ 146 { 5, 5, 5, -1 }, /* 2: NEC USB 2.0 */ 147 { 2, -1, -1, -1 }, /* 3: Intel GbE */ 148 { 1, -1, -1, -1 }, /* 4: Intel GbE */ 149 }; 150 151 int pin, dev, irq; 152 153 /* if interrupt pin not used... */ 154 if ((pin = pa->pa_intrpin) == 0) 155 return 1; 156 157 if (pin > 4) { 158 printf("pci: bad interrupt pin %d\n", pin); 159 return 1; 160 } 161 162 pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, NULL, &dev, NULL); 163 164 if ((dev < 1) || (dev > 4)) { 165 printf("pci: bad device %d\n", dev); 166 return 1; 167 } 168 169 if ((irq = irqmap[dev - 1][pin - 1]) == -1) { 170 printf("pci: no IRQ routing for device %d pin %d\n", dev, pin); 171 return 1; 172 } 173 174 *ihp = irq; 175 return 0; 176 } 177 178 void 179 omsal400_reboot(void) 180 { 181 182 /* XXX */ 183 } 184 185 void 186 omsal400_poweroff(void) 187 { 188 189 printf("\n- poweroff -\n"); 190 /* XXX */ 191 } 192 193 194 int 195 omsal400_slot_irq(int slot, int which) 196 { 197 static const int irqmap[1/*slot*/][2/*which*/] = { 198 { 35, 37 }, /* Slot 0: CF connector Type2 */ 199 }; 200 201 if ((slot >= 1) || (which >= 2)) 202 return -1; 203 204 return irqmap[slot][which]; 205 } 206 207 bus_addr_t 208 omsal400_slot_offset(int slot) 209 { 210 211 switch (slot) { 212 case 0: 213 return (0); /* offset 0 */ 214 } 215 return (bus_addr_t)-1; 216 } 217 218 void 219 omsal400_slot_enable(int slot) 220 { 221 222 /* nothing todo */ 223 } 224 225 void 226 omsal400_slot_disable(int slot) 227 { 228 229 /* nothing todo */ 230 } 231 232 int 233 omsal400_slot_status(int slot) 234 { 235 uint16_t inserted = 0; 236 237 switch (slot) { 238 case 0: 239 inserted = !AUGPIO_READ(5); /* pin 5 */ 240 break; 241 } 242 243 return inserted; 244 } 245 246 const char * 247 omsal400_slot_name(int slot) 248 { 249 switch (slot) { 250 case 0: 251 return "CF connector Type2 on Static BUS#3"; 252 default: 253 return "???"; 254 } 255 } 256