1 /* $NetBSD: mtx-1.c,v 1.8 2015/06/09 22:49:55 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 2006 Itronix Inc. 5 * All rights reserved. 6 * 7 * Written by Garrett D'Amore for Itronix Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of Itronix Inc. may not be used to endorse 18 * or promote products derived from this software without specific 19 * prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: mtx-1.c,v 1.8 2015/06/09 22:49:55 matt Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/bus.h> 39 #include <sys/cpu.h> 40 41 #include <mips/locore.h> 42 43 #include <evbmips/alchemy/obiovar.h> 44 #include <evbmips/alchemy/board.h> 45 46 #define MTX1_RESET 0xE00001C 47 48 #define GET16(x) \ 49 (*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x))) 50 #define PUT16(x, v) \ 51 (*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)) = (v)) 52 53 static void mtx1_init(void); 54 static int mtx1_pci_intr_map(const struct pci_attach_args *, 55 pci_intr_handle_t *); 56 static void mtx1_reboot(void); 57 58 static const struct obiodev mtx1_devices[] = { 59 #if 0 60 { "aupcmcia", -1, -1 }, 61 { "auaudio", -1, -1 }, 62 #endif 63 { NULL }, 64 }; 65 66 static struct alchemy_board mtx1_info = { 67 "4G Systems MTX-1", 68 mtx1_devices, 69 mtx1_init, 70 mtx1_pci_intr_map, 71 mtx1_reboot, 72 NULL, /* poweroff */ 73 }; 74 75 const struct alchemy_board * 76 board_info(void) 77 { 78 79 return &mtx1_info; 80 } 81 82 void 83 mtx1_init(void) 84 { 85 86 if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) != MIPS_AU1500) 87 panic("mtx-1: CPU not an AU1500!"); 88 89 /* 90 * If we had any kind of identification registers, we could 91 * print them here. Apparently the MTX-1 doesn't have that 92 * kind of info. 93 */ 94 95 /* leave console and clocks alone -- YAMON should have got it right! */ 96 } 97 98 int 99 mtx1_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 100 { 101 /* 102 * The board has up to 4 adapters, each with two minipci slots, 103 * giving up to 8 devices. Each slot 0 is the top, and slot 1 104 * is the bottom. 105 * 106 * As these are mini PCI slots, only 2 interrupt pins can be 107 * used on each slot. 108 */ 109 static const int irqmap[8/*device*/][4/*pin*/] = { 110 { 1, 2, -1, -1 }, /* IDSEL 0 - Adapter A - Slot 0 */ 111 { 1, 2, -1, -1 }, /* IDSEL 1 - Adapter A - Slot 1 */ 112 { 4, 5, -1, -1 }, /* IDSEL 2 - Adapter B - Slot 0 */ 113 { 5, 4, -1, -1 }, /* IDSEL 3 - Adapter B - Slot 1 */ 114 115 { 1, 2, -1, -1 }, /* IDSEL 4 - Adapter C - Slot 0 */ 116 { 1, 2, -1, -1 }, /* IDSEL 5 - Adapter C - Slot 1 */ 117 { 4, 5, -1, -1 }, /* IDSEL 6 - Adapter D - Slot 0 */ 118 { 5, 4, -1, -1 }, /* IDSEL 7 - Adapter D - Slot 1 */ 119 }; 120 int pin, dev, irq; 121 122 /* if interrupt pin not used... */ 123 if ((pin = pa->pa_intrpin) == 0) 124 return 1; 125 126 if (pin > 4) { 127 printf("pci: bad interrupt pin %d\n", pin); 128 return 1; 129 } 130 131 pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, NULL, &dev, NULL); 132 if ((dev < 0) || (dev > 7)) { 133 printf("pci: bad device %d\n", dev); 134 return 1; 135 } 136 137 if ((irq = irqmap[dev][pin - 1]) == -1) { 138 printf("pci: no IRQ routing for device %d pin %d\n", dev, pin); 139 return 1; 140 } 141 142 *ihp = irq; 143 return 0; 144 } 145 146 void 147 mtx1_reboot(void) 148 { 149 /* fyi, this looks like the same as the DBAu1500 reset */ 150 PUT16(MTX1_RESET , 0); 151 delay(100000); /* 100 msec */ 152 } 153