xref: /netbsd-src/sys/arch/evbmips/alchemy/mtx-1.c (revision 7788a0781fe6ff2cce37368b4578a7ade0850cb1)
1 /* $NetBSD: mtx-1.c,v 1.7 2011/07/10 00:03:52 matt Exp $ */
2 
3 /*-
4  * Copyright (c) 2006 Itronix Inc.
5  * All rights reserved.
6  *
7  * Written by Garrett D'Amore for Itronix Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. The name of Itronix Inc. may not be used to endorse
18  *    or promote products derived from this software without specific
19  *    prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28  * ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: mtx-1.c,v 1.7 2011/07/10 00:03:52 matt Exp $");
36 
37 #include <sys/param.h>
38 #include <sys/bus.h>
39 
40 #include <mips/locore.h>
41 
42 #include <evbmips/alchemy/obiovar.h>
43 #include <evbmips/alchemy/board.h>
44 
45 #define	MTX1_RESET	0xE00001C
46 
47 #define	GET16(x)	\
48 	(*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)))
49 #define	PUT16(x, v)	\
50 	(*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)) = (v))
51 
52 static void mtx1_init(void);
53 static int mtx1_pci_intr_map(const struct pci_attach_args *,
54 				 pci_intr_handle_t *);
55 static void mtx1_reboot(void);
56 
57 static const struct obiodev mtx1_devices[] = {
58 #if 0
59 	{ "aupcmcia", -1, -1 },
60 	{ "auaudio", -1, -1 },
61 #endif
62 	{ NULL },
63 };
64 
65 static struct alchemy_board mtx1_info = {
66 	"4G Systems MTX-1",
67 	mtx1_devices,
68 	mtx1_init,
69 	mtx1_pci_intr_map,
70 	mtx1_reboot,
71 	NULL,	/* poweroff */
72 };
73 
74 const struct alchemy_board *
75 board_info(void)
76 {
77 
78 	return &mtx1_info;
79 }
80 
81 void
82 mtx1_init(void)
83 {
84 
85 	if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) != MIPS_AU1500)
86 		panic("mtx-1: CPU not an AU1500!");
87 
88 	/*
89 	 * If we had any kind of identification registers, we could
90 	 * print them here.  Apparently the MTX-1 doesn't have that
91 	 * kind of info.
92 	 */
93 
94 	/* leave console and clocks alone -- YAMON should have got it right! */
95 }
96 
97 int
98 mtx1_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
99 {
100 	/*
101 	 * The board has up to 4 adapters, each with two minipci slots,
102 	 * giving up to 8 devices.  Each slot 0 is the top, and slot 1
103 	 * is the bottom.
104 	 *
105 	 * As these are mini PCI slots, only 2 interrupt pins can be
106 	 * used on each slot.
107 	 */
108 	static const int irqmap[8/*device*/][4/*pin*/] = {
109 		{  1,  2, -1, -1 },	/* IDSEL 0 - Adapter A - Slot 0 */
110 		{  1,  2, -1, -1 },	/* IDSEL 1 - Adapter A - Slot 1 */
111 		{  4,  5, -1, -1 },	/* IDSEL 2 - Adapter B - Slot 0 */
112 		{  5,  4, -1, -1 },	/* IDSEL 3 - Adapter B - Slot 1 */
113 
114 		{  1,  2, -1, -1 },	/* IDSEL 4 - Adapter C - Slot 0 */
115 		{  1,  2, -1, -1 },	/* IDSEL 5 - Adapter C - Slot 1 */
116 		{  4,  5, -1, -1 },	/* IDSEL 6 - Adapter D - Slot 0 */
117 		{  5,  4, -1, -1 },	/* IDSEL 7 - Adapter D - Slot 1 */
118 	};
119 	int	pin, dev, irq;
120 
121 	/* if interrupt pin not used... */
122 	if ((pin = pa->pa_intrpin) == 0)
123 		return 1;
124 
125 	if (pin > 4) {
126 		printf("pci: bad interrupt pin %d\n", pin);
127 		return 1;
128 	}
129 
130 	pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, NULL, &dev, NULL);
131 	if ((dev < 0) || (dev > 7)) {
132 		printf("pci: bad device %d\n", dev);
133 		return 1;
134 	}
135 
136 	if ((irq = irqmap[dev][pin - 1]) == -1) {
137 		printf("pci: no IRQ routing for device %d pin %d\n", dev, pin);
138 		return 1;
139 	}
140 
141 	*ihp = irq;
142 	return 0;
143 }
144 
145 void
146 mtx1_reboot(void)
147 {
148 	/* fyi, this looks like the same as the DBAu1500 reset */
149 	PUT16(MTX1_RESET , 0);
150 	delay(100000);	/* 100 msec */
151 }
152