1*c7fb772bSthorpej /* $NetBSD: tslcd.c,v 1.20 2021/08/07 16:18:50 thorpej Exp $ */
2c87859c9Sjoff
3c87859c9Sjoff /*-
4c87859c9Sjoff * Copyright (c) 1998 The NetBSD Foundation, Inc.
5c87859c9Sjoff * All rights reserved.
6c87859c9Sjoff *
7c87859c9Sjoff * This code is derived from software contributed to The NetBSD Foundation
8c87859c9Sjoff * by Jesse Off.
9c87859c9Sjoff *
10c87859c9Sjoff * Redistribution and use in source and binary forms, with or without
11c87859c9Sjoff * modification, are permitted provided that the following conditions
12c87859c9Sjoff * are met:
13c87859c9Sjoff * 1. Redistributions of source code must retain the above copyright
14c87859c9Sjoff * notice, this list of conditions and the following disclaimer.
15c87859c9Sjoff * 2. Redistributions in binary form must reproduce the above copyright
16c87859c9Sjoff * notice, this list of conditions and the following disclaimer in the
17c87859c9Sjoff * documentation and/or other materials provided with the distribution.
18c87859c9Sjoff *
19c87859c9Sjoff * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20c87859c9Sjoff * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21c87859c9Sjoff * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22c87859c9Sjoff * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23c87859c9Sjoff * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24c87859c9Sjoff * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25c87859c9Sjoff * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26c87859c9Sjoff * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27c87859c9Sjoff * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28c87859c9Sjoff * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29c87859c9Sjoff * POSSIBILITY OF SUCH DAMAGE.
30c87859c9Sjoff */
31c87859c9Sjoff #include <sys/cdefs.h>
32*c7fb772bSthorpej __KERNEL_RCSID(0, "$NetBSD: tslcd.c,v 1.20 2021/08/07 16:18:50 thorpej Exp $");
33c87859c9Sjoff
34c87859c9Sjoff #include <sys/param.h>
35c87859c9Sjoff #include <sys/systm.h>
36c87859c9Sjoff #include <sys/proc.h>
37c87859c9Sjoff #include <sys/poll.h>
38c87859c9Sjoff #include <sys/conf.h>
39c87859c9Sjoff #include <sys/uio.h>
40c87859c9Sjoff #include <sys/types.h>
41c87859c9Sjoff #include <sys/kernel.h>
42c87859c9Sjoff #include <sys/device.h>
43c87859c9Sjoff #include <sys/callout.h>
44c87859c9Sjoff #include <sys/select.h>
45c87859c9Sjoff
46cf10107dSdyoung #include <sys/bus.h>
47c87859c9Sjoff #include <machine/autoconf.h>
48c87859c9Sjoff
4932262aa8Sjoff #include <dev/wscons/wsdisplayvar.h>
5032262aa8Sjoff #include <dev/wscons/wsconsio.h>
5132262aa8Sjoff #include <dev/wscons/wscons_callbacks.h>
5232262aa8Sjoff
53c87859c9Sjoff #include <arm/ep93xx/ep93xxreg.h>
5400185e02Smatt #include <arm/ep93xx/epgpioreg.h>
55c87859c9Sjoff #include <dev/ic/hd44780reg.h>
56b6b2f0d2Sjoff #include <dev/ic/hd44780var.h>
57c87859c9Sjoff #include <evbarm/tsarm/tspldvar.h>
58c87859c9Sjoff #include <evbarm/tsarm/tsarmreg.h>
59c87859c9Sjoff
60c87859c9Sjoff struct tslcd_softc {
6132262aa8Sjoff struct hd44780_chip sc_hlcd;
62c87859c9Sjoff bus_space_tag_t sc_iot;
63c87859c9Sjoff bus_space_handle_t sc_gpioh;
64c87859c9Sjoff };
65c87859c9Sjoff
66cbab9cadSchs static int tslcd_match(device_t, cfdata_t, void *);
67cbab9cadSchs static void tslcd_attach(device_t, device_t, void *);
68c87859c9Sjoff
6908a4aba7Sskrll static void tslcd_writereg(struct hd44780_chip *, uint32_t, uint32_t, uint8_t);
7008a4aba7Sskrll static uint8_t tslcd_readreg(struct hd44780_chip *, uint32_t, uint32_t);
71c87859c9Sjoff
72c87859c9Sjoff dev_type_open(tslcdopen);
73c87859c9Sjoff dev_type_close(tslcdclose);
74c87859c9Sjoff dev_type_read(tslcdread);
75c87859c9Sjoff dev_type_write(tslcdwrite);
76c87859c9Sjoff dev_type_ioctl(tslcdioctl);
77c87859c9Sjoff dev_type_poll(tslcdpoll);
78c87859c9Sjoff
79c87859c9Sjoff const struct cdevsw tslcd_cdevsw = {
80a68f9396Sdholland .d_open = tslcdopen,
81a68f9396Sdholland .d_close = tslcdclose,
82a68f9396Sdholland .d_read = tslcdread,
83a68f9396Sdholland .d_write = tslcdwrite,
84a68f9396Sdholland .d_ioctl = tslcdioctl,
85a68f9396Sdholland .d_stop = nostop,
86a68f9396Sdholland .d_tty = notty,
87a68f9396Sdholland .d_poll = tslcdpoll,
88a68f9396Sdholland .d_mmap = nommap,
89a68f9396Sdholland .d_kqfilter = nokqfilter,
90f9228f42Sdholland .d_discard = nodiscard,
91a68f9396Sdholland .d_flag = 0
92c87859c9Sjoff };
93c87859c9Sjoff
9432262aa8Sjoff extern const struct wsdisplay_emulops hlcd_emulops;
9532262aa8Sjoff extern const struct wsdisplay_accessops hlcd_accessops;
96c87859c9Sjoff extern struct cfdriver tslcd_cd;
97c87859c9Sjoff
98cbab9cadSchs CFATTACH_DECL_NEW(tslcd, sizeof(struct tslcd_softc),
99c87859c9Sjoff tslcd_match, tslcd_attach, NULL, NULL);
100c87859c9Sjoff
10132262aa8Sjoff static const struct wsscreen_descr tslcd_stdscreen = {
10232262aa8Sjoff "std_tslcd", 24, 2,
10332262aa8Sjoff &hlcd_emulops,
10432262aa8Sjoff 5, 7,
10532262aa8Sjoff 0,
10632262aa8Sjoff };
10732262aa8Sjoff
10832262aa8Sjoff static const struct wsscreen_descr *_tslcd_scrlist[] = {
10932262aa8Sjoff &tslcd_stdscreen,
11032262aa8Sjoff };
11132262aa8Sjoff
11232262aa8Sjoff static const struct wsscreen_list tslcd_screenlist = {
11332262aa8Sjoff sizeof(_tslcd_scrlist) / sizeof(struct wsscreen_descr *),
11432262aa8Sjoff _tslcd_scrlist,
11532262aa8Sjoff };
11632262aa8Sjoff
117c87859c9Sjoff static int
tslcd_match(device_t parent,cfdata_t match,void * aux)118cbab9cadSchs tslcd_match(device_t parent, cfdata_t match, void *aux)
119c87859c9Sjoff {
120c87859c9Sjoff return 1;
121c87859c9Sjoff }
122c87859c9Sjoff
123c87859c9Sjoff #define GPIO_GET(x) bus_space_read_1(sc->sc_iot, sc->sc_gpioh, \
124c87859c9Sjoff (EP93XX_GPIO_ ## x))
125c87859c9Sjoff
126c87859c9Sjoff #define GPIO_SET(x, y) bus_space_write_1(sc->sc_iot, sc->sc_gpioh, \
127c87859c9Sjoff (EP93XX_GPIO_ ## x), (y))
128c87859c9Sjoff
129c87859c9Sjoff #define GPIO_SETBITS(x, y) bus_space_write_1(sc->sc_iot, sc->sc_gpioh, \
130c87859c9Sjoff (EP93XX_GPIO_ ## x), GPIO_GET(x) | (y))
131c87859c9Sjoff
132c87859c9Sjoff #define GPIO_CLEARBITS(x, y) bus_space_write_1(sc->sc_iot, sc->sc_gpioh, \
133c87859c9Sjoff (EP93XX_GPIO_ ## x), GPIO_GET(x) & (~(y)))
134c87859c9Sjoff
135c87859c9Sjoff static void
tslcd_attach(device_t parent,device_t self,void * aux)136cbab9cadSchs tslcd_attach(device_t parent, device_t self, void *aux)
137c87859c9Sjoff {
138cbab9cadSchs struct tslcd_softc *sc = device_private(self);
139c87859c9Sjoff struct tspld_attach_args *taa = aux;
14032262aa8Sjoff struct wsemuldisplaydev_attach_args waa;
141c87859c9Sjoff
142c87859c9Sjoff sc->sc_iot = taa->ta_iot;
143c87859c9Sjoff if (bus_space_map(sc->sc_iot, EP93XX_APB_HWBASE + EP93XX_APB_GPIO,
144c87859c9Sjoff EP93XX_APB_GPIO_SIZE, 0, &sc->sc_gpioh))
145c87859c9Sjoff panic("tslcd_attach: couldn't map GPIO registers");
146c87859c9Sjoff
14732262aa8Sjoff sc->sc_hlcd.sc_dev_ok = 1;
14832262aa8Sjoff sc->sc_hlcd.sc_cols = 24;
14932262aa8Sjoff sc->sc_hlcd.sc_vcols = 40;
15032262aa8Sjoff sc->sc_hlcd.sc_flags = HD_8BIT | HD_MULTILINE;
15132262aa8Sjoff sc->sc_hlcd.sc_dev = self;
152c87859c9Sjoff
15332262aa8Sjoff sc->sc_hlcd.sc_writereg = tslcd_writereg;
15432262aa8Sjoff sc->sc_hlcd.sc_readreg = tslcd_readreg;
155c87859c9Sjoff
156c87859c9Sjoff GPIO_SET(PADDR, 0); /* Port A to inputs */
157c87859c9Sjoff GPIO_SETBITS(PHDDR, 0x38); /* Bits 3:5 of Port H to outputs */
158c87859c9Sjoff GPIO_CLEARBITS(PHDR, 0x18); /* De-assert EN, De-assert RS */
159c87859c9Sjoff
160c87859c9Sjoff printf("\n");
1615f20950eSjoff
16232262aa8Sjoff hd44780_attach_subr(&sc->sc_hlcd);
16332262aa8Sjoff
16432262aa8Sjoff waa.console = 0;
16532262aa8Sjoff waa.scrdata = &tslcd_screenlist;
16632262aa8Sjoff waa.accessops = &hlcd_accessops;
16732262aa8Sjoff waa.accesscookie = &sc->sc_hlcd.sc_screen;
168*c7fb772bSthorpej config_found(self, &waa, wsemuldisplaydevprint, CFARGS_NONE);
169c87859c9Sjoff }
170c87859c9Sjoff
171c87859c9Sjoff static void
tslcd_writereg(struct hd44780_chip * hd,uint32_t en,uint32_t rs,uint8_t cmd)17208a4aba7Sskrll tslcd_writereg(struct hd44780_chip *hd, uint32_t en, uint32_t rs, uint8_t cmd)
173c87859c9Sjoff {
174cbab9cadSchs struct tslcd_softc *sc = device_private(hd->sc_dev);
17508a4aba7Sskrll uint8_t ctrl;
1765f20950eSjoff
1775f20950eSjoff if (hd->sc_dev_ok == 0)
1785f20950eSjoff return;
179c87859c9Sjoff
180c87859c9Sjoff /* Step 1: Apply RS & WR, Send data */
1815f20950eSjoff ctrl = GPIO_GET(PHDR);
182c87859c9Sjoff GPIO_SET(PADDR, 0xff); /* set port A to outputs */
183c87859c9Sjoff GPIO_SET(PADR, cmd);
184c87859c9Sjoff if (rs) {
185c87859c9Sjoff ctrl |= 0x10; /* assert RS */
186c87859c9Sjoff ctrl &= ~0x20; /* assert WR */
187c87859c9Sjoff } else {
188c87859c9Sjoff ctrl &= ~0x30; /* de-assert WR, de-assert RS */
189c87859c9Sjoff }
190c87859c9Sjoff GPIO_SET(PHDR, ctrl);
191c87859c9Sjoff
192c87859c9Sjoff /* Step 2: setup time delay */
193c87859c9Sjoff delay(1);
194c87859c9Sjoff
195c87859c9Sjoff /* Step 3: assert EN */
196c87859c9Sjoff ctrl |= 0x8;
197c87859c9Sjoff GPIO_SET(PHDR, ctrl);
198c87859c9Sjoff
199c87859c9Sjoff /* Step 4: pulse time delay */
200c87859c9Sjoff delay(1);
201c87859c9Sjoff
202c87859c9Sjoff /* Step 5: de-assert EN */
203c87859c9Sjoff ctrl &= ~0x8;
204c87859c9Sjoff GPIO_SET(PHDR, ctrl);
205c87859c9Sjoff
206c87859c9Sjoff /* Step 6: hold time delay */
207c87859c9Sjoff delay(1);
208c87859c9Sjoff
209c87859c9Sjoff /* Step 7: de-assert WR */
210c87859c9Sjoff ctrl |= 0x2;
211c87859c9Sjoff GPIO_SET(PHDR, ctrl);
212c87859c9Sjoff
213c87859c9Sjoff /* Step 8: minimum delay till next bus-cycle */
214c87859c9Sjoff delay(1000);
215c87859c9Sjoff }
216c87859c9Sjoff
21708a4aba7Sskrll static uint8_t
tslcd_readreg(struct hd44780_chip * hd,uint32_t en,uint32_t rs)21808a4aba7Sskrll tslcd_readreg(struct hd44780_chip *hd, uint32_t en, uint32_t rs)
219c87859c9Sjoff {
220cbab9cadSchs struct tslcd_softc *sc = device_private(hd->sc_dev);
22108a4aba7Sskrll uint8_t ret, ctrl;
2225f20950eSjoff
2235f20950eSjoff if (hd->sc_dev_ok == 0)
2245f20950eSjoff return 0;
225c87859c9Sjoff
226c87859c9Sjoff /* Step 1: Apply RS & WR, Send data */
2275f20950eSjoff ctrl = GPIO_GET(PHDR);
228c87859c9Sjoff GPIO_SET(PADDR, 0x0); /* set port A to inputs */
229c87859c9Sjoff if (rs) {
2305f20950eSjoff ctrl |= 0x30; /* de-assert WR, assert RS */
2315f20950eSjoff } else {
232c87859c9Sjoff ctrl |= 0x20; /* de-assert WR */
233c87859c9Sjoff ctrl &= ~0x10; /* de-assert RS */
234c87859c9Sjoff }
235c87859c9Sjoff GPIO_SET(PHDR, ctrl);
236c87859c9Sjoff
237c87859c9Sjoff /* Step 2: setup time delay */
238c87859c9Sjoff delay(1);
239c87859c9Sjoff
240c87859c9Sjoff /* Step 3: assert EN */
241c87859c9Sjoff ctrl |= 0x8;
242c87859c9Sjoff GPIO_SET(PHDR, ctrl);
243c87859c9Sjoff
244c87859c9Sjoff /* Step 4: pulse time delay */
245c87859c9Sjoff delay(1);
246c87859c9Sjoff
247c87859c9Sjoff /* Step 5: de-assert EN */
248c87859c9Sjoff ret = GPIO_GET(PADR) & 0xff;
249c87859c9Sjoff ctrl &= ~0x8;
250c87859c9Sjoff GPIO_SET(PHDR, ctrl);
251c87859c9Sjoff
252c87859c9Sjoff /* Step 6: hold time delay + min bus cycle interval*/
253c87859c9Sjoff delay(1000);
254c87859c9Sjoff return ret;
255c87859c9Sjoff }
256c87859c9Sjoff
257c87859c9Sjoff int
tslcdopen(dev_t dev,int flag,int mode,struct lwp * l)25863495428Scegger tslcdopen(dev_t dev, int flag, int mode, struct lwp *l)
259c87859c9Sjoff {
26063495428Scegger struct tslcd_softc *sc = device_lookup_private(&tslcd_cd, minor(dev));
2615f20950eSjoff
26232262aa8Sjoff if (sc->sc_hlcd.sc_dev_ok == 0)
26332262aa8Sjoff return hd44780_init(&sc->sc_hlcd);
2645f20950eSjoff else
2655f20950eSjoff return 0;
266c87859c9Sjoff }
267c87859c9Sjoff
268c87859c9Sjoff int
tslcdclose(dev_t dev,int flag,int mode,struct lwp * l)26963495428Scegger tslcdclose(dev_t dev, int flag, int mode, struct lwp *l)
270c87859c9Sjoff {
271c87859c9Sjoff return 0;
272c87859c9Sjoff }
273c87859c9Sjoff
274c87859c9Sjoff int
tslcdread(dev_t dev,struct uio * uio,int flag)27563495428Scegger tslcdread(dev_t dev, struct uio *uio, int flag)
276c87859c9Sjoff {
277c87859c9Sjoff return EIO;
278c87859c9Sjoff }
279c87859c9Sjoff
280c87859c9Sjoff int
tslcdwrite(dev_t dev,struct uio * uio,int flag)28163495428Scegger tslcdwrite(dev_t dev, struct uio *uio, int flag)
282c87859c9Sjoff {
283c87859c9Sjoff int error;
284c87859c9Sjoff struct hd44780_io io;
28563495428Scegger struct tslcd_softc *sc = device_lookup_private(&tslcd_cd, minor(dev));
286c87859c9Sjoff
28732262aa8Sjoff if (sc->sc_hlcd.sc_dev_ok == 0)
2885f20950eSjoff return EIO;
2895f20950eSjoff
290c87859c9Sjoff io.dat = 0;
291c87859c9Sjoff io.len = uio->uio_resid;
292c87859c9Sjoff if (io.len > HD_MAX_CHARS)
293c87859c9Sjoff io.len = HD_MAX_CHARS;
294c87859c9Sjoff
295c87859c9Sjoff if ((error = uiomove((void*)io.buf, io.len, uio)) != 0)
296c87859c9Sjoff return error;
297c87859c9Sjoff
29892e361f3Sjoff hd44780_ddram_redraw(&sc->sc_hlcd, sc->sc_hlcd.sc_curchip, &io);
299c87859c9Sjoff return 0;
300c87859c9Sjoff }
301c87859c9Sjoff
302c87859c9Sjoff int
tslcdioctl(dev_t dev,u_long cmd,void * data,int flag,struct lwp * l)30363495428Scegger tslcdioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
304c87859c9Sjoff {
30563495428Scegger struct tslcd_softc *sc = device_lookup_private(&tslcd_cd, minor(dev));
30632262aa8Sjoff return hd44780_ioctl_subr(&sc->sc_hlcd, cmd, data);
307c87859c9Sjoff }
308c87859c9Sjoff
309c87859c9Sjoff int
tslcdpoll(dev_t dev,int events,struct lwp * l)31063495428Scegger tslcdpoll(dev_t dev, int events, struct lwp *l)
311c87859c9Sjoff {
312c87859c9Sjoff return 0;
313c87859c9Sjoff }
314