1/*- 2 * Copyright (c) 2012 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Paul Fleischer <paul@xpg.dk> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30#define _LOCORE 31#define _KERNEL 32 33#include <machine/asm.h> 34#include <arm/armreg.h> 35#include <arm/arm32/pte.h> 36#include <arm/arm32/pmap.h> /* for PMAP_DOMAIN_KERNEL */ 37 38#include <arm/s3c2xx0/s3c2440reg.h> /* for S3C2440_SDRAM_START */ 39 40#ifndef SDRAM_START 41#define SDRAM_START S3C2440_SDRAM_START 42#endif 43 44/* LED1/2/3/4 are manipulated by GPIO B5/6/7/8. */ 45#define LED1 (1<<5) 46#define LED2 (1<<6) 47#define LED3 (1<<7) 48#define LED4 (1<<8) 49 50 .text 51 .global _start 52_start: 53 /* Get arguments from boot-loader (stored in r0 and r1) */ 54 adr r2, Largs 55 stmia r2, {r0, r1} 56 57 /* Disable interrupt */ 58 mrs r0, cpsr 59 orr r0, r0, #I32_bit 60 msr cpsr, r0 61 62 /* Turn off all LEDS except LED2 */ 63 mov r1, #S3C2440_GPIO_BASE 64 add r1, r1, #0x14 65 ldr r3, [r1] 66 orr r3, r3, #LED1 /* LEDS are active-low, so we set their bit to turn them off */ 67 bic r3, r3, #LED2 68 orr r3, r3, #LED3 69 orr r3, r3, #LED4 70 str r3, [r1] 71 72 /* Setup BANK6/7 memory map */ 73 mov r1, #S3C2440_MEMCTL_BASE 74 ldr r2, [r1, #MEMCTL_BANKSIZE] 75 bic r2, r2, #0x7 /* Clear the three lowest bits (BK67MAP) */ 76 add r2, r2, #0x1 /* Set BK67MAP to b001 = 64MB/64MB */ 77 str r2, [r1, #MEMCTL_BANKSIZE] 78 79 /* Disable MMU for a while */ 80 mrc p15, 0, r2, c1, c0, 0 81 bic r2, r2, #CPU_CONTROL_MMU_ENABLE 82 mcr p15, 0, r2, c1, c0, 0 83 84 nop 85 nop 86 nop 87 88 ldr r0, LpageTable /* pagetable */ 89 adr r4, mmu_init_table 90 b 2f 911: 92 str r3, [r0, r2] 93 add r2, r2, #4 94 add r3, r3, #(L1_S_SIZE) 95 adds r1, r1, #-1 96 bhi 1b 972: 98 ldmia r4!, {r1,r2,r3} /* # of sections, PA|attr, VA */ 99 cmp r1, #0 100 bne 1b 101 102 mcr p15, 0, r0, c2, c0, 0 /* Set TTB */ 103 mcr p15, 0, r0, c8, c7, 0 /* Flush TLB */ 104 105 /* Set the Domain Access register. Very important! */ 106 mov r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT) 107 mcr p15, 0, r0, c3, c0, 0 108 109 /* Enable MMU */ 110 mrc p15, 0, r0, c1, c0, 0 111 orr r0, r0, #CPU_CONTROL_MMU_ENABLE 112 mcr p15, 0, r0, c1, c0, 0 113 114 nop 115 nop 116 nop 117 118 /* Prepare stack */ 119 adr r1, Lcrtsetup 120 ldmia r1, {r1, r2, sp} 121 sub r2, r2, r1 /* get zero init data */ 122 mov r3, #0 123.L1: 124 str r3, [r1], #0x0004 /* zero the bss */ 125 subs r2, r2, #4 126 bgt .L1 127 128 129 adr r2, Largs 130 ldmia r2, {r0, r1} 131 132 /* Jump to kernel code in TRUE VA */ 133 ldr pc, Lstart 134 135Lstart: 136 .word main 137 138#define MMU_INIT(va,pa,n_sec,attr) \ 139 .word n_sec ; \ 140 .word 4*((va)>>L1_S_SHIFT) ; \ 141 .word (pa)|(attr) ; 142 143mmu_init_table: 144 /* fill all table VA==PA */ 145 MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP(AP_KRW)) 146 /* map SDRAM VA==PA, WT cacheable */ 147 MMU_INIT(SDRAM_START, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW)) 148 /* map VA 0xc0000000..0xc3ffffff to PA 0x30000000..0x33ffffff */ 149 MMU_INIT(0xc0000000, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW)) 150 151 .word 0 /* end of table */ 152 153LpageTable: 154 .word 0x30000000 155Lcrtsetup: 156 .word _edata /* Start of BSS */ 157 .word _end /* End of BSS */ 158 .word 0x30A00000 /* Place stack-bottom at load-point of libsa bootloader */ 159 160Largs: 161 .space 8 /* to save r0/r1 registers */ 162