1 /* $NetBSD: netwalker_machdep.c,v 1.15 2014/04/09 04:00:50 hkenken Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2005, 2010 Genetec Corporation. 5 * All rights reserved. 6 * Written by Hiroyuki Bessho for Genetec Corporation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Machine dependent functions for kernel setup for Sharp Netwalker. 30 * Based on iq80310_machhdep.c 31 */ 32 /* 33 * Copyright (c) 2001 Wasabi Systems, Inc. 34 * All rights reserved. 35 * 36 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed for the NetBSD Project by 49 * Wasabi Systems, Inc. 50 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 51 * or promote products derived from this software without specific prior 52 * written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 55 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1997,1998 Mark Brinicombe. 69 * Copyright (c) 1997,1998 Causality Limited. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 3. All advertising materials mentioning features or use of this software 81 * must display the following acknowledgement: 82 * This product includes software developed by Mark Brinicombe 83 * for the NetBSD Project. 84 * 4. The name of the company nor the name of the author may be used to 85 * endorse or promote products derived from this software without specific 86 * prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 89 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 90 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 92 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 93 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 94 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 95 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 96 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 97 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 98 * SUCH DAMAGE. 99 * 100 * Machine dependent functions for kernel setup for Intel IQ80310 evaluation 101 * boards using RedBoot firmware. 102 */ 103 104 #include <sys/cdefs.h> 105 __KERNEL_RCSID(0, "$NetBSD: netwalker_machdep.c,v 1.15 2014/04/09 04:00:50 hkenken Exp $"); 106 107 #include "opt_evbarm_boardtype.h" 108 #include "opt_cputypes.h" 109 #include "opt_ddb.h" 110 #include "opt_kgdb.h" 111 #include "opt_md.h" 112 #include "opt_com.h" 113 #include "imxuart.h" 114 #include "opt_imxuart.h" 115 #include "opt_imx.h" 116 #include "opt_imx51_ipuv3.h" 117 #include "wsdisplay.h" 118 119 #include <sys/param.h> 120 #include <sys/device.h> 121 #include <sys/termios.h> 122 #include <sys/bus.h> 123 124 #include <machine/db_machdep.h> 125 #ifdef KGDB 126 #include <sys/kgdb.h> 127 #endif 128 129 #include <machine/bootconfig.h> 130 131 #include <arm/arm32/machdep.h> 132 133 #include <arm/imx/imx51reg.h> 134 #include <arm/imx/imx51var.h> 135 #include <arm/imx/imxgpioreg.h> 136 #include <arm/imx/imxwdogreg.h> 137 #include <arm/imx/imxuartreg.h> 138 #include <arm/imx/imxuartvar.h> 139 #include <arm/imx/imx51_iomuxreg.h> 140 141 #include <evbarm/netwalker/netwalker_reg.h> 142 #include <evbarm/netwalker/netwalker.h> 143 144 #include "ukbd.h" 145 #if (NUKBD > 0) 146 #include <dev/usb/ukbdvar.h> 147 #endif 148 149 /* Kernel text starts 1MB in from the bottom of the kernel address space. */ 150 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00100000) 151 152 BootConfig bootconfig; /* Boot config storage */ 153 static char bootargs[MAX_BOOT_STRING]; 154 char *boot_args = NULL; 155 156 extern char KERNEL_BASE_phys[]; 157 158 extern int cpu_do_powersave; 159 160 /* 161 * Macros to translate between physical and virtual for a subset of the 162 * kernel address space. *Not* for general use. 163 */ 164 #define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys) 165 166 167 /* Prototypes */ 168 169 void consinit(void); 170 171 #ifdef KGDB 172 void kgdb_port_init(void); 173 #endif 174 175 static void init_clocks(void); 176 static void setup_ioports(void); 177 178 #ifndef CONSPEED 179 #define CONSPEED B115200 /* What RedBoot uses */ 180 #endif 181 #ifndef CONMODE 182 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 183 #endif 184 185 int comcnspeed = CONSPEED; 186 int comcnmode = CONMODE; 187 188 /* 189 * Static device mappings. These peripheral registers are mapped at 190 * fixed virtual addresses very early in netwalker_start() so that we 191 * can use them while booting the kernel, and stay at the same address 192 * throughout whole kernel's life time. 193 * 194 * We use this table twice; once with bootstrap page table, and once 195 * with kernel's page table which we build up in initarm(). 196 */ 197 198 #define _A(a) ((a) & ~L1_S_OFFSET) 199 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 200 201 static const struct pmap_devmap netwalker_devmap[] = { 202 { 203 /* for UART1, IOMUXC */ 204 .pd_va = _A(NETWALKER_IO_VBASE0), 205 .pd_pa = _A(NETWALKER_IO_PBASE0), 206 .pd_size = _S(L1_S_SIZE * 4), 207 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, 208 .pd_cache = PTE_NOCACHE 209 }, 210 {0} 211 }; 212 213 #undef _A 214 #undef _S 215 216 #ifndef MEMSTART 217 #define MEMSTART 0x90000000 218 #endif 219 #ifndef MEMSIZE 220 #define MEMSIZE 512 221 #endif 222 223 /* 224 * u_int initarm(...) 225 * 226 * Initial entry point on startup. This gets called before main() is 227 * entered. 228 * It should be responsible for setting up everything that must be 229 * in place when main is called. 230 * This includes 231 * Taking a copy of the boot configuration structure. 232 * Initialising the physical console so characters can be printed. 233 * Setting up page tables for the kernel 234 * Relocating the kernel to the bottom of physical memory 235 */ 236 u_int 237 initarm(void *arg) 238 { 239 /* 240 * Heads up ... Setup the CPU / MMU / TLB functions 241 */ 242 if (set_cpufuncs()) 243 panic("cpu not recognized!"); 244 245 /* map some peripheral registers */ 246 pmap_devmap_bootstrap((vaddr_t)armreg_ttbr_read() & -L1_TABLE_SIZE, 247 netwalker_devmap); 248 249 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 250 251 /* Register devmap for devices we mapped in start */ 252 pmap_devmap_register(netwalker_devmap); 253 setup_ioports(); 254 255 consinit(); 256 257 #ifdef NO_POWERSAVE 258 cpu_do_powersave=0; 259 #endif 260 261 init_clocks(); 262 263 #ifdef KGDB 264 kgdb_port_init(); 265 #endif 266 267 /* Talk to the user */ 268 printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n"); 269 270 #ifdef BOOT_ARGS 271 char mi_bootargs[] = BOOT_ARGS; 272 parse_mi_bootargs(mi_bootargs); 273 #endif 274 bootargs[0] = '\0'; 275 276 #if defined(VERBOSE_INIT_ARM) || 1 277 printf("initarm: Configuring system"); 278 printf(", CLIDR=%010o CTR=%#x", 279 armreg_clidr_read(), armreg_ctr_read()); 280 printf("\n"); 281 #endif 282 /* 283 * Ok we have the following memory map 284 * 285 * Physical Address Range Description 286 * ----------------------- ---------------------------------- 287 * 288 * 0x90000000 - 0xAFFFFFFF DDR SDRAM (512MByte) 289 * 290 * The initarm() has the responsibility for creating the kernel 291 * page tables. 292 * It must also set up various memory pointers that are used 293 * by pmap etc. 294 */ 295 296 #ifdef VERBOSE_INIT_ARM 297 printf("initarm: Configuring system ...\n"); 298 #endif 299 /* Fake bootconfig structure for the benefit of pmap.c */ 300 /* XXX must make the memory description h/w independent */ 301 bootconfig.dramblocks = 1; 302 bootconfig.dram[0].address = MEMSTART; 303 bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024) / PAGE_SIZE; 304 305 psize_t ram_size = bootconfig.dram[0].pages * PAGE_SIZE; 306 307 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 308 if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) { 309 printf("%s: dropping RAM size from %luMB to %uMB\n", 310 __func__, (unsigned long) (ram_size >> 20), 311 (KERNEL_VM_BASE - KERNEL_BASE) >> 20); 312 ram_size = KERNEL_VM_BASE - KERNEL_BASE; 313 } 314 #endif 315 316 arm32_bootmem_init(bootconfig.dram[0].address, ram_size, 317 KERNEL_BASE_PHYS); 318 319 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 320 const bool mapallmem_p = true; 321 KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE); 322 #else 323 const bool mapallmem_p = false; 324 #endif 325 326 arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, 327 netwalker_devmap, mapallmem_p); 328 329 /* disable power down counter in watch dog, 330 This must be done within 16 seconds of start-up. */ 331 ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0); 332 333 #ifdef BOOTHOWTO 334 boothowto |= BOOTHOWTO; 335 #endif 336 337 #ifdef VERBOSE_INIT_ARM 338 printf("initarm done.\n"); 339 #endif 340 return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0); 341 } 342 343 344 static void 345 init_clocks(void) 346 { 347 cortex_pmc_ccnt_init(); 348 } 349 350 struct iomux_setup { 351 /* iomux registers are 32-bit wide, but upper 16 bits are not 352 * used. */ 353 uint16_t reg; 354 uint16_t val; 355 }; 356 357 #define IOMUX_M(padname, mux) \ 358 IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux) 359 360 #define IOMUX_P(padname, pad) \ 361 IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad) 362 363 #define IOMUX_MP(padname, mux, pad) \ 364 IOMUX_M(padname, mux), \ 365 IOMUX_P(padname, pad) 366 367 368 #define IOMUX_DATA(offset, value) \ 369 { \ 370 .reg = (offset), \ 371 .val = (value), \ 372 } 373 374 375 /* 376 * set same values to IOMUX registers as linux kernel does 377 */ 378 const struct iomux_setup iomux_setup_data[] = { 379 #define HYS PAD_CTL_HYS 380 #define ODE PAD_CTL_ODE 381 #define DSEHIGH PAD_CTL_DSE_HIGH 382 #define DSEMID PAD_CTL_DSE_MID 383 #define DSELOW PAD_CTL_DSE_LOW 384 #define DSEMAX PAD_CTL_DSE_MAX 385 #define SRE PAD_CTL_SRE 386 #define KEEPER PAD_CTL_KEEPER 387 #define PULL PAD_CTL_PULL 388 #define PU_22K PAD_CTL_PUS_22K_PU 389 #define PU_47K PAD_CTL_PUS_47K_PU 390 #define PU_100K PAD_CTL_PUS_100K_PU 391 #define PD_100K PAD_CTL_PUS_100K_PD 392 #define HVE PAD_CTL_HVE /* Low output voltage */ 393 394 #define ALT0 IOMUX_CONFIG_ALT0 395 #define ALT1 IOMUX_CONFIG_ALT1 396 #define ALT2 IOMUX_CONFIG_ALT2 397 #define ALT3 IOMUX_CONFIG_ALT3 398 #define ALT4 IOMUX_CONFIG_ALT4 399 #define ALT5 IOMUX_CONFIG_ALT5 400 #define ALT6 IOMUX_CONFIG_ALT6 401 #define ALT7 IOMUX_CONFIG_ALT7 402 #define SION IOMUX_CONFIG_SION 403 404 /* left button */ 405 IOMUX_MP(EIM_EB2, ALT1, HYS), 406 /* right button */ 407 IOMUX_MP(EIM_EB3, ALT1, HYS), 408 409 /* UART1 */ 410 IOMUX_MP(UART1_RXD, ALT0, HYS | PULL | DSEHIGH | SRE), 411 IOMUX_MP(UART1_TXD, ALT0, HYS | PULL | DSEHIGH | SRE), 412 IOMUX_MP(UART1_RTS, ALT0, HYS | PULL | DSEHIGH), 413 IOMUX_MP(UART1_CTS, ALT0, HYS | PULL | DSEHIGH), 414 415 /* LCD Display */ 416 IOMUX_M(DI1_PIN2, ALT0), 417 IOMUX_M(DI1_PIN3, ALT0), 418 419 IOMUX_DATA(IOMUXC_SW_PAD_CTL_GRP_DISP1_PKE0, PAD_CTL_PKE), 420 #if 0 421 IOMUX_MP(DISP1_DAT0, ALT0, SRE | DSEMAX | PULL), 422 IOMUX_MP(DISP1_DAT1, ALT0, SRE | DSEMAX | PULL), 423 IOMUX_MP(DISP1_DAT2, ALT0, SRE | DSEMAX | PULL), 424 IOMUX_MP(DISP1_DAT3, ALT0, SRE | DSEMAX | PULL), 425 IOMUX_MP(DISP1_DAT4, ALT0, SRE | DSEMAX | PULL), 426 IOMUX_MP(DISP1_DAT5, ALT0, SRE | DSEMAX | PULL), 427 #endif 428 IOMUX_M(DISP1_DAT6, ALT0), 429 IOMUX_M(DISP1_DAT7, ALT0), 430 IOMUX_M(DISP1_DAT8, ALT0), 431 IOMUX_M(DISP1_DAT9, ALT0), 432 IOMUX_M(DISP1_DAT10, ALT0), 433 IOMUX_M(DISP1_DAT11, ALT0), 434 IOMUX_M(DISP1_DAT12, ALT0), 435 IOMUX_M(DISP1_DAT13, ALT0), 436 IOMUX_M(DISP1_DAT14, ALT0), 437 IOMUX_M(DISP1_DAT15, ALT0), 438 IOMUX_M(DISP1_DAT16, ALT0), 439 IOMUX_M(DISP1_DAT17, ALT0), 440 IOMUX_M(DISP1_DAT18, ALT0), 441 IOMUX_M(DISP1_DAT19, ALT0), 442 IOMUX_M(DISP1_DAT20, ALT0), 443 IOMUX_M(DISP1_DAT21, ALT0), 444 IOMUX_M(DISP1_DAT22, ALT0), 445 IOMUX_M(DISP1_DAT23, ALT0), 446 447 IOMUX_MP(DI1_D0_CS, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_3 */ 448 IOMUX_DATA(IOMUXC_GPIO3_IPP_IND_G_IN_3_SELECT_INPUT, INPUT_DAISY_0), 449 IOMUX_MP(CSI2_D12, ALT3, KEEPER | DSEHIGH | SRE), /* GPIO4_9 */ 450 IOMUX_MP(CSI2_D13, ALT3, KEEPER | DSEHIGH | SRE), 451 IOMUX_MP(GPIO1_2, ALT0, ODE | DSEHIGH), 452 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), 453 /* XXX VGA pins */ 454 IOMUX_M(DI_GP4, ALT4), 455 IOMUX_M(GPIO1_8, SION | ALT0), 456 457 458 #if 0 459 IOMUX_MP(GPIO1_2, ALT1, DSEHIGH | ODE), /* LCD backlight by PWM */ 460 #else 461 IOMUX_P(GPIO1_2, DSEHIGH | ODE), /* LCD backlight by GPIO */ 462 #endif 463 IOMUX_MP(GPIO1_8, SION | ALT0, HYS | DSEMID | PU_100K), 464 /* I2C1 */ 465 IOMUX_MP(EIM_D16, SION | ALT4, HYS | ODE | DSEHIGH | SRE), 466 IOMUX_MP(EIM_D19, SION | ALT4, SRE), /* SCL */ 467 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), /* GPIO2_13 */ 468 469 #if 0 470 IOMUX_MP(EIM_A23, ALT1, 0), 471 #else 472 IOMUX_M(EIM_A23, ALT1), /* GPIO2_17 */ 473 #endif 474 475 /* BT */ 476 IOMUX_M(EIM_D20, ALT1), /* GPIO2_4 BT host wakeup */ 477 IOMUX_M(EIM_D22, ALT1), /* GPIO2_6 BT RESET */ 478 IOMUX_M(EIM_D23, ALT1), /* GPIO2_7 BT wakeup */ 479 480 /* UART3 */ 481 IOMUX_MP(EIM_D24, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), 482 IOMUX_MP(EIM_D25, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* CTS */ 483 IOMUX_MP(EIM_D26, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* TXD */ 484 IOMUX_MP(EIM_D27, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* RTS */ 485 IOMUX_M(NANDF_D15, ALT3), /* GPIO3_25 */ 486 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K ), /* GPIO3_26 */ 487 488 /* OJ6SH-T25 */ 489 IOMUX_M(CSI1_D9, ALT3), /* GPIO3_13 */ 490 IOMUX_M(CSI1_VSYNC, ALT3), /* GPIO3_14 */ 491 IOMUX_M(CSI1_HSYNC, ALT3), /* GPIO3_15 */ 492 493 /* audio pins */ 494 IOMUX_MP(AUD3_BB_TXD, ALT0, DSEHIGH | PU_100K | SRE), 495 /* XXX: linux code: 496 (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | 497 PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | 498 PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), */ 499 500 IOMUX_MP(AUD3_BB_RXD, ALT0, KEEPER | DSEHIGH | SRE), 501 IOMUX_MP(AUD3_BB_CK, ALT0, KEEPER | DSEHIGH | SRE), 502 IOMUX_MP(AUD3_BB_FS, ALT0, KEEPER | DSEHIGH | SRE), 503 504 /* headphone detect */ 505 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K), 506 IOMUX_MP(CSPI1_RDY, ALT3, SRE | DSEHIGH), 507 /* XXX more audio pins ? */ 508 509 /* CSPI */ 510 IOMUX_MP(CSPI1_MOSI, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 511 IOMUX_MP(CSPI1_MISO, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 512 IOMUX_MP(CSPI1_SCLK, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 513 514 /* SPI CS */ 515 IOMUX_MP(CSPI1_SS0, ALT3, HYS | KEEPER | DSEHIGH | SRE), /* GPIO4[24] */ 516 IOMUX_MP(CSPI1_SS1, ALT3, HYS | KEEPER | DSEHIGH | SRE), /* GPIO4[25] */ 517 IOMUX_MP(DI1_PIN11, ALT4, HYS | PULL | DSEHIGH | SRE), /* GPIO3[0] */ 518 519 /* 26M Osc */ 520 IOMUX_MP(DI1_PIN12, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_1 */ 521 522 /* I2C */ 523 IOMUX_MP(KEY_COL4, SION | ALT3, SRE), 524 IOMUX_DATA(IOMUXC_I2C2_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_1), 525 IOMUX_MP(KEY_COL5, SION | ALT3, HYS | ODE | DSEHIGH | SRE), 526 IOMUX_DATA(IOMUXC_I2C2_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_1), 527 IOMUX_DATA(IOMUXC_UART3_IPP_UART_RTS_B_SELECT_INPUT, INPUT_DAISY_3), 528 529 /* NAND */ 530 IOMUX_MP(NANDF_WE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 531 IOMUX_MP(NANDF_RE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 532 IOMUX_MP(NANDF_ALE, ALT0, HVE | DSEHIGH | KEEPER), 533 IOMUX_MP(NANDF_CLE, ALT0, HVE | DSEHIGH | KEEPER), 534 IOMUX_MP(NANDF_WP_B, ALT0, HVE | DSEHIGH | PULL | PU_100K), 535 IOMUX_MP(NANDF_RB0, ALT0, HVE | DSELOW | PULL | PU_100K), 536 IOMUX_MP(NANDF_RB1, ALT0, HVE | DSELOW | PULL | PU_100K), 537 IOMUX_MP(NANDF_D7, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 538 IOMUX_MP(NANDF_D6, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 539 IOMUX_MP(NANDF_D5, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 540 IOMUX_MP(NANDF_D4, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 541 IOMUX_MP(NANDF_D3, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 542 IOMUX_MP(NANDF_D2, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 543 IOMUX_MP(NANDF_D1, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 544 IOMUX_MP(NANDF_D0, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 545 546 /* Batttery pins */ 547 IOMUX_MP(NANDF_D13, ALT3, HYS | DSEHIGH), 548 IOMUX_MP(NANDF_D12, ALT3, HYS | DSEHIGH), 549 #if 0 550 IOMUX_MP(NANDF_D11, ALT3, HYS | DSEHIGH), 551 #endif 552 IOMUX_MP(NANDF_D10, ALT3, HYS | DSEHIGH), 553 554 /* SD1 */ 555 IOMUX_MP(SD1_CMD, SION | ALT0, DSEHIGH | SRE), 556 IOMUX_MP(SD1_CLK, SION | ALT0, KEEPER | PU_47K | DSEHIGH), 557 IOMUX_MP(SD1_DATA0, ALT0, DSEHIGH | SRE), 558 IOMUX_MP(SD1_DATA1, ALT0, DSEHIGH | SRE), 559 IOMUX_MP(SD1_DATA2, ALT0, DSEHIGH | SRE), 560 IOMUX_MP(SD1_DATA3, ALT0, DSEHIGH | SRE), 561 IOMUX_MP(GPIO1_0, SION | ALT0, HYS | PU_100K), 562 563 /* SD2 */ 564 IOMUX_P(SD2_CMD, HVE | PU_22K | DSEMAX | SRE), 565 IOMUX_P(SD2_CLK, HVE | PU_22K | DSEMAX | SRE), 566 IOMUX_P(SD2_DATA0, HVE | PU_22K | DSEMAX | SRE), 567 IOMUX_P(SD2_DATA1, HVE | PU_22K | DSEMAX | SRE), 568 IOMUX_P(SD2_DATA2, HVE | PU_22K | DSEMAX | SRE), 569 IOMUX_P(SD2_DATA3, HVE | PU_22K | DSEMAX | SRE), 570 571 /* USB */ 572 IOMUX_MP(USBH1_CLK, ALT0, HYS | KEEPER | DSEHIGH | SRE), 573 IOMUX_MP(USBH1_DIR, ALT0, HYS | KEEPER | DSEHIGH | SRE), 574 IOMUX_MP(USBH1_STP, ALT0, HYS | KEEPER | DSEHIGH | SRE), 575 IOMUX_MP(USBH1_NXT, ALT0, HYS | KEEPER | PU_100K | DSEHIGH | SRE), 576 IOMUX_MP(USBH1_DATA0, ALT0, HYS | KEEPER | DSEHIGH | SRE), 577 IOMUX_MP(USBH1_DATA1, ALT0, HYS | KEEPER | DSEHIGH | SRE), 578 IOMUX_MP(USBH1_DATA2, ALT0, HYS | KEEPER | DSEHIGH | SRE), 579 IOMUX_MP(USBH1_DATA3, ALT0, HYS | KEEPER | DSEHIGH | SRE), 580 IOMUX_MP(USBH1_DATA4, ALT0, HYS | KEEPER | DSEHIGH | SRE), 581 IOMUX_MP(USBH1_DATA5, ALT0, HYS | KEEPER | DSEHIGH | SRE), 582 IOMUX_MP(USBH1_DATA6, ALT0, HYS | KEEPER | DSEHIGH | SRE), 583 IOMUX_MP(USBH1_DATA7, ALT0, HYS | KEEPER | DSEHIGH | SRE), 584 IOMUX_MP(EIM_D17, ALT1, KEEPER | DSEHIGH | SRE), 585 IOMUX_MP(EIM_D21, ALT1, KEEPER | DSEHIGH | SRE), 586 IOMUX_P(GPIO1_7, /*ALT0,*/ DSEHIGH | SRE), /* USB Hub reset */ 587 588 #undef ODE 589 #undef HYS 590 #undef SRE 591 #undef PULL 592 #undef KEEPER 593 #undef PU_22K 594 #undef PU_47K 595 #undef PU_100K 596 #undef PD_100K 597 #undef HVE 598 #undef DSEMAX 599 #undef DSEHIGH 600 #undef DSEMID 601 #undef DSELOW 602 603 #undef ALT0 604 #undef ALT1 605 #undef ALT2 606 #undef ALT3 607 #undef ALT4 608 #undef ALT5 609 #undef ALT6 610 #undef ALT7 611 #undef SION 612 }; 613 614 static void 615 setup_ioports(void) 616 { 617 int i; 618 const struct iomux_setup *p; 619 620 /* Initialize all IOMUX registers */ 621 for (i=0; i < __arraycount(iomux_setup_data); ++i) { 622 p = iomux_setup_data + i; 623 624 ioreg_write(NETWALKER_IOMUXC_VBASE + p->reg, 625 p->val); 626 } 627 } 628 629 630 #ifdef CONSDEVNAME 631 const char consdevname[] = CONSDEVNAME; 632 633 #ifndef CONMODE 634 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 635 #endif 636 #ifndef CONSPEED 637 #define CONSPEED 115200 638 #endif 639 640 int consmode = CONMODE; 641 int consrate = CONSPEED; 642 643 #endif /* CONSDEVNAME */ 644 645 #ifndef IMXUART_FREQ 646 #define IMXUART_FREQ 66500000 647 #endif 648 649 void 650 consinit(void) 651 { 652 static int consinit_called = 0; 653 654 if (consinit_called) 655 return; 656 657 consinit_called = 1; 658 659 #ifdef CONSDEVNAME 660 661 #if NIMXUART > 0 662 imxuart_set_frequency(IMXUART_FREQ, 2); 663 #endif 664 665 #if (NIMXUART > 0) && defined(IMXUARTCONSOLE) 666 if (strcmp(consdevname, "imxuart") == 0) { 667 paddr_t consaddr; 668 #ifdef CONADDR 669 consaddr = CONADDR; 670 #else 671 consaddr = IMX51_UART1_BASE; 672 #endif 673 imxuart_cons_attach(&imx_bs_tag, consaddr, consrate, consmode); 674 return; 675 } 676 #endif 677 678 #endif 679 680 #if (NWSDISPLAY > 0) && defined(IMXIPUCONSOLE) 681 #if NUKBD > 0 682 ukbd_cnattach(); 683 #endif 684 { 685 extern void netwalker_cnattach(void); 686 netwalker_cnattach(); 687 } 688 #endif 689 } 690 691 #ifdef KGDB 692 #ifndef KGDB_DEVNAME 693 #define KGDB_DEVNAME "imxuart" 694 #endif 695 #ifndef KGDB_DEVMODE 696 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 697 #endif 698 699 const char kgdb_devname[20] = KGDB_DEVNAME; 700 int kgdb_mode = KGDB_DEVMODE; 701 int kgdb_addr = KGDB_DEVADDR; 702 extern int kgdb_rate; /* defined in kgdb_stub.c */ 703 704 void 705 kgdb_port_init(void) 706 { 707 #if (NIMXUART > 0) 708 if (strcmp(kgdb_devname, "imxuart") == 0) { 709 imxuart_kgdb_attach(&imx_bs_tag, kgdb_addr, 710 kgdb_rate, kgdb_mode); 711 return; 712 } 713 714 #endif 715 } 716 #endif 717 718 719