1*d9d62d0fSandvar /* $NetBSD: netwalker_machdep.c,v 1.28 2024/06/02 12:11:36 andvar Exp $ */
25e60bdb1Sbsh
35e60bdb1Sbsh /*
45e60bdb1Sbsh * Copyright (c) 2002, 2003, 2005, 2010 Genetec Corporation.
55e60bdb1Sbsh * All rights reserved.
65e60bdb1Sbsh * Written by Hiroyuki Bessho for Genetec Corporation.
75e60bdb1Sbsh *
85e60bdb1Sbsh * Redistribution and use in source and binary forms, with or without
95e60bdb1Sbsh * modification, are permitted provided that the following conditions
105e60bdb1Sbsh * are met:
115e60bdb1Sbsh * 1. Redistributions of source code must retain the above copyright
125e60bdb1Sbsh * notice, this list of conditions and the following disclaimer.
135e60bdb1Sbsh * 2. Redistributions in binary form must reproduce the above copyright
145e60bdb1Sbsh * notice, this list of conditions and the following disclaimer in the
155e60bdb1Sbsh * documentation and/or other materials provided with the distribution.
165e60bdb1Sbsh *
175e60bdb1Sbsh * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
185e60bdb1Sbsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
195e60bdb1Sbsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
205e60bdb1Sbsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
215e60bdb1Sbsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
225e60bdb1Sbsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
235e60bdb1Sbsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
245e60bdb1Sbsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
255e60bdb1Sbsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
265e60bdb1Sbsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
275e60bdb1Sbsh * POSSIBILITY OF SUCH DAMAGE.
285e60bdb1Sbsh *
294cbd24b2Swiz * Machine dependent functions for kernel setup for Sharp Netwalker.
305e60bdb1Sbsh * Based on iq80310_machhdep.c
315e60bdb1Sbsh */
325e60bdb1Sbsh /*
335e60bdb1Sbsh * Copyright (c) 2001 Wasabi Systems, Inc.
345e60bdb1Sbsh * All rights reserved.
355e60bdb1Sbsh *
365e60bdb1Sbsh * Written by Jason R. Thorpe for Wasabi Systems, Inc.
375e60bdb1Sbsh *
385e60bdb1Sbsh * Redistribution and use in source and binary forms, with or without
395e60bdb1Sbsh * modification, are permitted provided that the following conditions
405e60bdb1Sbsh * are met:
415e60bdb1Sbsh * 1. Redistributions of source code must retain the above copyright
425e60bdb1Sbsh * notice, this list of conditions and the following disclaimer.
435e60bdb1Sbsh * 2. Redistributions in binary form must reproduce the above copyright
445e60bdb1Sbsh * notice, this list of conditions and the following disclaimer in the
455e60bdb1Sbsh * documentation and/or other materials provided with the distribution.
465e60bdb1Sbsh * 3. All advertising materials mentioning features or use of this software
475e60bdb1Sbsh * must display the following acknowledgement:
485e60bdb1Sbsh * This product includes software developed for the NetBSD Project by
495e60bdb1Sbsh * Wasabi Systems, Inc.
505e60bdb1Sbsh * 4. The name of Wasabi Systems, Inc. may not be used to endorse
515e60bdb1Sbsh * or promote products derived from this software without specific prior
525e60bdb1Sbsh * written permission.
535e60bdb1Sbsh *
545e60bdb1Sbsh * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
555e60bdb1Sbsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
565e60bdb1Sbsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
575e60bdb1Sbsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
585e60bdb1Sbsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
595e60bdb1Sbsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
605e60bdb1Sbsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
615e60bdb1Sbsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
625e60bdb1Sbsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
635e60bdb1Sbsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
645e60bdb1Sbsh * POSSIBILITY OF SUCH DAMAGE.
655e60bdb1Sbsh */
665e60bdb1Sbsh
675e60bdb1Sbsh /*
685e60bdb1Sbsh * Copyright (c) 1997,1998 Mark Brinicombe.
695e60bdb1Sbsh * Copyright (c) 1997,1998 Causality Limited.
705e60bdb1Sbsh * All rights reserved.
715e60bdb1Sbsh *
725e60bdb1Sbsh * Redistribution and use in source and binary forms, with or without
735e60bdb1Sbsh * modification, are permitted provided that the following conditions
745e60bdb1Sbsh * are met:
755e60bdb1Sbsh * 1. Redistributions of source code must retain the above copyright
765e60bdb1Sbsh * notice, this list of conditions and the following disclaimer.
775e60bdb1Sbsh * 2. Redistributions in binary form must reproduce the above copyright
785e60bdb1Sbsh * notice, this list of conditions and the following disclaimer in the
795e60bdb1Sbsh * documentation and/or other materials provided with the distribution.
805e60bdb1Sbsh * 3. All advertising materials mentioning features or use of this software
815e60bdb1Sbsh * must display the following acknowledgement:
825e60bdb1Sbsh * This product includes software developed by Mark Brinicombe
835e60bdb1Sbsh * for the NetBSD Project.
845e60bdb1Sbsh * 4. The name of the company nor the name of the author may be used to
855e60bdb1Sbsh * endorse or promote products derived from this software without specific
865e60bdb1Sbsh * prior written permission.
875e60bdb1Sbsh *
885e60bdb1Sbsh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
895e60bdb1Sbsh * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
905e60bdb1Sbsh * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
915e60bdb1Sbsh * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
925e60bdb1Sbsh * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
935e60bdb1Sbsh * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
945e60bdb1Sbsh * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
955e60bdb1Sbsh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
965e60bdb1Sbsh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
975e60bdb1Sbsh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
985e60bdb1Sbsh * SUCH DAMAGE.
995e60bdb1Sbsh *
1004cbd24b2Swiz * Machine dependent functions for kernel setup for Intel IQ80310 evaluation
1015e60bdb1Sbsh * boards using RedBoot firmware.
1025e60bdb1Sbsh */
1035e60bdb1Sbsh
1045e60bdb1Sbsh #include <sys/cdefs.h>
105*d9d62d0fSandvar __KERNEL_RCSID(0, "$NetBSD: netwalker_machdep.c,v 1.28 2024/06/02 12:11:36 andvar Exp $");
1065e60bdb1Sbsh
107459f2ce0Shkenken #include "opt_evbarm_boardtype.h"
108fd3ddc75Shkenken #include "opt_arm_debug.h"
1095a821b2cSskrll #include "opt_console.h"
110459f2ce0Shkenken #include "opt_cputypes.h"
1115e60bdb1Sbsh #include "opt_ddb.h"
1125e60bdb1Sbsh #include "opt_kgdb.h"
1135e60bdb1Sbsh #include "opt_md.h"
1145e60bdb1Sbsh #include "opt_com.h"
1155e60bdb1Sbsh #include "imxuart.h"
1165e60bdb1Sbsh #include "opt_imxuart.h"
1175e60bdb1Sbsh #include "opt_imx.h"
1182ce1224cShkenken #include "opt_imx51_ipuv3.h"
119b9040788Shkenken #include "opt_machdep.h"
1205e60bdb1Sbsh
1215e60bdb1Sbsh #include <sys/param.h>
1225e60bdb1Sbsh #include <sys/device.h>
123fd3ddc75Shkenken #include <sys/reboot.h>
1245e60bdb1Sbsh #include <sys/termios.h>
125213e0bd3Smatt #include <sys/bus.h>
1265e60bdb1Sbsh
1277bb55e03Shkenken #include "genfb.h"
1287bb55e03Shkenken #include "netwalker_backlight.h"
1297bb55e03Shkenken #include "netwalker_backlightvar.h"
1307bb55e03Shkenken
1315e60bdb1Sbsh #include <machine/db_machdep.h>
1325e60bdb1Sbsh #ifdef KGDB
1335e60bdb1Sbsh #include <sys/kgdb.h>
1345e60bdb1Sbsh #endif
1355e60bdb1Sbsh
1365e60bdb1Sbsh #include <machine/bootconfig.h>
1377bb55e03Shkenken #include <machine/autoconf.h>
1385e60bdb1Sbsh
1395e60bdb1Sbsh #include <arm/arm32/machdep.h>
1405e60bdb1Sbsh
1415e60bdb1Sbsh #include <arm/imx/imx51reg.h>
1425e60bdb1Sbsh #include <arm/imx/imx51var.h>
1435e60bdb1Sbsh #include <arm/imx/imxgpioreg.h>
1445e60bdb1Sbsh #include <arm/imx/imxwdogreg.h>
1455e60bdb1Sbsh #include <arm/imx/imxuartreg.h>
1465e60bdb1Sbsh #include <arm/imx/imxuartvar.h>
1475e60bdb1Sbsh #include <arm/imx/imx51_iomuxreg.h>
14859f1bd2bShkenken
1495e60bdb1Sbsh #include <evbarm/netwalker/netwalker_reg.h>
15059f1bd2bShkenken #include <evbarm/netwalker/netwalker.h>
1515e60bdb1Sbsh
1522ce1224cShkenken #include "ukbd.h"
1532ce1224cShkenken #if (NUKBD > 0)
1542ce1224cShkenken #include <dev/usb/ukbdvar.h>
1552ce1224cShkenken #endif
1562ce1224cShkenken
1575e60bdb1Sbsh /* Kernel text starts 1MB in from the bottom of the kernel address space. */
1585e60bdb1Sbsh #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00100000)
1595e60bdb1Sbsh
1605e60bdb1Sbsh BootConfig bootconfig; /* Boot config storage */
1617bb55e03Shkenken static char bootargs[MAX_BOOT_STRING] = BOOT_ARGS;
1625e60bdb1Sbsh char *boot_args = NULL;
1635e60bdb1Sbsh
1645e60bdb1Sbsh extern char KERNEL_BASE_phys[];
1650e133e1dShkenken
166dc4cffccShkenken u_int uboot_args[4] __attribute__((__section__(".data")));
167dc4cffccShkenken
1685e60bdb1Sbsh extern int cpu_do_powersave;
1695e60bdb1Sbsh
1705e60bdb1Sbsh /*
1715e60bdb1Sbsh * Macros to translate between physical and virtual for a subset of the
1725e60bdb1Sbsh * kernel address space. *Not* for general use.
1735e60bdb1Sbsh */
17459f1bd2bShkenken #define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys)
1755e60bdb1Sbsh
1765e60bdb1Sbsh
1775e60bdb1Sbsh /* Prototypes */
1785e60bdb1Sbsh
1795e60bdb1Sbsh void consinit(void);
1805e60bdb1Sbsh
1815e60bdb1Sbsh #ifdef KGDB
1825e60bdb1Sbsh void kgdb_port_init(void);
1835e60bdb1Sbsh #endif
1845e60bdb1Sbsh
1855e60bdb1Sbsh static void init_clocks(void);
1865e60bdb1Sbsh static void setup_ioports(void);
1875e60bdb1Sbsh
1887bb55e03Shkenken static void netwalker_device_register(device_t, void *);
1897bb55e03Shkenken
1905e60bdb1Sbsh #ifndef CONSPEED
1915e60bdb1Sbsh #define CONSPEED B115200 /* What RedBoot uses */
1925e60bdb1Sbsh #endif
1935e60bdb1Sbsh #ifndef CONMODE
1945e60bdb1Sbsh #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
1955e60bdb1Sbsh #endif
1965e60bdb1Sbsh
1975e60bdb1Sbsh int comcnspeed = CONSPEED;
1985e60bdb1Sbsh int comcnmode = CONMODE;
1995e60bdb1Sbsh
2005e60bdb1Sbsh /*
2015e60bdb1Sbsh * Static device mappings. These peripheral registers are mapped at
2025e60bdb1Sbsh * fixed virtual addresses very early in netwalker_start() so that we
2035e60bdb1Sbsh * can use them while booting the kernel, and stay at the same address
2045e60bdb1Sbsh * throughout whole kernel's life time.
2055e60bdb1Sbsh *
2065e60bdb1Sbsh * We use this table twice; once with bootstrap page table, and once
2075e60bdb1Sbsh * with kernel's page table which we build up in initarm().
2085e60bdb1Sbsh */
2095e60bdb1Sbsh
2105e60bdb1Sbsh static const struct pmap_devmap netwalker_devmap[] = {
2116d5cf357Sskrll DEVMAP_ENTRY(
2125e60bdb1Sbsh /* for UART1, IOMUXC */
2136d5cf357Sskrll NETWALKER_IO_VBASE0,
2146d5cf357Sskrll NETWALKER_IO_PBASE0,
2156d5cf357Sskrll L1_S_SIZE * 4
2166d5cf357Sskrll ),
2176d5cf357Sskrll DEVMAP_ENTRY_END
2185e60bdb1Sbsh };
2195e60bdb1Sbsh
2205e60bdb1Sbsh #ifndef MEMSTART
2215e60bdb1Sbsh #define MEMSTART 0x90000000
2225e60bdb1Sbsh #endif
2235e60bdb1Sbsh #ifndef MEMSIZE
2245e60bdb1Sbsh #define MEMSIZE 512
2255e60bdb1Sbsh #endif
2265e60bdb1Sbsh
2275e60bdb1Sbsh /*
228bee3dfabSskrll * vaddr_t initarm(...)
2295e60bdb1Sbsh *
2305e60bdb1Sbsh * Initial entry point on startup. This gets called before main() is
2315e60bdb1Sbsh * entered.
2325e60bdb1Sbsh * It should be responsible for setting up everything that must be
2335e60bdb1Sbsh * in place when main is called.
2345e60bdb1Sbsh * This includes
2355e60bdb1Sbsh * Taking a copy of the boot configuration structure.
2365e60bdb1Sbsh * Initialising the physical console so characters can be printed.
2375e60bdb1Sbsh * Setting up page tables for the kernel
2385e60bdb1Sbsh * Relocating the kernel to the bottom of physical memory
2395e60bdb1Sbsh */
240bee3dfabSskrll vaddr_t
initarm(void * arg)2415e60bdb1Sbsh initarm(void *arg)
2425e60bdb1Sbsh {
2435e60bdb1Sbsh /*
2445e60bdb1Sbsh * Heads up ... Setup the CPU / MMU / TLB functions
2455e60bdb1Sbsh */
2465e60bdb1Sbsh if (set_cpufuncs())
2475e60bdb1Sbsh panic("cpu not recognized!");
2485e60bdb1Sbsh
2490e133e1dShkenken /* map some peripheral registers */
2500e133e1dShkenken pmap_devmap_bootstrap((vaddr_t)armreg_ttbr_read() & -L1_TABLE_SIZE,
2510e133e1dShkenken netwalker_devmap);
2520e133e1dShkenken
2530e133e1dShkenken cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
2540e133e1dShkenken
2550e133e1dShkenken setup_ioports();
2560e133e1dShkenken
2570e133e1dShkenken consinit();
2580e133e1dShkenken
2595e60bdb1Sbsh #ifdef NO_POWERSAVE
2605e60bdb1Sbsh cpu_do_powersave=0;
2615e60bdb1Sbsh #endif
2625e60bdb1Sbsh
2635e60bdb1Sbsh init_clocks();
2645e60bdb1Sbsh
2655e60bdb1Sbsh #ifdef KGDB
2665e60bdb1Sbsh kgdb_port_init();
2675e60bdb1Sbsh #endif
2685e60bdb1Sbsh
2695e60bdb1Sbsh /* Talk to the user */
2700e133e1dShkenken printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n");
2715e60bdb1Sbsh
27259f1bd2bShkenken #ifdef BOOT_ARGS
27359f1bd2bShkenken char mi_bootargs[] = BOOT_ARGS;
27459f1bd2bShkenken parse_mi_bootargs(mi_bootargs);
27559f1bd2bShkenken #endif
2760e133e1dShkenken
2770e133e1dShkenken #if defined(VERBOSE_INIT_ARM) || 1
2780e133e1dShkenken printf("initarm: Configuring system");
2790e133e1dShkenken printf(", CLIDR=%010o CTR=%#x",
2800e133e1dShkenken armreg_clidr_read(), armreg_ctr_read());
2810e133e1dShkenken printf("\n");
2820e133e1dShkenken #endif
2835e60bdb1Sbsh /*
2845e60bdb1Sbsh * Ok we have the following memory map
2855e60bdb1Sbsh *
2865e60bdb1Sbsh * Physical Address Range Description
2875e60bdb1Sbsh * ----------------------- ----------------------------------
2885e60bdb1Sbsh *
28959f1bd2bShkenken * 0x90000000 - 0xAFFFFFFF DDR SDRAM (512MByte)
2905e60bdb1Sbsh *
2915e60bdb1Sbsh * The initarm() has the responsibility for creating the kernel
2925e60bdb1Sbsh * page tables.
2935e60bdb1Sbsh * It must also set up various memory pointers that are used
2945e60bdb1Sbsh * by pmap etc.
2955e60bdb1Sbsh */
2965e60bdb1Sbsh
2975e60bdb1Sbsh #ifdef VERBOSE_INIT_ARM
2985e60bdb1Sbsh printf("initarm: Configuring system ...\n");
2995e60bdb1Sbsh #endif
3005e60bdb1Sbsh /* Fake bootconfig structure for the benefit of pmap.c */
3015e60bdb1Sbsh /* XXX must make the memory description h/w independent */
3025e60bdb1Sbsh bootconfig.dramblocks = 1;
3035e60bdb1Sbsh bootconfig.dram[0].address = MEMSTART;
3045e60bdb1Sbsh bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024) / PAGE_SIZE;
3055e60bdb1Sbsh
30659f1bd2bShkenken psize_t ram_size = bootconfig.dram[0].pages * PAGE_SIZE;
30759f1bd2bShkenken
30859f1bd2bShkenken #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
30959f1bd2bShkenken if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) {
31059f1bd2bShkenken printf("%s: dropping RAM size from %luMB to %uMB\n",
31159f1bd2bShkenken __func__, (unsigned long) (ram_size >> 20),
31259f1bd2bShkenken (KERNEL_VM_BASE - KERNEL_BASE) >> 20);
31359f1bd2bShkenken ram_size = KERNEL_VM_BASE - KERNEL_BASE;
31459f1bd2bShkenken }
31559f1bd2bShkenken #endif
31659f1bd2bShkenken
31759f1bd2bShkenken arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
31859f1bd2bShkenken KERNEL_BASE_PHYS);
31959f1bd2bShkenken
32059f1bd2bShkenken #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
32159f1bd2bShkenken const bool mapallmem_p = true;
32259f1bd2bShkenken KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE);
32359f1bd2bShkenken #else
32459f1bd2bShkenken const bool mapallmem_p = false;
32559f1bd2bShkenken #endif
3265e60bdb1Sbsh
3270e133e1dShkenken arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0,
32859f1bd2bShkenken netwalker_devmap, mapallmem_p);
3295e60bdb1Sbsh
3305e60bdb1Sbsh /* disable power down counter in watch dog,
3315e60bdb1Sbsh This must be done within 16 seconds of start-up. */
3325e60bdb1Sbsh ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0);
3335e60bdb1Sbsh
3340e133e1dShkenken #ifdef BOOTHOWTO
3350e133e1dShkenken boothowto |= BOOTHOWTO;
3365e60bdb1Sbsh #endif
3375e60bdb1Sbsh
3387bb55e03Shkenken boot_args = bootargs;
3397bb55e03Shkenken parse_mi_bootargs(boot_args);
3407bb55e03Shkenken printf("boot_args : %s\n", boot_args);
3417bb55e03Shkenken
3427bb55e03Shkenken /* we've a specific device_register routine */
3437bb55e03Shkenken evbarm_device_register = netwalker_device_register;
3447bb55e03Shkenken
3455e60bdb1Sbsh #ifdef VERBOSE_INIT_ARM
3465e60bdb1Sbsh printf("initarm done.\n");
3475e60bdb1Sbsh #endif
3480e133e1dShkenken return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
3490e133e1dShkenken }
3500e133e1dShkenken
3515e60bdb1Sbsh
3525e60bdb1Sbsh static void
init_clocks(void)3535e60bdb1Sbsh init_clocks(void)
3545e60bdb1Sbsh {
3552101b6c7Smatt cortex_pmc_ccnt_init();
3565e60bdb1Sbsh }
3575e60bdb1Sbsh
3585e60bdb1Sbsh struct iomux_setup {
359f9b6ec2bSbsh /* iomux registers are 32-bit wide, but upper 16 bits are not
360f9b6ec2bSbsh * used. */
361f9b6ec2bSbsh uint16_t reg;
362f9b6ec2bSbsh uint16_t val;
3635e60bdb1Sbsh };
3645e60bdb1Sbsh
365f9b6ec2bSbsh #define IOMUX_M(padname, mux) \
366f9b6ec2bSbsh IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux)
367f9b6ec2bSbsh
368f9b6ec2bSbsh #define IOMUX_P(padname, pad) \
369f9b6ec2bSbsh IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad)
370f9b6ec2bSbsh
371f9b6ec2bSbsh #define IOMUX_MP(padname, mux, pad) \
372f9b6ec2bSbsh IOMUX_M(padname, mux), \
373f9b6ec2bSbsh IOMUX_P(padname, pad)
3745e60bdb1Sbsh
3755e60bdb1Sbsh
376f9b6ec2bSbsh #define IOMUX_DATA(offset, value) \
3775e60bdb1Sbsh { \
378f9b6ec2bSbsh .reg = (offset), \
379f9b6ec2bSbsh .val = (value), \
3805e60bdb1Sbsh }
3815e60bdb1Sbsh
3825e60bdb1Sbsh
383f9b6ec2bSbsh /*
384f9b6ec2bSbsh * set same values to IOMUX registers as linux kernel does
385f9b6ec2bSbsh */
3865e60bdb1Sbsh const struct iomux_setup iomux_setup_data[] = {
387f9b6ec2bSbsh #define HYS PAD_CTL_HYS
388f9b6ec2bSbsh #define ODE PAD_CTL_ODE
389f9b6ec2bSbsh #define DSEHIGH PAD_CTL_DSE_HIGH
390f9b6ec2bSbsh #define DSEMID PAD_CTL_DSE_MID
391f9b6ec2bSbsh #define DSELOW PAD_CTL_DSE_LOW
392f9b6ec2bSbsh #define DSEMAX PAD_CTL_DSE_MAX
393f9b6ec2bSbsh #define SRE PAD_CTL_SRE
394f9b6ec2bSbsh #define KEEPER PAD_CTL_KEEPER
395f9b6ec2bSbsh #define PULL PAD_CTL_PULL
396f9b6ec2bSbsh #define PU_22K PAD_CTL_PUS_22K_PU
397f9b6ec2bSbsh #define PU_47K PAD_CTL_PUS_47K_PU
398f9b6ec2bSbsh #define PU_100K PAD_CTL_PUS_100K_PU
399f9b6ec2bSbsh #define PD_100K PAD_CTL_PUS_100K_PD
400f9b6ec2bSbsh #define HVE PAD_CTL_HVE /* Low output voltage */
4015e60bdb1Sbsh
402f9b6ec2bSbsh #define ALT0 IOMUX_CONFIG_ALT0
403f9b6ec2bSbsh #define ALT1 IOMUX_CONFIG_ALT1
404f9b6ec2bSbsh #define ALT2 IOMUX_CONFIG_ALT2
405f9b6ec2bSbsh #define ALT3 IOMUX_CONFIG_ALT3
406f9b6ec2bSbsh #define ALT4 IOMUX_CONFIG_ALT4
407f9b6ec2bSbsh #define ALT5 IOMUX_CONFIG_ALT5
408f9b6ec2bSbsh #define ALT6 IOMUX_CONFIG_ALT6
409f9b6ec2bSbsh #define ALT7 IOMUX_CONFIG_ALT7
410f9b6ec2bSbsh #define SION IOMUX_CONFIG_SION
411f9b6ec2bSbsh
412f9b6ec2bSbsh /* left button */
413f9b6ec2bSbsh IOMUX_MP(EIM_EB2, ALT1, HYS),
414f9b6ec2bSbsh /* right button */
415f9b6ec2bSbsh IOMUX_MP(EIM_EB3, ALT1, HYS),
4165e60bdb1Sbsh
4175e60bdb1Sbsh /* UART1 */
418f9b6ec2bSbsh IOMUX_MP(UART1_RXD, ALT0, HYS | PULL | DSEHIGH | SRE),
419f9b6ec2bSbsh IOMUX_MP(UART1_TXD, ALT0, HYS | PULL | DSEHIGH | SRE),
420f9b6ec2bSbsh IOMUX_MP(UART1_RTS, ALT0, HYS | PULL | DSEHIGH),
421f9b6ec2bSbsh IOMUX_MP(UART1_CTS, ALT0, HYS | PULL | DSEHIGH),
422f9b6ec2bSbsh
423f9b6ec2bSbsh /* LCD Display */
424f9b6ec2bSbsh IOMUX_M(DI1_PIN2, ALT0),
425f9b6ec2bSbsh IOMUX_M(DI1_PIN3, ALT0),
426f9b6ec2bSbsh
427f9b6ec2bSbsh IOMUX_DATA(IOMUXC_SW_PAD_CTL_GRP_DISP1_PKE0, PAD_CTL_PKE),
428f9b6ec2bSbsh #if 0
429f9b6ec2bSbsh IOMUX_MP(DISP1_DAT0, ALT0, SRE | DSEMAX | PULL),
430f9b6ec2bSbsh IOMUX_MP(DISP1_DAT1, ALT0, SRE | DSEMAX | PULL),
431f9b6ec2bSbsh IOMUX_MP(DISP1_DAT2, ALT0, SRE | DSEMAX | PULL),
432f9b6ec2bSbsh IOMUX_MP(DISP1_DAT3, ALT0, SRE | DSEMAX | PULL),
433f9b6ec2bSbsh IOMUX_MP(DISP1_DAT4, ALT0, SRE | DSEMAX | PULL),
434f9b6ec2bSbsh IOMUX_MP(DISP1_DAT5, ALT0, SRE | DSEMAX | PULL),
4355e60bdb1Sbsh #endif
436f9b6ec2bSbsh IOMUX_M(DISP1_DAT6, ALT0),
437f9b6ec2bSbsh IOMUX_M(DISP1_DAT7, ALT0),
438f9b6ec2bSbsh IOMUX_M(DISP1_DAT8, ALT0),
439f9b6ec2bSbsh IOMUX_M(DISP1_DAT9, ALT0),
440f9b6ec2bSbsh IOMUX_M(DISP1_DAT10, ALT0),
441f9b6ec2bSbsh IOMUX_M(DISP1_DAT11, ALT0),
442f9b6ec2bSbsh IOMUX_M(DISP1_DAT12, ALT0),
443f9b6ec2bSbsh IOMUX_M(DISP1_DAT13, ALT0),
444f9b6ec2bSbsh IOMUX_M(DISP1_DAT14, ALT0),
445f9b6ec2bSbsh IOMUX_M(DISP1_DAT15, ALT0),
446f9b6ec2bSbsh IOMUX_M(DISP1_DAT16, ALT0),
447f9b6ec2bSbsh IOMUX_M(DISP1_DAT17, ALT0),
448f9b6ec2bSbsh IOMUX_M(DISP1_DAT18, ALT0),
449f9b6ec2bSbsh IOMUX_M(DISP1_DAT19, ALT0),
450f9b6ec2bSbsh IOMUX_M(DISP1_DAT20, ALT0),
451f9b6ec2bSbsh IOMUX_M(DISP1_DAT21, ALT0),
452f9b6ec2bSbsh IOMUX_M(DISP1_DAT22, ALT0),
453f9b6ec2bSbsh IOMUX_M(DISP1_DAT23, ALT0),
454f9b6ec2bSbsh
455f9b6ec2bSbsh IOMUX_MP(DI1_D0_CS, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_3 */
456f9b6ec2bSbsh IOMUX_DATA(IOMUXC_GPIO3_IPP_IND_G_IN_3_SELECT_INPUT, INPUT_DAISY_0),
457f9b6ec2bSbsh IOMUX_MP(CSI2_D12, ALT3, KEEPER | DSEHIGH | SRE), /* GPIO4_9 */
458f9b6ec2bSbsh IOMUX_MP(CSI2_D13, ALT3, KEEPER | DSEHIGH | SRE),
459b9040788Shkenken IOMUX_MP(GPIO1_2, ALT1, DSEHIGH | ODE), /* LCD backlight by PWM */
460f9b6ec2bSbsh
461f9b6ec2bSbsh IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), /* GPIO2_13 */
462f9b6ec2bSbsh
46311af610cShkenken /* XXX VGA pins */
46411af610cShkenken IOMUX_M(DI_GP4, ALT4),
46511af610cShkenken IOMUX_MP(GPIO1_8, SION | ALT0, HYS | DSEMID | PU_100K),
46611af610cShkenken
46711af610cShkenken /* I2C1 */
46811af610cShkenken IOMUX_MP(EIM_D16, SION | ALT4, HYS | ODE | DSEHIGH | SRE), /* SDA */
46911af610cShkenken IOMUX_MP(EIM_D19, SION | ALT4, SRE), /* SCL */
47011af610cShkenken IOMUX_DATA(IOMUXC_I2C1_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_0),
47111af610cShkenken IOMUX_DATA(IOMUXC_I2C1_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_0),
47211af610cShkenken
473f9b6ec2bSbsh IOMUX_M(EIM_A23, ALT1), /* GPIO2_17 */
474f9b6ec2bSbsh
475f9b6ec2bSbsh /* BT */
476f9b6ec2bSbsh IOMUX_M(EIM_D20, ALT1), /* GPIO2_4 BT host wakeup */
477f9b6ec2bSbsh IOMUX_M(EIM_D22, ALT1), /* GPIO2_6 BT RESET */
478f9b6ec2bSbsh IOMUX_M(EIM_D23, ALT1), /* GPIO2_7 BT wakeup */
479f9b6ec2bSbsh
480f9b6ec2bSbsh /* UART3 */
481f9b6ec2bSbsh IOMUX_MP(EIM_D24, ALT3, KEEPER | PU_100K | DSEHIGH | SRE),
482f9b6ec2bSbsh IOMUX_MP(EIM_D25, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* CTS */
483f9b6ec2bSbsh IOMUX_MP(EIM_D26, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* TXD */
484f9b6ec2bSbsh IOMUX_MP(EIM_D27, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* RTS */
485f9b6ec2bSbsh IOMUX_M(NANDF_D15, ALT3), /* GPIO3_25 */
486f9b6ec2bSbsh IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K ), /* GPIO3_26 */
48711af610cShkenken IOMUX_DATA(IOMUXC_UART3_IPP_UART_RTS_B_SELECT_INPUT, INPUT_DAISY_3),
488459f2ce0Shkenken
489459f2ce0Shkenken /* OJ6SH-T25 */
490f9b6ec2bSbsh IOMUX_M(CSI1_D9, ALT3), /* GPIO3_13 */
491f9b6ec2bSbsh IOMUX_M(CSI1_VSYNC, ALT3), /* GPIO3_14 */
492f9b6ec2bSbsh IOMUX_M(CSI1_HSYNC, ALT3), /* GPIO3_15 */
493f9b6ec2bSbsh
494f9b6ec2bSbsh /* audio pins */
495f9b6ec2bSbsh IOMUX_MP(AUD3_BB_TXD, ALT0, DSEHIGH | PU_100K | SRE),
496f9b6ec2bSbsh /* XXX: linux code:
497f9b6ec2bSbsh (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
498f9b6ec2bSbsh PAD_CTL_100K_PU | PAD_CTL_HYS_NONE |
499f9b6ec2bSbsh PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), */
500f9b6ec2bSbsh
501f9b6ec2bSbsh IOMUX_MP(AUD3_BB_RXD, ALT0, KEEPER | DSEHIGH | SRE),
502f9b6ec2bSbsh IOMUX_MP(AUD3_BB_CK, ALT0, KEEPER | DSEHIGH | SRE),
503f9b6ec2bSbsh IOMUX_MP(AUD3_BB_FS, ALT0, KEEPER | DSEHIGH | SRE),
504f9b6ec2bSbsh
505f9b6ec2bSbsh /* headphone detect */
506f9b6ec2bSbsh IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K),
507f9b6ec2bSbsh IOMUX_MP(CSPI1_RDY, ALT3, SRE | DSEHIGH),
508f9b6ec2bSbsh /* XXX more audio pins ? */
509f9b6ec2bSbsh
510f9b6ec2bSbsh /* CSPI */
511459f2ce0Shkenken IOMUX_MP(CSPI1_MOSI, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE),
512459f2ce0Shkenken IOMUX_MP(CSPI1_MISO, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE),
513459f2ce0Shkenken IOMUX_MP(CSPI1_SCLK, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE),
514459f2ce0Shkenken
515459f2ce0Shkenken /* SPI CS */
516459f2ce0Shkenken IOMUX_MP(CSPI1_SS0, ALT3, HYS | KEEPER | DSEHIGH | SRE), /* GPIO4[24] */
517459f2ce0Shkenken IOMUX_MP(CSPI1_SS1, ALT3, HYS | KEEPER | DSEHIGH | SRE), /* GPIO4[25] */
518459f2ce0Shkenken IOMUX_MP(DI1_PIN11, ALT4, HYS | PULL | DSEHIGH | SRE), /* GPIO3[0] */
519459f2ce0Shkenken
520f9b6ec2bSbsh /* 26M Osc */
521f9b6ec2bSbsh IOMUX_MP(DI1_PIN12, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_1 */
522f9b6ec2bSbsh
52311af610cShkenken /* I2C2 */
52411af610cShkenken IOMUX_MP(KEY_COL5, SION | ALT3, HYS | ODE | DSEHIGH | SRE), /* SDA */
52511af610cShkenken IOMUX_MP(KEY_COL4, SION | ALT3, SRE), /* SCL */
526f9b6ec2bSbsh IOMUX_DATA(IOMUXC_I2C2_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_1),
527f9b6ec2bSbsh IOMUX_DATA(IOMUXC_I2C2_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_1),
528459f2ce0Shkenken
529f9b6ec2bSbsh /* NAND */
530f9b6ec2bSbsh IOMUX_MP(NANDF_WE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K),
531f9b6ec2bSbsh IOMUX_MP(NANDF_RE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K),
532f9b6ec2bSbsh IOMUX_MP(NANDF_ALE, ALT0, HVE | DSEHIGH | KEEPER),
533f9b6ec2bSbsh IOMUX_MP(NANDF_CLE, ALT0, HVE | DSEHIGH | KEEPER),
534f9b6ec2bSbsh IOMUX_MP(NANDF_WP_B, ALT0, HVE | DSEHIGH | PULL | PU_100K),
535f9b6ec2bSbsh IOMUX_MP(NANDF_RB0, ALT0, HVE | DSELOW | PULL | PU_100K),
536f9b6ec2bSbsh IOMUX_MP(NANDF_RB1, ALT0, HVE | DSELOW | PULL | PU_100K),
537f9b6ec2bSbsh IOMUX_MP(NANDF_D7, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
538f9b6ec2bSbsh IOMUX_MP(NANDF_D6, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
539f9b6ec2bSbsh IOMUX_MP(NANDF_D5, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
540f9b6ec2bSbsh IOMUX_MP(NANDF_D4, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
541f9b6ec2bSbsh IOMUX_MP(NANDF_D3, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
542f9b6ec2bSbsh IOMUX_MP(NANDF_D2, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
543f9b6ec2bSbsh IOMUX_MP(NANDF_D1, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
544f9b6ec2bSbsh IOMUX_MP(NANDF_D0, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
545f9b6ec2bSbsh
546*d9d62d0fSandvar /* Battery pins */
547f9b6ec2bSbsh IOMUX_MP(NANDF_D13, ALT3, HYS | DSEHIGH),
548f9b6ec2bSbsh IOMUX_MP(NANDF_D12, ALT3, HYS | DSEHIGH),
549f9b6ec2bSbsh #if 0
550f9b6ec2bSbsh IOMUX_MP(NANDF_D11, ALT3, HYS | DSEHIGH),
551f9b6ec2bSbsh #endif
552f9b6ec2bSbsh IOMUX_MP(NANDF_D10, ALT3, HYS | DSEHIGH),
553f9b6ec2bSbsh
554f9b6ec2bSbsh /* SD1 */
555f9b6ec2bSbsh IOMUX_MP(SD1_CMD, SION | ALT0, DSEHIGH | SRE),
556f9b6ec2bSbsh IOMUX_MP(SD1_CLK, SION | ALT0, KEEPER | PU_47K | DSEHIGH),
557f9b6ec2bSbsh IOMUX_MP(SD1_DATA0, ALT0, DSEHIGH | SRE),
558f9b6ec2bSbsh IOMUX_MP(SD1_DATA1, ALT0, DSEHIGH | SRE),
559f9b6ec2bSbsh IOMUX_MP(SD1_DATA2, ALT0, DSEHIGH | SRE),
560f9b6ec2bSbsh IOMUX_MP(SD1_DATA3, ALT0, DSEHIGH | SRE),
561f9b6ec2bSbsh IOMUX_MP(GPIO1_0, SION | ALT0, HYS | PU_100K),
562f9b6ec2bSbsh
563f9b6ec2bSbsh /* SD2 */
564f9b6ec2bSbsh IOMUX_P(SD2_CMD, HVE | PU_22K | DSEMAX | SRE),
565f9b6ec2bSbsh IOMUX_P(SD2_CLK, HVE | PU_22K | DSEMAX | SRE),
566f9b6ec2bSbsh IOMUX_P(SD2_DATA0, HVE | PU_22K | DSEMAX | SRE),
567f9b6ec2bSbsh IOMUX_P(SD2_DATA1, HVE | PU_22K | DSEMAX | SRE),
568f9b6ec2bSbsh IOMUX_P(SD2_DATA2, HVE | PU_22K | DSEMAX | SRE),
569f9b6ec2bSbsh IOMUX_P(SD2_DATA3, HVE | PU_22K | DSEMAX | SRE),
570f9b6ec2bSbsh
571f9b6ec2bSbsh /* USB */
572f9b6ec2bSbsh IOMUX_MP(USBH1_CLK, ALT0, HYS | KEEPER | DSEHIGH | SRE),
573f9b6ec2bSbsh IOMUX_MP(USBH1_DIR, ALT0, HYS | KEEPER | DSEHIGH | SRE),
574f9b6ec2bSbsh IOMUX_MP(USBH1_STP, ALT0, HYS | KEEPER | DSEHIGH | SRE),
575f9b6ec2bSbsh IOMUX_MP(USBH1_NXT, ALT0, HYS | KEEPER | PU_100K | DSEHIGH | SRE),
576f9b6ec2bSbsh IOMUX_MP(USBH1_DATA0, ALT0, HYS | KEEPER | DSEHIGH | SRE),
577f9b6ec2bSbsh IOMUX_MP(USBH1_DATA1, ALT0, HYS | KEEPER | DSEHIGH | SRE),
578f9b6ec2bSbsh IOMUX_MP(USBH1_DATA2, ALT0, HYS | KEEPER | DSEHIGH | SRE),
579f9b6ec2bSbsh IOMUX_MP(USBH1_DATA3, ALT0, HYS | KEEPER | DSEHIGH | SRE),
580f9b6ec2bSbsh IOMUX_MP(USBH1_DATA4, ALT0, HYS | KEEPER | DSEHIGH | SRE),
581f9b6ec2bSbsh IOMUX_MP(USBH1_DATA5, ALT0, HYS | KEEPER | DSEHIGH | SRE),
582f9b6ec2bSbsh IOMUX_MP(USBH1_DATA6, ALT0, HYS | KEEPER | DSEHIGH | SRE),
583f9b6ec2bSbsh IOMUX_MP(USBH1_DATA7, ALT0, HYS | KEEPER | DSEHIGH | SRE),
584f9b6ec2bSbsh IOMUX_MP(EIM_D17, ALT1, KEEPER | DSEHIGH | SRE),
585f9b6ec2bSbsh IOMUX_MP(EIM_D21, ALT1, KEEPER | DSEHIGH | SRE),
586f9b6ec2bSbsh IOMUX_P(GPIO1_7, /*ALT0,*/ DSEHIGH | SRE), /* USB Hub reset */
587f9b6ec2bSbsh
588f9b6ec2bSbsh #undef ODE
589f9b6ec2bSbsh #undef HYS
590f9b6ec2bSbsh #undef SRE
591f9b6ec2bSbsh #undef PULL
592f9b6ec2bSbsh #undef KEEPER
593f9b6ec2bSbsh #undef PU_22K
594f9b6ec2bSbsh #undef PU_47K
595f9b6ec2bSbsh #undef PU_100K
596f9b6ec2bSbsh #undef PD_100K
597f9b6ec2bSbsh #undef HVE
598f9b6ec2bSbsh #undef DSEMAX
599f9b6ec2bSbsh #undef DSEHIGH
600f9b6ec2bSbsh #undef DSEMID
601f9b6ec2bSbsh #undef DSELOW
602f9b6ec2bSbsh
603f9b6ec2bSbsh #undef ALT0
604f9b6ec2bSbsh #undef ALT1
605f9b6ec2bSbsh #undef ALT2
606f9b6ec2bSbsh #undef ALT3
607f9b6ec2bSbsh #undef ALT4
608f9b6ec2bSbsh #undef ALT5
609f9b6ec2bSbsh #undef ALT6
610f9b6ec2bSbsh #undef ALT7
611f9b6ec2bSbsh #undef SION
6125e60bdb1Sbsh };
6135e60bdb1Sbsh
6145e60bdb1Sbsh static void
setup_ioports(void)6155e60bdb1Sbsh setup_ioports(void)
6165e60bdb1Sbsh {
6175e60bdb1Sbsh int i;
6185e60bdb1Sbsh const struct iomux_setup *p;
6195e60bdb1Sbsh
620f9b6ec2bSbsh /* Initialize all IOMUX registers */
6215e60bdb1Sbsh for (i=0; i < __arraycount(iomux_setup_data); ++i) {
6225e60bdb1Sbsh p = iomux_setup_data + i;
6235e60bdb1Sbsh
624f9b6ec2bSbsh ioreg_write(NETWALKER_IOMUXC_VBASE + p->reg,
625f9b6ec2bSbsh p->val);
6265e60bdb1Sbsh }
6275e60bdb1Sbsh }
6285e60bdb1Sbsh
6295e60bdb1Sbsh
6305e60bdb1Sbsh #ifdef CONSDEVNAME
6315e60bdb1Sbsh const char consdevname[] = CONSDEVNAME;
6325e60bdb1Sbsh
6335e60bdb1Sbsh #ifndef CONMODE
6345e60bdb1Sbsh #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
6355e60bdb1Sbsh #endif
6365e60bdb1Sbsh #ifndef CONSPEED
6375e60bdb1Sbsh #define CONSPEED 115200
6385e60bdb1Sbsh #endif
6395e60bdb1Sbsh
6405e60bdb1Sbsh int consmode = CONMODE;
6415e60bdb1Sbsh int consrate = CONSPEED;
6425e60bdb1Sbsh
6435e60bdb1Sbsh #endif /* CONSDEVNAME */
6445e60bdb1Sbsh
6455e60bdb1Sbsh #ifndef IMXUART_FREQ
646f9b6ec2bSbsh #define IMXUART_FREQ 66500000
6475e60bdb1Sbsh #endif
6485e60bdb1Sbsh
6495e60bdb1Sbsh void
consinit(void)6505e60bdb1Sbsh consinit(void)
6515e60bdb1Sbsh {
6525e60bdb1Sbsh static int consinit_called = 0;
6535e60bdb1Sbsh
6545e60bdb1Sbsh if (consinit_called)
6555e60bdb1Sbsh return;
6565e60bdb1Sbsh
6575e60bdb1Sbsh consinit_called = 1;
6585e60bdb1Sbsh
6595e60bdb1Sbsh #ifdef CONSDEVNAME
6605e60bdb1Sbsh
6615e60bdb1Sbsh #if NIMXUART > 0
6625e60bdb1Sbsh imxuart_set_frequency(IMXUART_FREQ, 2);
6635e60bdb1Sbsh #endif
6645e60bdb1Sbsh
6655e60bdb1Sbsh #if (NIMXUART > 0) && defined(IMXUARTCONSOLE)
6665e60bdb1Sbsh if (strcmp(consdevname, "imxuart") == 0) {
6675e60bdb1Sbsh paddr_t consaddr;
6685e60bdb1Sbsh #ifdef CONADDR
6695e60bdb1Sbsh consaddr = CONADDR;
6705e60bdb1Sbsh #else
6715e60bdb1Sbsh consaddr = IMX51_UART1_BASE;
6725e60bdb1Sbsh #endif
6734f4d98d9Shkenken imxuart_cnattach(&armv7_generic_bs_tag, consaddr, consrate, consmode);
6745e60bdb1Sbsh return;
6755e60bdb1Sbsh }
6765e60bdb1Sbsh #endif
6775e60bdb1Sbsh #endif
6787bb55e03Shkenken }
6795e60bdb1Sbsh
6807bb55e03Shkenken static void
netwalker_device_register(device_t self,void * aux)6817bb55e03Shkenken netwalker_device_register(device_t self, void *aux)
6827bb55e03Shkenken {
6837bb55e03Shkenken prop_dictionary_t dict = device_properties(self);
6847bb55e03Shkenken
6857bb55e03Shkenken #if NGENFB > 0
6867bb55e03Shkenken if (device_is_a(self, "genfb")) {
6877bb55e03Shkenken char *ptr;
6887bb55e03Shkenken if (get_bootconf_option(boot_args, "console",
6897bb55e03Shkenken BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) {
6907bb55e03Shkenken prop_dictionary_set_bool(dict, "is_console", true);
6912ce1224cShkenken #if NUKBD > 0
6922ce1224cShkenken ukbd_cnattach();
6932ce1224cShkenken #endif
6947bb55e03Shkenken } else {
6957bb55e03Shkenken prop_dictionary_set_bool(dict, "is_console", false);
6967bb55e03Shkenken }
6977bb55e03Shkenken #if NNETWALKER_BACKLIGHT > 0
6987bb55e03Shkenken netwalker_backlight_genfb_parameter_set(dict);
6997bb55e03Shkenken #endif
7005e60bdb1Sbsh }
7015e60bdb1Sbsh #endif
7025e60bdb1Sbsh }
7035e60bdb1Sbsh
7045e60bdb1Sbsh #ifdef KGDB
7055e60bdb1Sbsh #ifndef KGDB_DEVNAME
7065e60bdb1Sbsh #define KGDB_DEVNAME "imxuart"
7075e60bdb1Sbsh #endif
7085e60bdb1Sbsh #ifndef KGDB_DEVMODE
7095e60bdb1Sbsh #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
7105e60bdb1Sbsh #endif
7115e60bdb1Sbsh
7125e60bdb1Sbsh const char kgdb_devname[20] = KGDB_DEVNAME;
7135e60bdb1Sbsh int kgdb_mode = KGDB_DEVMODE;
7145e60bdb1Sbsh int kgdb_addr = KGDB_DEVADDR;
7155e60bdb1Sbsh extern int kgdb_rate; /* defined in kgdb_stub.c */
7165e60bdb1Sbsh
7175e60bdb1Sbsh void
kgdb_port_init(void)7185e60bdb1Sbsh kgdb_port_init(void)
7195e60bdb1Sbsh {
7205e60bdb1Sbsh #if (NIMXUART > 0)
7215e60bdb1Sbsh if (strcmp(kgdb_devname, "imxuart") == 0) {
72227505554Shkenken imxuart_kgdb_attach(&armv7_generic_bs_tag, kgdb_addr,
7235e60bdb1Sbsh kgdb_rate, kgdb_mode);
7245e60bdb1Sbsh return;
7255e60bdb1Sbsh }
7265e60bdb1Sbsh
7275e60bdb1Sbsh #endif
7285e60bdb1Sbsh }
7295e60bdb1Sbsh #endif
7305e60bdb1Sbsh
7315e60bdb1Sbsh
732