xref: /netbsd-src/sys/arch/evbarm/lubbock/sacc_obio.c (revision b78992537496bc71ee3d761f9fe0be0fc0a9a001)
1 /*	$NetBSD: sacc_obio.c,v 1.8 2008/04/28 20:23:17 martin Exp $ */
2 
3 /*-
4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by IWAMOTO Toshihiro.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * for SA-1111 companion chip on Intel DBPXA250 evaluation board.
34  */
35 
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: sacc_obio.c,v 1.8 2008/04/28 20:23:17 martin Exp $");
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/mbuf.h>
42 #include <sys/socket.h>
43 #include <sys/ioctl.h>
44 #include <sys/errno.h>
45 #include <sys/syslog.h>
46 #include <sys/select.h>
47 #include <sys/device.h>
48 
49 #include <net/if.h>
50 #include <net/if_dl.h>
51 #include <net/if_ether.h>
52 #include <net/if_media.h>
53 
54 #include <machine/intr.h>
55 #include <machine/bus.h>
56 
57 #include <arm/sa11x0/sa1111_reg.h>
58 #include <arm/sa11x0/sa1111_var.h>
59 #include <arm/xscale/pxa2x0cpu.h>
60 #include <arm/xscale/pxa2x0reg.h>
61 #include <arm/xscale/pxa2x0var.h>
62 #include <arm/xscale/pxa2x0_gpio.h>
63 
64 #include <evbarm/lubbock/lubbock_reg.h>
65 #include <evbarm/lubbock/lubbock_var.h>
66 
67 
68 static	void	sacc_obio_attach(struct device *, struct device *, void *);
69 static	int  sacc_obio_intr(void *arg);
70 
71 CFATTACH_DECL(sacc_obio, sizeof(struct sacc_softc), sacc_probe,
72     sacc_obio_attach, NULL, NULL);
73 
74 #if 0
75 #define DPRINTF(arg)	printf arg
76 #else
77 #define DPRINTF(arg)
78 #endif
79 
80 uint16_t cs2_memctl_init = 0x7ff0;
81 
82 static void
83 sacc_obio_attach(parent, self, aux)
84 	struct device *parent;
85 	struct device *self;
86 	void *aux;
87 {
88 	int i;
89 	u_int32_t skid, tmp;
90 	struct sacc_softc *sc = (struct sacc_softc *)self;
91 	struct obio_softc *psc = (struct obio_softc *)parent;
92 	struct obio_attach_args *sa = aux;
93 	bus_space_tag_t iot = sa->oba_iot;
94 	bus_space_handle_t memctl_ioh;
95 
96 	printf("\n");
97 
98 	/* Set alternative function for GPIO pings 48..57 on PXA2X0 */
99 	for (i=48; i <= 55; ++i)
100 		pxa2x0_gpio_set_function(i, GPIO_ALT_FN_2_OUT);
101 	pxa2x0_gpio_set_function(56, GPIO_ALT_FN_1_IN);
102 	pxa2x0_gpio_set_function(57, GPIO_ALT_FN_1_IN);
103 
104 	/* XXX */
105 	if (bus_space_map(iot, PXA2X0_MEMCTL_BASE, PXA2X0_MEMCTL_SIZE, 0,
106 			  &memctl_ioh))
107 		goto fail;
108 
109 	tmp = bus_space_read_4(iot, memctl_ioh, MEMCTL_MSC2 );
110 	bus_space_write_4(iot, memctl_ioh, MEMCTL_MSC2,
111 	    (tmp & 0xffff0000) | cs2_memctl_init );
112 
113 	bus_space_unmap(iot, memctl_ioh, PXA2X0_MEMCTL_SIZE);
114 
115 	sc->sc_piot = sc->sc_iot = iot;
116 	sc->sc_gpioh = 0;	/* not used */
117 
118 	if (bus_space_map(iot, sa->oba_addr, 0x2000/*size*/, 0, &sc->sc_ioh))
119 		goto fail;
120 
121 	skid = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCSBI_SKID);
122 
123 	printf("%s: SA1111 rev %d.%d\n", sc->sc_dev.dv_xname,
124 	       (skid & 0xf0) >> 4, skid & 0xf);
125 
126 	tmp = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR);
127 	tmp = (tmp & ~SKCR_VCOOFF) | SKCR_PLLBYPASS;
128 	bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR, tmp );
129 
130 	delay(100);			/* XXX */
131 
132 	tmp |= SKCR_RCLKEN;
133 	bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR, tmp );
134 
135 #if 1
136 	if( tmp != bus_space_read_4( sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR ) )
137 		printf( "!!! FAIL SKCR\n" );
138 #endif
139 
140 	/* PCMCIA socket0 power control */
141 	bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCGPIOA_DVR, 0 );
142 	bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCGPIOA_DDR, 0 );
143 
144 	for(i = 0; i < SACCIC_LEN; i++)
145 		sc->sc_intrhand[i] = NULL;
146 
147 	/* initialize SA1111 interrupt controller */
148 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0, 0);
149 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1, 0);
150 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTTSTSEL, 0);
151 	bus_space_write_4(sc->sc_iot, sc->sc_ioh,
152 			  SACCIC_INTSTATCLR0, 0xffffffff);
153 	bus_space_write_4(sc->sc_iot, sc->sc_ioh,
154 			  SACCIC_INTSTATCLR1, 0xffffffff);
155 
156 	/* connect to On-board peripheral interrupt */
157 	obio_intr_establish(psc, sa->oba_intr,
158 			    IPL_HIGH, sacc_obio_intr, sc );
159 	/*
160 	 *  Attach each devices
161 	 */
162 	config_search_ia(sa1111_search, self, "sacc", NULL);
163 
164 	return;
165 
166  fail:
167 	printf("%s: unable to map registers\n", sc->sc_dev.dv_xname);
168 }
169 
170 static int
171 sacc_obio_intr(void *arg)
172 {
173 	int i;
174 	struct sacc_intrvec intstat;
175 	struct sacc_softc *sc = arg;
176 	struct sacc_intrhand *ih;
177 
178 	intstat.lo =
179 	    bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR0);
180 	intstat.hi =
181 	    bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR1);
182 	DPRINTF(("sacc_obio_intr_dispatch: %x %x\n", intstat.lo, intstat.hi));
183 
184 	while ((i = find_first_bit(intstat.lo)) >= 0) {
185 
186 		/*
187 		 * Clear intr status before calling intr handlers.
188 		 * This cause stray interrupts, but clearing
189 		 * after calling intr handlers cause intr lossage.
190 		 */
191 		bus_space_write_4(sc->sc_iot, sc->sc_ioh,
192 				  SACCIC_INTSTATCLR0, 1U<<i );
193 
194 		for(ih = sc->sc_intrhand[i]; ih; ih = ih->ih_next)
195 			softint_schedule(ih->ih_soft);
196 
197 		intstat.lo &= ~(1U<<i);
198 	}
199 
200 	while ((i = find_first_bit(intstat.hi)) >= 0) {
201 		bus_space_write_4(sc->sc_iot, sc->sc_ioh,
202 				  SACCIC_INTSTATCLR1, 1U<<i);
203 
204 		for(ih = sc->sc_intrhand[i + 32]; ih; ih = ih->ih_next)
205 			softint_schedule(ih->ih_soft);
206 
207 		intstat.hi &= ~(1U<<i);
208 	}
209 
210 	return 1;
211 }
212