1 /* $NetBSD: kobo_usb.c,v 1.2 2017/09/22 15:37:13 khorben Exp $ */ 2 3 /* 4 * Copyright (c) 2012 Genetec Corporation. All rights reserved. 5 * Written by Hiroyuki Bessho for Genetec Corporation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 * 28 */ 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: kobo_usb.c,v 1.2 2017/09/22 15:37:13 khorben Exp $"); 31 32 #include "opt_imx.h" 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/conf.h> 37 #include <sys/kernel.h> 38 #include <sys/kthread.h> 39 #include <sys/device.h> 40 #include <sys/intr.h> 41 #include <sys/bus.h> 42 #include <sys/gpio.h> 43 44 #include <dev/usb/usb.h> 45 #include <dev/usb/usbdi.h> 46 #include <dev/usb/usbdivar.h> 47 #include <dev/usb/usb_mem.h> 48 49 #include <dev/usb/ehcireg.h> 50 #include <dev/usb/ehcivar.h> 51 52 #include <arm/imx/imx51reg.h> 53 #include <arm/imx/imx51var.h> 54 #include <arm/imx/imxusbreg.h> 55 #include <arm/imx/imxusbvar.h> 56 #include <arm/imx/imx50_iomuxreg.h> 57 #include <arm/imx/imxgpiovar.h> 58 #include <arm/imx/imx51_ccmreg.h> 59 #include <arm/imx/imx51_ccmvar.h> 60 61 #include "locators.h" 62 63 struct kobo_usbc_softc { 64 struct imxusbc_softc sc_imxusbc; 65 }; 66 67 static int imxusbc_match(device_t, cfdata_t, void *); 68 static void imxusbc_attach(device_t, device_t, void *); 69 static void kobo_usb_init(struct imxehci_softc *); 70 71 static void init_otg(struct imxehci_softc *); 72 static void init_h1(struct imxehci_softc *); 73 74 extern const struct iomux_conf iomux_usb1_config[]; 75 76 /* attach structures */ 77 CFATTACH_DECL_NEW(imxusbc_axi, sizeof(struct kobo_usbc_softc), 78 imxusbc_match, imxusbc_attach, NULL, NULL); 79 80 static int 81 imxusbc_match(device_t parent, cfdata_t cf, void *aux) 82 { 83 struct axi_attach_args *aa = aux; 84 85 if (aa->aa_addr == USBOH3_BASE) 86 return 1; 87 return 0; 88 } 89 90 static void 91 imxusbc_attach(device_t parent, device_t self, void *aux) 92 { 93 struct axi_attach_args *aa = aux; 94 struct kobo_usbc_softc *sc = device_private(self); 95 96 aprint_normal("\n"); 97 aprint_naive("\n"); 98 99 sc->sc_imxusbc.sc_init_md_hook = kobo_usb_init; 100 sc->sc_imxusbc.sc_setup_md_hook = NULL; 101 102 imxusbc_attach_common(parent, self, aa->aa_iot); 103 } 104 105 static void 106 kobo_usb_init(struct imxehci_softc *sc) 107 { 108 switch (sc->sc_unit) { 109 case 0: /* OTG controller */ 110 init_otg(sc); 111 break; 112 case 1: /* EHCI Host 1 */ 113 init_h1(sc); 114 break; 115 default: 116 aprint_error_dev(sc->sc_hsc.sc_dev, "unit %d not supported\n", 117 sc->sc_unit); 118 } 119 } 120 121 static void 122 init_otg(struct imxehci_softc *sc) 123 { 124 struct imxusbc_softc *usbc = sc->sc_usbc; 125 uint32_t reg; 126 127 reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_USB_CLKONOFF_CTRL); 128 reg &= ~USB_CLKONOFF_CTRL_OTG_AHBCLK_OFF; 129 bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_USB_CLKONOFF_CTRL, reg); 130 131 sc->sc_iftype = IMXUSBC_IF_UTMI_WIDE; 132 133 imxehci_reset(sc); 134 135 reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_PHYCTRL0); 136 reg |= PHYCTRL0_OTG_OVER_CUR_DIS | PHYCTRL0_SUSPENDM; 137 bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_PHYCTRL0, reg); 138 139 reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_USBCTRL); 140 reg &= ~USBCTRL_OWIR; 141 bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_USBCTRL, reg); 142 143 reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_PHYCTRL1); 144 reg = (reg & ~PHYCTRL1_PLLDIVVALUE_MASK) | PHYCTRL1_PLLDIVVALUE_24MHZ; 145 bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_PHYCTRL1, reg); 146 } 147 148 static void 149 init_h1(struct imxehci_softc *sc) 150 { 151 struct imxusbc_softc *usbc = sc->sc_usbc; 152 uint32_t reg; 153 154 reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_USB_CLKONOFF_CTRL); 155 reg &= ~USB_CLKONOFF_CTRL_H1_AHBCLK_OFF; 156 bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_USB_CLKONOFF_CTRL, reg); 157 158 imxehci_reset(sc); 159 160 /* select INTERNAL PHY interface for Host 1 */ 161 sc->sc_iftype = IMXUSBC_IF_UTMI; 162 163 reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, 164 USBOH3_USBCTRL); 165 reg |= USBCTRL_H1PM; 166 reg &= ~(USBCTRL_H1WIE); 167 reg &= ~(USBCTRL_H1UIE); 168 bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, 169 USBOH3_USBCTRL, reg); 170 171 reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_PHYCTRL0); 172 reg &= ~PHYCTRL0_H1_OVER_CUR_DIS; 173 reg |= PHYCTRL0_H1_OVER_CUR_POL; 174 bus_space_write_4(usbc->sc_iot, usbc->sc_ioh,USBOH3_PHYCTRL0 , reg); 175 176 delay(1000); 177 178 reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_UH1_PHY_CTRL_1); 179 reg &= ~PHYCTRL1_PLLDIVVALUE_MASK; 180 reg |= PHYCTRL1_PLLDIVVALUE_24MHZ; 181 bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_UH1_PHY_CTRL_1, reg); 182 183 reg = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_UH1_PHY_CTRL_0); 184 reg &= ~PHYCTRL0_CHGRDETON; 185 reg &= ~PHYCTRL0_CHGRDETEN; 186 bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBOH3_UH1_PHY_CTRL_0, reg); 187 } 188 189 190