xref: /netbsd-src/sys/arch/evbarm/iyonix/iyonix_pci.c (revision 7330f729ccf0bd976a06f95fad452fe774fc7fd1)
1 /*	$NetBSD: iyonix_pci.c,v 1.1 2019/02/14 21:47:52 macallan Exp $	*/
2 
3 /*
4  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Based on code written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * Iyonix PCI interrupt support.
40  */
41 
42 #include <sys/cdefs.h>
43 __KERNEL_RCSID(0, "$NetBSD: iyonix_pci.c,v 1.1 2019/02/14 21:47:52 macallan Exp $");
44 
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/device.h>
48 
49 #include <machine/autoconf.h>
50 #include <sys/bus.h>
51 
52 #include <evbarm/iyonix/iyonixreg.h>
53 #include <evbarm/iyonix/iyonixvar.h>
54 
55 #include <arm/xscale/i80321reg.h>
56 #include <arm/xscale/i80321var.h>
57 
58 #include <dev/pci/pcidevs.h>
59 #include <dev/pci/ppbreg.h>
60 
61 #include <sys/extent.h>
62 #include <dev/pci/pciconf.h>
63 
64 int	iyonix_pci_intr_map(const struct pci_attach_args *,
65 	    pci_intr_handle_t *);
66 const char *iyonix_pci_intr_string(void *, pci_intr_handle_t, char *, size_t);
67 const struct evcnt *iyonix_pci_intr_evcnt(void *, pci_intr_handle_t);
68 void	*iyonix_pci_intr_establish(void *, pci_intr_handle_t,
69 	    int, int (*func)(void *), void *, const char *);
70 void	iyonix_pci_intr_disestablish(void *, void *);
71 void pci_conf_write_byte(pci_chipset_tag_t, pcitag_t, int, int);
72 int pci_conf_read_byte(pci_chipset_tag_t, pcitag_t, int);
73 int iyonix_pci_conf_hook(void *, int, int, int, pcireg_t);
74 
75 void
76 iyonix_pci_init(pci_chipset_tag_t pc, void *cookie)
77 {
78 
79 	pc->pc_intr_v = cookie;		/* the i80321 softc */
80 	pc->pc_intr_map = iyonix_pci_intr_map;
81 	pc->pc_intr_string = iyonix_pci_intr_string;
82 	pc->pc_intr_evcnt = iyonix_pci_intr_evcnt;
83 	pc->pc_intr_establish = iyonix_pci_intr_establish;
84 	pc->pc_intr_disestablish = iyonix_pci_intr_disestablish;
85 	pc->pc_conf_hook = iyonix_pci_conf_hook;
86 }
87 
88 int
89 iyonix_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
90 {
91 	struct i80321_softc *sc = pa->pa_pc->pc_intr_v;
92 	int b, d, f;
93 	uint32_t busno;
94 
95 	busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
96 	busno = PCIXSR_BUSNO(busno);
97 	if (busno == 0xff)
98 		busno = 0;
99 
100 	pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, &b, &d, &f);
101 
102 	/* No mappings for devices not on our bus. */
103 	if (b != busno)
104 		goto no_mapping;
105 
106 	/*
107 	 *  XXX We currently deal only with the southbridge and with
108 	 *      regular PCI. IOC devices may need further attention.
109 	 */
110 
111 	/* Devices on the southbridge are all routed through xint 1 */
112 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI) {
113 		switch (PCI_PRODUCT(pa->pa_id)) {
114 			case PCI_PRODUCT_ALI_M1543: /* Southbridge */
115 			case PCI_PRODUCT_ALI_M5229: /* ATA */
116 			case PCI_PRODUCT_ALI_M5237: /* ohci */
117 			case PCI_PRODUCT_ALI_M5257: /* Modem */
118 			case PCI_PRODUCT_ALI_M5451: /* AC97 */
119 			case PCI_PRODUCT_ALI_M7101: /* PMC */
120 				*ihp = ICU_INT_XINT(1);
121 				return (0);
122 		}
123 	}
124 
125 	/* Route other interrupts with default swizzling rule */
126 	*ihp = ICU_INT_XINT((d + pa->pa_intrpin - 1) % 4);
127 	return 0;
128 
129  no_mapping:
130 	printf("iyonix_pci_intr_map: no mapping for %d/%d/%d\n",
131 	    pa->pa_bus, pa->pa_device, pa->pa_function);
132 	return (1);
133 }
134 
135 const char *
136 iyonix_pci_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len)
137 {
138 
139 	strlcpy(buf, i80321_irqnames[ih], len);
140 	return buf;
141 }
142 
143 const struct evcnt *
144 iyonix_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
145 {
146 
147 	/* XXX For now. */
148 	return (NULL);
149 }
150 
151 void *
152 iyonix_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
153     int (*func)(void *), void *arg, const char *xname)
154 {
155 
156 	return (i80321_intr_establish(ih, ipl, func, arg));
157 }
158 
159 void
160 iyonix_pci_intr_disestablish(void *v, void *cookie)
161 {
162 
163 	i80321_intr_disestablish(cookie);
164 }
165 
166 void
167 pci_conf_write_byte(pci_chipset_tag_t pc, pcitag_t tag, int addr, int value)
168 {
169 	int temp;
170 	temp = pci_conf_read(pc, tag, addr&~3);
171 	temp = temp & ~(0xff << ((addr%4) * 8));
172 	temp = temp | (value << ((addr%4) * 8));
173 	pci_conf_write(pc, tag, addr&~3, temp);
174 }
175 
176 int
177 pci_conf_read_byte(pci_chipset_tag_t pc, pcitag_t tag, int addr)
178 {
179 	int temp;
180 	temp = pci_conf_read(pc, tag, addr&~3);
181 	temp = temp >> ((addr%4) * 8);
182 	temp = temp & 0xff;
183 	return temp;
184 }
185 
186 int
187 iyonix_pci_conf_hook(void *v, int bus, int dev, int func, pcireg_t id)
188 {
189 
190 	/*
191 	 * We need to disable devices in the Southbridge, and as
192 	 * we have all the tags we need at this point, this is
193 	 * where we do it.
194 	 */
195 	if (PCI_VENDOR(id) == PCI_VENDOR_ALI &&
196 	    PCI_PRODUCT(id) == PCI_PRODUCT_ALI_M1543)
197 	{
198 		pcitag_t tag;
199 		int status;
200 		pci_chipset_tag_t pc = (pci_chipset_tag_t) v;
201 
202 		tag = pci_make_tag(pc, bus, dev, func);
203 
204 		/* Undocumented magic */
205 
206 		/* Disable USB */
207 		pci_conf_write_byte(pc, tag, 0x53, 0x40);
208 		pci_conf_write_byte(pc, tag, 0x52, 0x00);
209 
210 		status = pci_conf_read_byte(pc, tag, 0x7e);
211 		pci_conf_write_byte(pc, tag, 0x7e, status & ~0x80);
212 
213 		/* Disable modem */
214 		pci_conf_write_byte(pc, tag, 0x77, 1 << 6);
215 
216 		/* Disable SCI */
217 		pci_conf_write_byte(pc, tag, 0x78, 1 << 7);
218 	}
219 
220 	return (PCI_CONF_DEFAULT);
221 }
222