1 /* $NetBSD: autoconf.c,v 1.1 2019/02/14 21:47:52 macallan Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas <matt@3am-software.com>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.1 2019/02/14 21:47:52 macallan Exp $"); 34 35 #include "opt_md.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/reboot.h> 40 #include <sys/disklabel.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 #include <sys/kernel.h> 44 #include <sys/malloc.h> 45 46 #include <net/if.h> 47 #include <net/if_ether.h> 48 49 #include <machine/autoconf.h> 50 #include <machine/intr.h> 51 52 #include <evbarm/iyonix/iyonixvar.h> 53 54 #include <acorn32/include/bootconfig.h> 55 56 extern struct bootconfig bootconfig; 57 58 /* 59 * Set up the root device from the boot args 60 */ 61 void 62 cpu_rootconf(void) 63 { 64 aprint_normal("boot device: %s\n", 65 booted_device != NULL ? device_xname(booted_device) : "<unknown>"); 66 rootconf(); 67 } 68 69 70 /* 71 * void cpu_configure() 72 * 73 * Configure all the root devices 74 * The root devices are expected to configure their own children 75 */ 76 void 77 cpu_configure(void) 78 { 79 struct mainbus_attach_args maa; 80 81 (void) splhigh(); 82 (void) splserial(); /* XXX need an splextreme() */ 83 84 maa.ma_name = "mainbus"; 85 86 config_rootfound("mainbus", &maa); 87 88 /* Time to start taking interrupts so lets open the flood gates .... */ 89 spl0(); 90 } 91 92 #define BUILTIN_ETHERNET_P(pa) \ 93 ((pa)->pa_bus == 0 && (pa)->pa_device == 4 && (pa)->pa_function == 0) 94 95 #define SETPROP(x, y) \ 96 do { \ 97 if (prop_dictionary_set(device_properties(dev), \ 98 x, y) == false) { \ 99 printf("WARNING: unable to set " x " " \ 100 "property for %s\n", device_xname(dev)); \ 101 } \ 102 prop_object_release(y); \ 103 } while (/*CONSTCOND*/0) 104 105 void 106 device_register(device_t dev, void *aux) 107 { 108 device_t pdev; 109 110 if ((pdev = device_parent(dev)) != NULL && 111 device_is_a(pdev, "pci")) { 112 struct pci_attach_args *pa = aux; 113 114 if (BUILTIN_ETHERNET_P(pa)) { 115 prop_number_t cfg1, cfg2, swdpin; 116 prop_data_t mac; 117 118 /* 119 * We set these configuration registers to 0, 120 * because it's the closest we have to "leave them 121 * alone". That and, it works. 122 */ 123 cfg1 = prop_number_create_integer(0); 124 KASSERT(cfg1 != NULL); 125 cfg2 = prop_number_create_integer(0); 126 KASSERT(cfg2 != NULL); 127 swdpin = prop_number_create_integer(0); 128 KASSERT(swdpin != NULL); 129 130 mac = prop_data_create_data_nocopy(iyonix_macaddr, 131 ETHER_ADDR_LEN); 132 KASSERT(mac != NULL); 133 134 SETPROP("mac-address", mac); 135 SETPROP("i82543-cfg1", cfg1); 136 SETPROP("i82543-cfg2", cfg2); 137 SETPROP("i82543-swdpin", swdpin); 138 } 139 } 140 141 if ((device_is_a(dev, "genfb") || device_is_a(dev, "gffb")) && 142 device_is_a(device_parent(dev), "pci") ) { 143 prop_dictionary_t dict = device_properties(dev); 144 struct pci_attach_args *pa = aux; 145 pcireg_t bar0, bar1; 146 uint32_t fbaddr; 147 bus_space_handle_t vgah; 148 149 bar0 = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START); 150 bar1 = pci_conf_read(pa->pa_pc, pa->pa_tag, 151 PCI_MAPREG_START + 0x04); 152 153 /* 154 * We need to prod the VGA card to disable interrupts, since 155 * RISC OS has been using them and we don't know how to 156 * handle them. This assumes that we have a NVidia 157 * GeForce 2 MX card as supplied with the Iyonix and 158 * as (probably) required by RISC OS in order to boot. 159 * If you write your own RISC OS driver for a different card, 160 * you're on your own. 161 */ 162 163 /* We're guessing at the numbers here, guys */ 164 #define VGASIZE 0x1000 165 #define IRQENABLE_ADDR 0x140 166 167 bus_space_map(pa->pa_memt, PCI_MAPREG_MEM_ADDR(bar0), 168 VGASIZE, 0, &vgah); 169 bus_space_write_4(pa->pa_memt, vgah, 0x140, 0); 170 bus_space_unmap(pa->pa_memt, vgah, 0x1000); 171 172 fbaddr = PCI_MAPREG_MEM_ADDR(bar1); 173 174 prop_dictionary_set_bool(dict, "is_console", 1); 175 prop_dictionary_set_uint32(dict, "width", 176 bootconfig.width + 1); 177 prop_dictionary_set_uint32(dict, "height", 178 bootconfig.height + 1); 179 prop_dictionary_set_uint32(dict, "depth", 180 1 << bootconfig.log2_bpp); 181 /* 182 * XXX 183 * at least RISC OS 5.28 seems to use the graphics hardware in 184 * BGR mode when in 32bit colour, so take that into account 185 */ 186 if (bootconfig.log2_bpp == 5) 187 prop_dictionary_set_bool(dict, "is_bgr", 1); 188 prop_dictionary_set_uint32(dict, "address", fbaddr); 189 } 190 if (device_is_a(dev, "dsrtc")) { 191 prop_dictionary_t dict = device_properties(dev); 192 prop_dictionary_set_bool(dict, "base_year_is_2000", 1); 193 } 194 } 195