xref: /netbsd-src/sys/arch/evbarm/iq80310/iq80310_machdep.c (revision 1ffa7b76c40339c17a0fb2a09fac93f287cfc046)
1 /*	$NetBSD: iq80310_machdep.c,v 1.53 2003/05/03 03:49:06 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * Copyright (c) 1997,1998 Mark Brinicombe.
40  * Copyright (c) 1997,1998 Causality Limited.
41  * All rights reserved.
42  *
43  * Redistribution and use in source and binary forms, with or without
44  * modification, are permitted provided that the following conditions
45  * are met:
46  * 1. Redistributions of source code must retain the above copyright
47  *    notice, this list of conditions and the following disclaimer.
48  * 2. Redistributions in binary form must reproduce the above copyright
49  *    notice, this list of conditions and the following disclaimer in the
50  *    documentation and/or other materials provided with the distribution.
51  * 3. All advertising materials mentioning features or use of this software
52  *    must display the following acknowledgement:
53  *	This product includes software developed by Mark Brinicombe
54  *	for the NetBSD Project.
55  * 4. The name of the company nor the name of the author may be used to
56  *    endorse or promote products derived from this software without specific
57  *    prior written permission.
58  *
59  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
60  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69  * SUCH DAMAGE.
70  *
71  * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
72  * boards using RedBoot firmware.
73  */
74 
75 #include "opt_ddb.h"
76 #include "opt_pmap_debug.h"
77 
78 #include <sys/param.h>
79 #include <sys/device.h>
80 #include <sys/systm.h>
81 #include <sys/kernel.h>
82 #include <sys/exec.h>
83 #include <sys/proc.h>
84 #include <sys/msgbuf.h>
85 #include <sys/reboot.h>
86 #include <sys/termios.h>
87 #include <sys/ksyms.h>
88 
89 #include <uvm/uvm_extern.h>
90 
91 #include <dev/cons.h>
92 
93 #include <machine/db_machdep.h>
94 #include <ddb/db_sym.h>
95 #include <ddb/db_extern.h>
96 
97 #include <machine/bootconfig.h>
98 #include <machine/bus.h>
99 #include <machine/cpu.h>
100 #include <machine/frame.h>
101 #include <arm/undefined.h>
102 
103 #include <arm/arm32/machdep.h>
104 
105 #include <arm/xscale/i80312reg.h>
106 #include <arm/xscale/i80312var.h>
107 
108 #include <dev/pci/ppbreg.h>
109 
110 #include <evbarm/iq80310/iq80310reg.h>
111 #include <evbarm/iq80310/iq80310var.h>
112 #include <evbarm/iq80310/obiovar.h>
113 
114 #include "opt_ipkdb.h"
115 #include "ksyms.h"
116 
117 /*
118  * Address to call from cpu_reset() to reset the machine.
119  * This is machine architecture dependant as it varies depending
120  * on where the ROM appears when you turn the MMU off.
121  */
122 
123 u_int cpu_reset_address = 0;
124 
125 /* Define various stack sizes in pages */
126 #define IRQ_STACK_SIZE	1
127 #define ABT_STACK_SIZE	1
128 #ifdef IPKDB
129 #define UND_STACK_SIZE	2
130 #else
131 #define UND_STACK_SIZE	1
132 #endif
133 
134 BootConfig bootconfig;		/* Boot config storage */
135 char *boot_args = NULL;
136 char *boot_file = NULL;
137 
138 vm_offset_t physical_start;
139 vm_offset_t physical_freestart;
140 vm_offset_t physical_freeend;
141 vm_offset_t physical_end;
142 u_int free_pages;
143 vm_offset_t pagetables_start;
144 int physmem = 0;
145 
146 /*int debug_flags;*/
147 #ifndef PMAP_STATIC_L1S
148 int max_processes = 64;			/* Default number */
149 #endif	/* !PMAP_STATIC_L1S */
150 
151 /* Physical and virtual addresses for some global pages */
152 pv_addr_t systempage;
153 pv_addr_t irqstack;
154 pv_addr_t undstack;
155 pv_addr_t abtstack;
156 pv_addr_t kernelstack;
157 pv_addr_t minidataclean;
158 
159 vm_offset_t msgbufphys;
160 
161 extern u_int data_abort_handler_address;
162 extern u_int prefetch_abort_handler_address;
163 extern u_int undefined_handler_address;
164 
165 #ifdef PMAP_DEBUG
166 extern int pmap_debug_level;
167 #endif
168 
169 #define KERNEL_PT_SYS		0	/* L2 table for mapping zero page */
170 
171 #define KERNEL_PT_KERNEL	1	/* L2 table for mapping kernel */
172 #define	KERNEL_PT_KERNEL_NUM	2
173 
174 					/* L2 table for mapping i80312 */
175 #define	KERNEL_PT_IOPXS		(KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
176 
177 					/* L2 tables for mapping kernel VM */
178 #define KERNEL_PT_VMDATA	(KERNEL_PT_IOPXS + 1)
179 #define	KERNEL_PT_VMDATA_NUM	4	/* start with 16MB of KVM */
180 #define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
181 
182 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
183 
184 struct user *proc0paddr;
185 
186 /* Prototypes */
187 
188 void	consinit(void);
189 
190 #include "com.h"
191 #if NCOM > 0
192 #include <dev/ic/comreg.h>
193 #include <dev/ic/comvar.h>
194 #endif
195 
196 /*
197  * Define the default console speed for the board.  This is generally
198  * what the firmware provided with the board defaults to.
199  */
200 #ifndef CONSPEED
201 #define CONSPEED B115200
202 #endif /* ! CONSPEED */
203 
204 #ifndef CONUNIT
205 #define	CONUNIT	0
206 #endif
207 
208 #ifndef CONMODE
209 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
210 #endif
211 
212 int comcnspeed = CONSPEED;
213 int comcnmode = CONMODE;
214 int comcnunit = CONUNIT;
215 
216 /*
217  * void cpu_reboot(int howto, char *bootstr)
218  *
219  * Reboots the system
220  *
221  * Deal with any syncing, unmounting, dumping and shutdown hooks,
222  * then reset the CPU.
223  */
224 void
225 cpu_reboot(int howto, char *bootstr)
226 {
227 #ifdef DIAGNOSTIC
228 	/* info */
229 	printf("boot: howto=%08x curlwp=%p\n", howto, curlwp);
230 #endif
231 
232 	/*
233 	 * If we are still cold then hit the air brakes
234 	 * and crash to earth fast
235 	 */
236 	if (cold) {
237 		doshutdownhooks();
238 		printf("The operating system has halted.\n");
239 		printf("Please press any key to reboot.\n\n");
240 		cngetc();
241 		printf("rebooting...\n");
242 		cpu_reset();
243 		/*NOTREACHED*/
244 	}
245 
246 	/* Disable console buffering */
247 
248 	/*
249 	 * If RB_NOSYNC was not specified sync the discs.
250 	 * Note: Unless cold is set to 1 here, syslogd will die during the
251 	 * unmount.  It looks like syslogd is getting woken up only to find
252 	 * that it cannot page part of the binary in as the filesystem has
253 	 * been unmounted.
254 	 */
255 	if (!(howto & RB_NOSYNC))
256 		bootsync();
257 
258 	/* Say NO to interrupts */
259 	splhigh();
260 
261 	/* Do a dump if requested. */
262 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
263 		dumpsys();
264 
265 	/* Run any shutdown hooks */
266 	doshutdownhooks();
267 
268 	/* Make sure IRQ's are disabled */
269 	IRQdisable;
270 
271 	if (howto & RB_HALT) {
272 		iq80310_7seg('.', '.');
273 		printf("The operating system has halted.\n");
274 		printf("Please press any key to reboot.\n\n");
275 		cngetc();
276 	}
277 
278 	printf("rebooting...\n");
279 	cpu_reset();
280 	/*NOTREACHED*/
281 }
282 
283 /*
284  * Mapping table for core kernel memory. This memory is mapped at init
285  * time with section mappings.
286  */
287 struct l1_sec_map {
288 	vaddr_t	va;
289 	vaddr_t	pa;
290 	vsize_t	size;
291 	vm_prot_t prot;
292 	int cache;
293 } l1_sec_table[] = {
294     /*
295      * Map the on-board devices VA == PA so that we can access them
296      * with the MMU on or off.
297      */
298     {
299 	IQ80310_OBIO_BASE,
300 	IQ80310_OBIO_BASE,
301 	IQ80310_OBIO_SIZE,
302 	VM_PROT_READ|VM_PROT_WRITE,
303 	PTE_NOCACHE,
304     },
305 
306     {
307 	0,
308 	0,
309 	0,
310 	0,
311 	0,
312     }
313 };
314 
315 /*
316  * u_int initarm(...)
317  *
318  * Initial entry point on startup. This gets called before main() is
319  * entered.
320  * It should be responsible for setting up everything that must be
321  * in place when main is called.
322  * This includes
323  *   Taking a copy of the boot configuration structure.
324  *   Initialising the physical console so characters can be printed.
325  *   Setting up page tables for the kernel
326  *   Relocating the kernel to the bottom of physical memory
327  */
328 u_int
329 initarm(void *arg)
330 {
331 	extern vaddr_t xscale_cache_clean_addr;
332 #ifdef DIAGNOSTIC
333 	extern vsize_t xscale_minidata_clean_size;
334 #endif
335 	int loop;
336 	int loop1;
337 	u_int l1pagetable;
338 	pv_addr_t kernel_l1pt;
339 	paddr_t memstart;
340 	psize_t memsize;
341 
342 	/*
343 	 * Clear out the 7-segment display.  Whee, the first visual
344 	 * indication that we're running kernel code.
345 	 */
346 	iq80310_7seg(' ', ' ');
347 
348 	/*
349 	 * Heads up ... Setup the CPU / MMU / TLB functions
350 	 */
351 	if (set_cpufuncs())
352 		panic("cpu not recognized!");
353 
354 	/* Calibrate the delay loop. */
355 	iq80310_calibrate_delay();
356 
357 	/*
358 	 * Since we map the on-board devices VA==PA, and the kernel
359 	 * is running VA==PA, it's possible for us to initialize
360 	 * the console now.
361 	 */
362 	consinit();
363 
364 	/* Talk to the user */
365 	printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
366 
367 	/*
368 	 * Reset the secondary PCI bus.  RedBoot doesn't stop devices
369 	 * on the PCI bus before handing us control, so we have to
370 	 * do this.
371 	 *
372 	 * XXX This is arguably a bug in RedBoot, and doing this reset
373 	 * XXX could be problematic in the future if we encounter an
374 	 * XXX application where the PPB in the i80312 is used as a
375 	 * XXX PPB.
376 	 */
377 	{
378 		uint32_t reg;
379 
380 		printf("Resetting secondary PCI bus...\n");
381 		reg = bus_space_read_4(&obio_bs_tag,
382 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
383 		bus_space_write_4(&obio_bs_tag,
384 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
385 		    reg | PPB_BC_SECONDARY_RESET);
386 		delay(10 * 1000);	/* 10ms enough? */
387 		bus_space_write_4(&obio_bs_tag,
388 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
389 		    reg);
390 	}
391 
392 	/*
393 	 * We are currently running with the MMU enabled and the
394 	 * entire address space mapped VA==PA, except for the
395 	 * first 64M of RAM is also double-mapped at 0xc0000000.
396 	 * There is an L1 page table at 0xa0004000.
397 	 */
398 
399 	/*
400 	 * Fetch the SDRAM start/size from the i80312 SDRAM configration
401 	 * registers.
402 	 */
403 	i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
404 	    &memstart, &memsize);
405 
406 	printf("initarm: Configuring system ...\n");
407 
408 	/* Fake bootconfig structure for the benefit of pmap.c */
409 	/* XXX must make the memory description h/w independant */
410 	bootconfig.dramblocks = 1;
411 	bootconfig.dram[0].address = memstart;
412 	bootconfig.dram[0].pages = memsize / PAGE_SIZE;
413 
414 	/*
415 	 * Set up the variables that define the availablilty of
416 	 * physical memory.  For now, we're going to set
417 	 * physical_freestart to 0xa0200000 (where the kernel
418 	 * was loaded), and allocate the memory we need downwards.
419 	 * If we get too close to the L1 table that we set up, we
420 	 * will panic.  We will update physical_freestart and
421 	 * physical_freeend later to reflect what pmap_bootstrap()
422 	 * wants to see.
423 	 *
424 	 * XXX pmap_bootstrap() needs an enema.
425 	 */
426 	physical_start = bootconfig.dram[0].address;
427 	physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
428 
429 	physical_freestart = 0xa0009000UL;
430 	physical_freeend = 0xa0200000UL;
431 
432 	physmem = (physical_end - physical_start) / PAGE_SIZE;
433 
434 	/* Tell the user about the memory */
435 	printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
436 	    physical_start, physical_end - 1);
437 
438 	/*
439 	 * Okay, the kernel starts 2MB in from the bottom of physical
440 	 * memory.  We are going to allocate our bootstrap pages downwards
441 	 * from there.
442 	 *
443 	 * We need to allocate some fixed page tables to get the kernel
444 	 * going.  We allocate one page directory and a number of page
445 	 * tables and store the physical addresses in the kernel_pt_table
446 	 * array.
447 	 *
448 	 * The kernel page directory must be on a 16K boundary.  The page
449 	 * tables must be on 4K bounaries.  What we do is allocate the
450 	 * page directory on the first 16K boundary that we encounter, and
451 	 * the page tables on 4K boundaries otherwise.  Since we allocate
452 	 * at least 3 L2 page tables, we are guaranteed to encounter at
453 	 * least one 16K aligned region.
454 	 */
455 
456 #ifdef VERBOSE_INIT_ARM
457 	printf("Allocating page tables\n");
458 #endif
459 
460 	free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
461 
462 #ifdef VERBOSE_INIT_ARM
463 	printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
464 	       physical_freestart, free_pages, free_pages);
465 #endif
466 
467 	/* Define a macro to simplify memory allocation */
468 #define	valloc_pages(var, np)				\
469 	alloc_pages((var).pv_pa, (np));			\
470 	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
471 
472 #define alloc_pages(var, np)				\
473 	physical_freeend -= ((np) * PAGE_SIZE);		\
474 	if (physical_freeend < physical_freestart)	\
475 		panic("initarm: out of memory");	\
476 	(var) = physical_freeend;			\
477 	free_pages -= (np);				\
478 	memset((char *)(var), 0, ((np) * PAGE_SIZE));
479 
480 	loop1 = 0;
481 	kernel_l1pt.pv_pa = 0;
482 	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
483 		/* Are we 16KB aligned for an L1 ? */
484 		if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
485 		    && kernel_l1pt.pv_pa == 0) {
486 			valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
487 		} else {
488 			valloc_pages(kernel_pt_table[loop1],
489 			    L2_TABLE_SIZE / PAGE_SIZE);
490 			++loop1;
491 		}
492 	}
493 
494 	/* This should never be able to happen but better confirm that. */
495 	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
496 		panic("initarm: Failed to align the kernel page directory");
497 
498 	/*
499 	 * Allocate a page for the system page mapped to V0x00000000
500 	 * This page will just contain the system vectors and can be
501 	 * shared by all processes.
502 	 */
503 	alloc_pages(systempage.pv_pa, 1);
504 
505 	/* Allocate stacks for all modes */
506 	valloc_pages(irqstack, IRQ_STACK_SIZE);
507 	valloc_pages(abtstack, ABT_STACK_SIZE);
508 	valloc_pages(undstack, UND_STACK_SIZE);
509 	valloc_pages(kernelstack, UPAGES);
510 
511 	/* Allocate enough pages for cleaning the Mini-Data cache. */
512 	KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
513 	valloc_pages(minidataclean, 1);
514 
515 #ifdef VERBOSE_INIT_ARM
516 	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
517 	    irqstack.pv_va);
518 	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
519 	    abtstack.pv_va);
520 	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
521 	    undstack.pv_va);
522 	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
523 	    kernelstack.pv_va);
524 #endif
525 
526 	/*
527 	 * XXX Defer this to later so that we can reclaim the memory
528 	 * XXX used by the RedBoot page tables.
529 	 */
530 	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
531 
532 	/*
533 	 * Ok we have allocated physical pages for the primary kernel
534 	 * page tables
535 	 */
536 
537 #ifdef VERBOSE_INIT_ARM
538 	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
539 #endif
540 
541 	/*
542 	 * Now we start construction of the L1 page table
543 	 * We start by mapping the L2 page tables into the L1.
544 	 * This means that we can replace L1 mappings later on if necessary
545 	 */
546 	l1pagetable = kernel_l1pt.pv_pa;
547 
548 	/* Map the L2 pages tables in the L1 page table */
549 	pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
550 	    &kernel_pt_table[KERNEL_PT_SYS]);
551 	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
552 		pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
553 		    &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
554 	pmap_link_l2pt(l1pagetable, IQ80310_IOPXS_VBASE,
555 	    &kernel_pt_table[KERNEL_PT_IOPXS]);
556 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
557 		pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
558 		    &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
559 
560 	/* update the top of the kernel VM */
561 	pmap_curmaxkvaddr =
562 	    KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
563 
564 #ifdef VERBOSE_INIT_ARM
565 	printf("Mapping kernel\n");
566 #endif
567 
568 	/* Now we fill in the L2 pagetable for the kernel static code/data */
569 	{
570 		extern char etext[], _end[];
571 		size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
572 		size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
573 		u_int logical;
574 
575 		textsize = (textsize + PGOFSET) & ~PGOFSET;
576 		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
577 
578 		logical = 0x00200000;	/* offset of kernel in RAM */
579 
580 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
581 		    physical_start + logical, textsize,
582 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
583 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
584 		    physical_start + logical, totalsize - textsize,
585 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
586 	}
587 
588 #ifdef VERBOSE_INIT_ARM
589 	printf("Constructing L2 page tables\n");
590 #endif
591 
592 	/* Map the stack pages */
593 	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
594 	    IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
595 	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
596 	    ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
597 	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
598 	    UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
599 	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
600 	    UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
601 
602 	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
603 	    L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
604 
605 	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
606 		pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
607 		    kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
608 		    VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
609 	}
610 
611 	/* Map the Mini-Data cache clean area. */
612 	xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
613 	    minidataclean.pv_pa);
614 
615 	/* Map the vector page. */
616 	pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
617 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
618 
619 	/*
620 	 * Map devices we can map w/ section mappings.
621 	 */
622 	loop = 0;
623 	while (l1_sec_table[loop].size) {
624 		vm_size_t sz;
625 
626 #ifdef VERBOSE_INIT_ARM
627 		printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
628 		    l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
629 		    l1_sec_table[loop].va);
630 #endif
631 		for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
632 			pmap_map_section(l1pagetable,
633 			    l1_sec_table[loop].va + sz,
634 			    l1_sec_table[loop].pa + sz,
635 			    l1_sec_table[loop].prot,
636 			    l1_sec_table[loop].cache);
637 		++loop;
638 	}
639 
640 	/*
641 	 * Map the PCI I/O spaces and i80312 registers.  These are too
642 	 * small to be mapped w/ section mappings.
643 	 */
644 #ifdef VERBOSE_INIT_ARM
645 	printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
646 	    I80312_PCI_XLATE_PIOW_BASE,
647 	    I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
648 	    IQ80310_PIOW_VBASE);
649 #endif
650 	pmap_map_chunk(l1pagetable, IQ80310_PIOW_VBASE,
651 	    I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE,
652 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
653 
654 #ifdef VERBOSE_INIT_ARM
655 	printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
656 	    I80312_PCI_XLATE_SIOW_BASE,
657 	    I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
658 	    IQ80310_SIOW_VBASE);
659 #endif
660 	pmap_map_chunk(l1pagetable, IQ80310_SIOW_VBASE,
661 	    I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE,
662 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
663 
664 #ifdef VERBOSE_INIT_ARM
665 	printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
666 	    I80312_PMMR_BASE,
667 	    I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
668 	    IQ80310_80312_VBASE);
669 #endif
670 	pmap_map_chunk(l1pagetable, IQ80310_80312_VBASE,
671 	    I80312_PMMR_BASE, I80312_PMMR_SIZE,
672 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
673 
674 	/*
675 	 * Give the XScale global cache clean code an appropriately
676 	 * sized chunk of unmapped VA space starting at 0xff000000
677 	 * (our device mappings end before this address).
678 	 */
679 	xscale_cache_clean_addr = 0xff000000U;
680 
681 	/*
682 	 * Now we have the real page tables in place so we can switch to them.
683 	 * Once this is done we will be running with the REAL kernel page
684 	 * tables.
685 	 */
686 
687 	/*
688 	 * Update the physical_freestart/physical_freeend/free_pages
689 	 * variables.
690 	 */
691 	{
692 		extern char _end[];
693 
694 		physical_freestart = physical_start +
695 		    (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
696 		     KERNEL_BASE);
697 		physical_freeend = physical_end;
698 		free_pages =
699 		    (physical_freeend - physical_freestart) / PAGE_SIZE;
700 	}
701 
702 	/* Switch tables */
703 #ifdef VERBOSE_INIT_ARM
704 	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
705 	       physical_freestart, free_pages, free_pages);
706 	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
707 #endif
708 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
709 	setttb(kernel_l1pt.pv_pa);
710 	cpu_tlb_flushID();
711 	cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
712 
713 	/*
714 	 * Moved from cpu_startup() as data_abort_handler() references
715 	 * this during uvm init
716 	 */
717 	proc0paddr = (struct user *)kernelstack.pv_va;
718 	lwp0.l_addr = proc0paddr;
719 
720 #ifdef VERBOSE_INIT_ARM
721 	printf("done!\n");
722 #endif
723 
724 #ifdef VERBOSE_INIT_ARM
725 	printf("bootstrap done.\n");
726 #endif
727 
728 	arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
729 
730 	/*
731 	 * Pages were allocated during the secondary bootstrap for the
732 	 * stacks for different CPU modes.
733 	 * We must now set the r13 registers in the different CPU modes to
734 	 * point to these stacks.
735 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
736 	 * of the stack memory.
737 	 */
738 	printf("init subsystems: stacks ");
739 
740 	set_stackptr(PSR_IRQ32_MODE,
741 	    irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
742 	set_stackptr(PSR_ABT32_MODE,
743 	    abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
744 	set_stackptr(PSR_UND32_MODE,
745 	    undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
746 
747 	/*
748 	 * Well we should set a data abort handler.
749 	 * Once things get going this will change as we will need a proper
750 	 * handler.
751 	 * Until then we will use a handler that just panics but tells us
752 	 * why.
753 	 * Initialisation of the vectors will just panic on a data abort.
754 	 * This just fills in a slighly better one.
755 	 */
756 	printf("vectors ");
757 	data_abort_handler_address = (u_int)data_abort_handler;
758 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
759 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
760 
761 	/* Initialise the undefined instruction handlers */
762 	printf("undefined ");
763 	undefined_init();
764 
765 	/* Load memory into UVM. */
766 	printf("page ");
767 	uvm_setpagesize();	/* initialize PAGE_SIZE-dependent variables */
768 	uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
769 	    atop(physical_freestart), atop(physical_freeend),
770 	    VM_FREELIST_DEFAULT);
771 
772 	/* Boot strap pmap telling it where the kernel page table is */
773 	printf("pmap ");
774 	pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
775 	    KERNEL_VM_BASE + KERNEL_VM_SIZE);
776 
777 	/* Setup the IRQ system */
778 	printf("irq ");
779 	iq80310_intr_init();
780 	printf("done.\n");
781 
782 #ifdef IPKDB
783 	/* Initialise ipkdb */
784 	ipkdb_init();
785 	if (boothowto & RB_KDB)
786 		ipkdb_connect(0);
787 #endif
788 
789 #if NKSYMS || defined(DDB) || defined(LKM)
790 	/* Firmware doesn't load symbols. */
791 	ksyms_init(0, NULL, NULL);
792 #endif
793 
794 #ifdef DDB
795 	db_machine_init();
796 	if (boothowto & RB_KDB)
797 		Debugger();
798 #endif
799 
800 	/* We return the new stack pointer address */
801 	return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
802 }
803 
804 void
805 consinit(void)
806 {
807 	static const bus_addr_t comcnaddrs[] = {
808 		IQ80310_UART2,		/* com0 (J9) */
809 		IQ80310_UART1,		/* com1 (J10) */
810 	};
811 	static int consinit_called;
812 
813 	if (consinit_called != 0)
814 		return;
815 
816 	consinit_called = 1;
817 
818 #if NCOM > 0
819 	if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
820 	    COM_FREQ, comcnmode))
821 		panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
822 #else
823 	panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
824 #endif
825 }
826