xref: /netbsd-src/sys/arch/evbarm/include/intr.h (revision daf6c4152fcddc27c445489775ed1f66ab4ea9a9)
1 /*	$NetBSD: intr.h,v 1.22 2010/11/13 14:07:06 uebayasi Exp $	*/
2 
3 /*
4  * Copyright (c) 2001, 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef	_EVBARM_INTR_H_
39 #define	_EVBARM_INTR_H_
40 
41 #ifdef _KERNEL
42 
43 /* Interrupt priority "levels". */
44 #define	IPL_NONE	0		/* nothing */
45 #define	IPL_SOFTCLOCK	1		/* clock */
46 #define	IPL_SOFTBIO	2		/* block I/O */
47 #define	IPL_SOFTNET	3		/* software network interrupt */
48 #define	IPL_SOFTSERIAL	4		/* software serial interrupt */
49 #define	IPL_VM		5		/* memory allocation */
50 #define	IPL_SCHED	6		/* clock interrupt */
51 #define	IPL_HIGH	7		/* everything */
52 
53 #define	NIPL		8
54 
55 /* Interrupt sharing types. */
56 #define	IST_NONE	0	/* none */
57 #define	IST_PULSE	1	/* pulsed */
58 #define	IST_EDGE	2	/* edge-triggered */
59 #define	IST_LEVEL	3	/* level-triggered */
60 
61 #define IST_LEVEL_LOW	IST_LEVEL
62 #define IST_LEVEL_HIGH	4
63 #define IST_EDGE_FALLING IST_EDGE
64 #define IST_EDGE_RISING	5
65 #define IST_EDGE_BOTH	6
66 #define IST_SOFT	7
67 
68 #ifdef __OLD_INTERRUPT_CODE	/* XXX XXX XXX */
69 
70 /* Software interrupt priority levels */
71 
72 #ifdef __HAVE_FAST_SOFTINTS
73 #define SOFTIRQ_CLOCK   0
74 #define SOFTIRQ_BIO     1
75 #define SOFTIRQ_NET     2
76 #define SOFTIRQ_SERIAL  3
77 
78 #define SOFTIRQ_BIT(x)  (1 << x)
79 #endif
80 
81 #include <arm/arm32/psl.h>
82 
83 #else /* ! __OLD_INTERRUPT_CODE */
84 
85 #define	__NEWINTR	/* enables new hooks in cpu_fork()/cpu_switch() */
86 
87 #ifndef _LOCORE
88 
89 #include <sys/queue.h>
90 
91 #if defined(_LKM)
92 
93 int	_splraise(int);
94 int	_spllower(int);
95 void	splx(int);
96 #ifdef __HAVE_FAST_SOFTINTS
97 void	_setsoftintr(int);
98 #endif
99 
100 #else	/* _LKM */
101 
102 #include "opt_arm_intr_impl.h"
103 
104 #if defined(ARM_INTR_IMPL)
105 
106 /*
107  * Each board needs to define the following functions:
108  *
109  * int	_splraise(int);
110  * int	_spllower(int);
111  * void	splx(int);
112  *
113  * These may be defined as functions, static inline functions, or macros,
114  * but there must be a _spllower() and splx() defined as functions callable
115  * from assembly language (for cpu_switch()).  However, since it's quite
116  * useful to be able to inline splx(), you could do something like the
117  * following:
118  *
119  * in <boardtype>_intr.h:
120  * 	static inline int
121  *	boardtype_splx(int spl)
122  *	{...}
123  *
124  *	#define splx(nspl)	boardtype_splx(nspl)
125  *	...
126  * and in boardtype's machdep code:
127  *
128  *	...
129  *	#undef splx
130  *	int
131  *	splx(int spl)
132  *	{
133  *		return boardtype_splx(spl);
134  *	}
135  */
136 
137 #include ARM_INTR_IMPL
138 
139 #else /* ARM_INTR_IMPL */
140 
141 #error ARM_INTR_IMPL not defined.
142 
143 #endif	/* ARM_INTR_IMPL */
144 
145 #endif /* _LKM */
146 
147 typedef uint8_t ipl_t;
148 typedef struct {
149 	ipl_t _ipl;
150 } ipl_cookie_t;
151 
152 static inline ipl_cookie_t
153 makeiplcookie(ipl_t ipl)
154 {
155 
156 	return (ipl_cookie_t){._ipl = ipl};
157 }
158 
159 static inline int
160 splraiseipl(ipl_cookie_t icookie)
161 {
162 
163 	return _splraise(icookie._ipl);
164 }
165 
166 #define	spl0()		_spllower(IPL_NONE)
167 
168 #include <sys/spl.h>
169 
170 #endif /* ! _LOCORE */
171 
172 #endif /* __OLD_INTERRUPT_CODE */
173 
174 #endif /* _KERNEL */
175 
176 #endif	/* _EVBARM_INTR_H_ */
177