xref: /netbsd-src/sys/arch/evbarm/include/intr.h (revision b1c86f5f087524e68db12794ee9c3e3da1ab17a0)
1 /*	$NetBSD: intr.h,v 1.21 2010/06/13 02:11:23 tsutsui Exp $	*/
2 
3 /*
4  * Copyright (c) 2001, 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef	_EVBARM_INTR_H_
39 #define	_EVBARM_INTR_H_
40 
41 #ifdef _KERNEL
42 
43 /* Interrupt priority "levels". */
44 #define	IPL_NONE	0		/* nothing */
45 #define	IPL_SOFTCLOCK	1		/* clock */
46 #define	IPL_SOFTBIO	2		/* block I/O */
47 #define	IPL_SOFTNET	3		/* software network interrupt */
48 #define	IPL_SOFTSERIAL	4		/* software serial interrupt */
49 #define	IPL_VM		5		/* memory allocation */
50 #define	IPL_SCHED	6		/* clock interrupt */
51 #define	IPL_HIGH	7		/* everything */
52 
53 #define	NIPL		8
54 
55 /* Interrupt sharing types. */
56 #define	IST_NONE	0	/* none */
57 #define	IST_PULSE	1	/* pulsed */
58 #define	IST_EDGE	2	/* edge-triggered */
59 #define	IST_LEVEL	3	/* level-triggered */
60 
61 #define IST_LEVEL_LOW	IST_LEVEL
62 #define IST_LEVEL_HIGH	4
63 #define IST_EDGE_FALLING IST_EDGE
64 #define IST_EDGE_RISING	5
65 #define IST_EDGE_BOTH	6
66 #define IST_SOFT	7
67 
68 #ifdef __OLD_INTERRUPT_CODE	/* XXX XXX XXX */
69 
70 /* Software interrupt priority levels */
71 
72 #ifdef __HAVE_FAST_SOFTINTS
73 #define SOFTIRQ_CLOCK   0
74 #define SOFTIRQ_BIO     1
75 #define SOFTIRQ_NET     2
76 #define SOFTIRQ_SERIAL  3
77 
78 #define SOFTIRQ_BIT(x)  (1 << x)
79 #endif
80 
81 #include <arm/arm32/psl.h>
82 
83 #else /* ! __OLD_INTERRUPT_CODE */
84 
85 #define	__NEWINTR	/* enables new hooks in cpu_fork()/cpu_switch() */
86 
87 #ifndef _LOCORE
88 
89 #include <sys/device.h>
90 #include <sys/queue.h>
91 
92 #if defined(_LKM)
93 
94 int	_splraise(int);
95 int	_spllower(int);
96 void	splx(int);
97 #ifdef __HAVE_FAST_SOFTINTS
98 void	_setsoftintr(int);
99 #endif
100 
101 #else	/* _LKM */
102 
103 #include "opt_arm_intr_impl.h"
104 
105 #if defined(ARM_INTR_IMPL)
106 
107 /*
108  * Each board needs to define the following functions:
109  *
110  * int	_splraise(int);
111  * int	_spllower(int);
112  * void	splx(int);
113  *
114  * These may be defined as functions, static inline functions, or macros,
115  * but there must be a _spllower() and splx() defined as functions callable
116  * from assembly language (for cpu_switch()).  However, since it's quite
117  * useful to be able to inline splx(), you could do something like the
118  * following:
119  *
120  * in <boardtype>_intr.h:
121  * 	static inline int
122  *	boardtype_splx(int spl)
123  *	{...}
124  *
125  *	#define splx(nspl)	boardtype_splx(nspl)
126  *	...
127  * and in boardtype's machdep code:
128  *
129  *	...
130  *	#undef splx
131  *	int
132  *	splx(int spl)
133  *	{
134  *		return boardtype_splx(spl);
135  *	}
136  */
137 
138 #include ARM_INTR_IMPL
139 
140 #else /* ARM_INTR_IMPL */
141 
142 #error ARM_INTR_IMPL not defined.
143 
144 #endif	/* ARM_INTR_IMPL */
145 
146 #endif /* _LKM */
147 
148 typedef uint8_t ipl_t;
149 typedef struct {
150 	ipl_t _ipl;
151 } ipl_cookie_t;
152 
153 static inline ipl_cookie_t
154 makeiplcookie(ipl_t ipl)
155 {
156 
157 	return (ipl_cookie_t){._ipl = ipl};
158 }
159 
160 static inline int
161 splraiseipl(ipl_cookie_t icookie)
162 {
163 
164 	return _splraise(icookie._ipl);
165 }
166 
167 #define	spl0()		_spllower(IPL_NONE)
168 
169 #include <sys/spl.h>
170 
171 #endif /* ! _LOCORE */
172 
173 #endif /* __OLD_INTERRUPT_CODE */
174 
175 #endif /* _KERNEL */
176 
177 #endif	/* _EVBARM_INTR_H_ */
178