xref: /netbsd-src/sys/arch/evbarm/include/intr.h (revision 404fbe5fb94ca1e054339640cabb2801ce52dd30)
1 /*	$NetBSD: intr.h,v 1.20 2008/04/27 18:58:46 matt Exp $	*/
2 
3 /*
4  * Copyright (c) 2001, 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef	_EVBARM_INTR_H_
39 #define	_EVBARM_INTR_H_
40 
41 #ifdef _KERNEL
42 
43 /* Interrupt priority "levels". */
44 #ifdef __HAVE_FAST_SOFTINTS
45 #define	IPL_NONE	0		/* nothing */
46 #define	IPL_SOFTCLOCK	1		/* clock */
47 #define	IPL_SOFTBIO	2		/* block I/O */
48 #define	IPL_SOFTNET	3		/* software network interrupt */
49 #define	IPL_SOFTSERIAL	4		/* software serial interrupt */
50 #define	IPL_VM		5		/* memory allocation */
51 #define	IPL_SCHED	6		/* clock interrupt */
52 #define	IPL_HIGH	7		/* everything */
53 
54 #define	NIPL		8
55 #else
56 #define	IPL_NONE	0		/* nothing */
57 #define	IPL_SOFTCLOCK	IPL_NONE	/* clock */
58 #define	IPL_SOFTBIO	IPL_NONE	/* block I/O */
59 #define	IPL_SOFTNET	IPL_NONE	/* software network interrupt */
60 #define	IPL_SOFTSERIAL	IPL_NONE	/* software serial interrupt */
61 #define	IPL_VM		1		/* memory allocation */
62 #define	IPL_SCHED	2		/* clock interrupt */
63 #define	IPL_HIGH	3		/* everything */
64 
65 #define	NIPL		4
66 #endif
67 
68 /* Interrupt sharing types. */
69 #define	IST_NONE	0	/* none */
70 #define	IST_PULSE	1	/* pulsed */
71 #define	IST_EDGE	2	/* edge-triggered */
72 #define	IST_LEVEL	3	/* level-triggered */
73 
74 #define IST_LEVEL_LOW	IST_LEVEL
75 #define IST_LEVEL_HIGH	4
76 #define IST_EDGE_FALLING IST_EDGE
77 #define IST_EDGE_RISING	5
78 #define IST_EDGE_BOTH	6
79 #define IST_SOFT	7
80 
81 #ifdef __OLD_INTERRUPT_CODE	/* XXX XXX XXX */
82 
83 /* Software interrupt priority levels */
84 
85 #ifdef __HAVE_FAST_SOFTINTS
86 #define SOFTIRQ_CLOCK   0
87 #define SOFTIRQ_BIO     1
88 #define SOFTIRQ_NET     2
89 #define SOFTIRQ_SERIAL  3
90 
91 #define SOFTIRQ_BIT(x)  (1 << x)
92 #endif
93 
94 #include <arm/arm32/psl.h>
95 
96 #else /* ! __OLD_INTERRUPT_CODE */
97 
98 #define	__NEWINTR	/* enables new hooks in cpu_fork()/cpu_switch() */
99 
100 #ifndef _LOCORE
101 
102 #include <sys/device.h>
103 #include <sys/queue.h>
104 
105 #if defined(_LKM)
106 
107 int	_splraise(int);
108 int	_spllower(int);
109 void	splx(int);
110 #ifdef __HAVE_FAST_SOFTINTS
111 void	_setsoftintr(int);
112 #endif
113 
114 #else	/* _LKM */
115 
116 #include "opt_arm_intr_impl.h"
117 
118 #if defined(ARM_INTR_IMPL)
119 
120 /*
121  * Each board needs to define the following functions:
122  *
123  * int	_splraise(int);
124  * int	_spllower(int);
125  * void	splx(int);
126  *
127  * These may be defined as functions, static inline functions, or macros,
128  * but there must be a _spllower() and splx() defined as functions callable
129  * from assembly language (for cpu_switch()).  However, since it's quite
130  * useful to be able to inline splx(), you could do something like the
131  * following:
132  *
133  * in <boardtype>_intr.h:
134  * 	static inline int
135  *	boardtype_splx(int spl)
136  *	{...}
137  *
138  *	#define splx(nspl)	boardtype_splx(nspl)
139  *	...
140  * and in boardtype's machdep code:
141  *
142  *	...
143  *	#undef splx
144  *	int
145  *	splx(int spl)
146  *	{
147  *		return boardtype_splx(spl);
148  *	}
149  */
150 
151 #include ARM_INTR_IMPL
152 
153 #else /* ARM_INTR_IMPL */
154 
155 #error ARM_INTR_IMPL not defined.
156 
157 #endif	/* ARM_INTR_IMPL */
158 
159 #endif /* _LKM */
160 
161 typedef uint8_t ipl_t;
162 typedef struct {
163 	ipl_t _ipl;
164 } ipl_cookie_t;
165 
166 static inline ipl_cookie_t
167 makeiplcookie(ipl_t ipl)
168 {
169 
170 	return (ipl_cookie_t){._ipl = ipl};
171 }
172 
173 static inline int
174 splraiseipl(ipl_cookie_t icookie)
175 {
176 
177 	return _splraise(icookie._ipl);
178 }
179 
180 #define	spl0()		_spllower(IPL_NONE)
181 
182 #include <sys/spl.h>
183 
184 #endif /* ! _LOCORE */
185 
186 #endif /* __OLD_INTERRUPT_CODE */
187 
188 #endif /* _KERNEL */
189 
190 #endif	/* _EVBARM_INTR_H_ */
191