xref: /netbsd-src/sys/arch/evbarm/include/intr.h (revision 06be8101a16cc95f40783b3cb7afd12112103a9a)
1 /* 	$NetBSD: intr.h,v 1.3 2001/10/27 16:07:45 rearnsha Exp $	*/
2 
3 /*
4  * Copyright (c) 1997 Mark Brinicombe.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Mark Brinicombe
18  *	for the NetBSD Project.
19  * 4. The name of the company nor the name of the author may be used to
20  *    endorse or promote products derived from this software without specific
21  *    prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
24  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  */
35 
36 #ifndef _EVBARM_INTR_H_
37 #define _EVBARM_INTR_H_
38 
39 #ifdef NEWINTR
40 /* Define the various Interrupt Priority Levels */
41 
42 /* Interrupt Priority Levels are mutually exclusive. */
43 
44 #define	IPL_NONE	0	/* no interrupts blocked */
45 #define	IPL_SOFT	1	/* generic soft interrupts */
46 #define	IPL_SOFTCLOCK	2	/* clock soft interrupts */
47 #define	IPL_SOFTNET	3	/* network soft interrupts */
48 #define	IPL_SOFTSERIAL	4	/* serial soft interrupts */
49 #define IPL_BIO		5	/* block I/O */
50 #define IPL_NET		6	/* network */
51 #define IPL_TTY		7	/* terminal */
52 #define IPL_IMP		8	/* memory allocation */
53 #define IPL_AUDIO	9	/* audio */
54 #define IPL_CLOCK	10	/* clock */
55 #define IPL_SERIAL	11	/* serial */
56 #define IPL_PERF	12	/* peformance monitoring unit */
57 #define IPL_HIGH	13	/* blocks all interrupts */
58 
59 #define IPL_LEVELS	14
60 
61 #define	IST_UNUSABLE	-1	/* interrupt cannot be used */
62 #define	IST_NONE	0	/* none (dummy) */
63 #define	IST_PULSE	1	/* pulsed */
64 #define	IST_EDGE	2	/* edge-triggered */
65 #define	IST_LEVEL	3	/* level-triggered */
66 
67 #if defined (_KERNEL) && !defined(_LOCORE)
68 #include <sys/queue.h>
69 #include <sys/device.h>
70 
71 extern int _splraise(int);
72 extern int _spllower(int);
73 extern int _splget(int);
74 extern int _splset(int);
75 extern int _splnone(void);
76 extern void _softintrset(int);
77 extern int _softintrclr(int);
78 
79 #define	splsoftclock()		_splraise(IPL_SOFTCLOCK)
80 #define	splsoftnet()		_splraise(IPL_SOFTNET)
81 #define	splsoftserial()		_splraise(IPL_SOFTSERIAL)
82 #define	splbio()		_splraise(IPL_BIO)
83 #define	splnet()		_splraise(IPL_NET)
84 #define	spltty()		_splraise(IPL_TTY)
85 #define	splvm()			_splraise(IPL_IMP)
86 #define	splaudio()		_splraise(IPL_AUDIO)
87 #define	splclock()		_splraise(IPL_CLOCK)
88 #define	splserial()		_splraise(IPL_SERIAL)
89 #define	splhigh()		_splraise(IPL_HIGH)
90 #define	spl0()			(void) _splnone()
91 #define	splx(s)			(void) _splset(s)
92 
93 #define	spllock()		splhigh()
94 #define	splsched()		splclock()
95 #define	splstatclock()		splclock()
96 
97 #define	spllowersoftclock()	_spllower(IPL_SOFTCLOCK)
98 
99 #define	setsoftclock()		_softintrset(IPL_SOFTCLOCK)
100 #define	setsoftnet()		_softintrset(IPL_SOFTNET)
101 #define	setsoftserial()		_softintrset(IPL_SOFTSERIAL)
102 
103 #define	_SPL_0			IPL_NONE
104 
105 struct intrsource {
106 	void *is_cookie;
107 	LIST_ENTRY(evbarm_intrsource) is_link;
108 	void *(*is_establish)(void *, int, int, int (*)(void *), void *);
109 	void (*is_disestablish)(void *, void *);
110 
111 	void (*is_setmask)(int);
112 };
113 
114 #define	intr_establish(src, irq, type, func, arg) \
115 	(((src)->is_establish)((src)->is_cookie, irq, type, func, arg))
116 #define	intr_disestablish(src, ih) \
117 	(((src)->is_disestablish)((src)->is_cookie, ih))
118 
119 struct irqhandler {
120 	LIST_ENTRY(intrhandler) ih_ipllink;
121 	LIST_ENTRY(intrhandler) ih_srclink;
122 	int (*ih_func)(void *);
123 	void *ih_arg;
124 	int ih_flags;
125 	int ih_ipl;
126 	struct evcnt ih_ev;
127 };
128 
129 struct fiqhandler {
130 	void (*fh_func)(void);	/* handler function */
131 	size_t fh_size;		/* Size of handler function */
132 	register_t fh_r8;	/* FIQ mode r8 */
133 	register_t fh_r9;	/* FIQ mode r9 */
134 	register_t fh_r10;	/* FIQ mode r10 */
135 	register_t fh_r11;	/* FIQ mode r11 */
136 	register_t fh_r12;	/* FIQ mode r12 */
137 	register_t fh_r13;	/* FIQ mode r13 */
138 };
139 
140 #endif	/* _KERNEL */
141 
142 #else	/* NEWINTR */
143 /* This should go away when we port the Integrator code to use NEWINTR */
144 
145 /* Define the various Interrupt Priority Levels */
146 
147 /* Hardware Interrupt Priority Levels are not mutually exclusive. */
148 
149 #define IPL_BIO		0	/* block I/O */
150 #define IPL_NET		1	/* network */
151 #define IPL_TTY		2	/* terminal */
152 #define IPL_IMP		3	/* memory allocation */
153 #define IPL_AUDIO	4	/* audio */
154 #define IPL_CLOCK	5	/* clock */
155 #define IPL_STATCLOCK	6	/* statclock */
156 #define IPL_HIGH	7	/*  */
157 #define IPL_SERIAL	8	/* serial */
158 #define IPL_NONE	9
159 
160 #define IPL_LEVELS	9
161 
162 #define	IST_UNUSABLE	-1	/* interrupt cannot be used */
163 #define	IST_NONE	0	/* none (dummy) */
164 #define	IST_PULSE	1	/* pulsed */
165 #define	IST_EDGE	2	/* edge-triggered */
166 #define	IST_LEVEL	3	/* level-triggered */
167 
168 /* Software interrupt priority levels */
169 
170 #define SOFTIRQ_CLOCK	0
171 #define SOFTIRQ_NET	1
172 #define SOFTIRQ_SERIAL	2
173 
174 #define SOFTIRQ_BIT(x)	(1 << x)
175 
176 #include <machine/irqhandler.h>
177 #include <machine/psl.h>
178 
179 #endif	/* NEWINTR */
180 
181 #endif	/* _EVBARM_INTR_H */
182