1 /* $NetBSD: ifpga_pci.c,v 1.20 2017/04/21 12:18:59 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 2001 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * Copyright (c) 1997,1998 Mark Brinicombe. 32 * Copyright (c) 1997,1998 Causality Limited 33 * All rights reserved. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 3. All advertising materials mentioning features or use of this software 44 * must display the following acknowledgement: 45 * This product includes software developed by Mark Brinicombe 46 * for the NetBSD Project. 47 * 4. The name of the company nor the name of the author may be used to 48 * endorse or promote products derived from this software without specific 49 * prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 52 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 53 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 54 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 55 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 56 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 57 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 58 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 59 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 60 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 61 * SUCH DAMAGE. 62 */ 63 64 #define _ARM32_BUS_DMA_PRIVATE 65 66 #include <sys/cdefs.h> 67 __KERNEL_RCSID(0, "$NetBSD: ifpga_pci.c,v 1.20 2017/04/21 12:18:59 jmcneill Exp $"); 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/conf.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 75 #include <evbarm/integrator/int_bus_dma.h> 76 77 #include <machine/intr.h> 78 79 #include <dev/pci/pcireg.h> 80 #include <dev/pci/pcivar.h> 81 82 #include <evbarm/ifpga/ifpgareg.h> 83 #include <evbarm/ifpga/ifpgamem.h> 84 #include <evbarm/ifpga/ifpga_pcivar.h> 85 #include <evbarm/dev/v360reg.h> 86 87 88 void ifpga_pci_attach_hook (device_t, device_t, 89 struct pcibus_attach_args *); 90 int ifpga_pci_bus_maxdevs (void *, int); 91 pcitag_t ifpga_pci_make_tag (void *, int, int, int); 92 void ifpga_pci_decompose_tag (void *, pcitag_t, int *, int *, 93 int *); 94 pcireg_t ifpga_pci_conf_read (void *, pcitag_t, int); 95 void ifpga_pci_conf_write (void *, pcitag_t, int, pcireg_t); 96 int ifpga_pci_intr_map (const struct pci_attach_args *, 97 pci_intr_handle_t *); 98 const char *ifpga_pci_intr_string (void *, pci_intr_handle_t, char *, size_t); 99 const struct evcnt *ifpga_pci_intr_evcnt (void *, pci_intr_handle_t); 100 void *ifpga_pci_intr_establish (void *, pci_intr_handle_t, int, 101 int (*)(void *), void *); 102 void ifpga_pci_intr_disestablish (void *, void *); 103 104 struct arm32_pci_chipset ifpga_pci_chipset = { 105 NULL, /* conf_v */ 106 ifpga_pci_attach_hook, 107 ifpga_pci_bus_maxdevs, 108 ifpga_pci_make_tag, 109 ifpga_pci_decompose_tag, 110 ifpga_pci_conf_read, 111 ifpga_pci_conf_write, 112 NULL, /* intr_v */ 113 ifpga_pci_intr_map, 114 ifpga_pci_intr_string, 115 ifpga_pci_intr_evcnt, 116 NULL, /* intr_setattr */ 117 ifpga_pci_intr_establish, 118 ifpga_pci_intr_disestablish, 119 #ifdef __HAVE_PCI_CONF_HOOK 120 NULL, 121 #endif 122 ifpga_pci_conf_interrupt, 123 }; 124 125 /* 126 * Use the integrator-specific bus_dma routines. 127 */ 128 struct arm32_bus_dma_tag ifpga_pci_bus_dma_tag = { 129 0, 130 0, 131 NULL, 132 _bus_dmamap_create, 133 _bus_dmamap_destroy, 134 _bus_dmamap_load, 135 _bus_dmamap_load_mbuf, 136 _bus_dmamap_load_uio, 137 _bus_dmamap_load_raw, 138 _bus_dmamap_unload, 139 _bus_dmamap_sync, /* pre */ 140 NULL, /* post */ 141 _bus_dmamem_alloc, 142 _bus_dmamem_free, 143 _bus_dmamem_map, 144 _bus_dmamem_unmap, 145 _bus_dmamem_mmap, 146 }; 147 148 /* 149 * Currently we only support 12 devices as we select directly in the 150 * type 0 config cycle 151 * (See conf_{read,write} for more detail 152 */ 153 #define MAX_PCI_DEVICES 21 154 155 /*static int 156 pci_intr(void *arg) 157 { 158 printf("pci int %x\n", (int)arg); 159 return 0; 160 }*/ 161 162 163 void 164 ifpga_pci_attach_hook(device_t parent, device_t self, 165 struct pcibus_attach_args *pba) 166 { 167 #ifdef PCI_DEBUG 168 printf("ifpga_pci_attach_hook()\n"); 169 #endif 170 } 171 172 int 173 ifpga_pci_bus_maxdevs(void *pcv, int busno) 174 { 175 #ifdef PCI_DEBUG 176 printf("ifpga_pci_bus_maxdevs(pcv=%p, busno=%d)\n", pcv, busno); 177 #endif 178 return MAX_PCI_DEVICES; 179 } 180 181 pcitag_t 182 ifpga_pci_make_tag(void *pcv, int bus, int device, int function) 183 { 184 #ifdef PCI_DEBUG 185 printf("ifpga_pci_make_tag(pcv=%p, bus=%d, device=%d, function=%d)\n", 186 pcv, bus, device, function); 187 #endif 188 return (bus << 16) | (device << 11) | (function << 8); 189 } 190 191 void 192 ifpga_pci_decompose_tag(void *pcv, pcitag_t tag, int *busp, int *devicep, 193 int *functionp) 194 { 195 #ifdef PCI_DEBUG 196 printf("ifpga_pci_decompose_tag(pcv=%p, tag=0x%08lx, bp=%p, dp=%p, " 197 "fp=%p)\n", pcv, tag, busp, devicep, functionp); 198 #endif 199 200 if (busp != NULL) 201 *busp = (tag >> 16) & 0xff; 202 if (devicep != NULL) 203 *devicep = (tag >> 11) & 0x1f; 204 if (functionp != NULL) 205 *functionp = (tag >> 8) & 0x7; 206 } 207 208 pcireg_t 209 ifpga_pci_conf_read(void *pcv, pcitag_t tag, int reg) 210 { 211 pcireg_t data; 212 struct ifpga_pci_softc *sc = (struct ifpga_pci_softc *)pcv; 213 int bus, device, function; 214 u_int address; 215 216 if ((unsigned int)reg >= PCI_CONF_SIZE) 217 return (pcireg_t) -1; 218 219 ifpga_pci_decompose_tag(pcv, tag, &bus, &device, &function); 220 221 /* Reset the appertures so that we can talk to the register space. */ 222 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 223 IFPGA_PCI_APP0_512MB_BASE); 224 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 225 IFPGA_PCI_APP1_CONF_BASE); 226 227 if (bus == 0) { 228 address = (1 << (device + 11)) | reg; 229 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 230 IFPGA_PCI_APP1_CONF_T0_MAP | ((address >> 16) & 0xff00)); 231 232 /* Read the value from the bus... */ 233 data = bus_space_read_4(sc->sc_iot, sc->sc_conf_ioh, 234 address & 0x00ffffff); 235 236 } else { 237 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 238 IFPGA_PCI_APP1_CONF_T1_MAP); 239 240 /* Read the value from the bus... */ 241 data = bus_space_read_4(sc->sc_iot, sc->sc_conf_ioh, 242 tag | reg); 243 } 244 /* ... and put the memory spaces back again. */ 245 246 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 247 IFPGA_PCI_APP1_256MB_BASE); 248 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 249 IFPGA_PCI_APP1_256MB_MAP); 250 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 251 IFPGA_PCI_APP0_256MB_BASE); 252 #ifdef PCI_DEBUG 253 printf("ifpga_pci_conf_read(pcv=%p tag=0x%08lx reg=0x%02x)=0x%08x\n", 254 pcv, tag, reg, data); 255 #endif 256 return data; 257 } 258 259 void 260 ifpga_pci_conf_write(void *pcv, pcitag_t tag, int reg, pcireg_t data) 261 { 262 struct ifpga_pci_softc *sc = (struct ifpga_pci_softc *)pcv; 263 int bus, device, function; 264 u_int address; 265 266 #ifdef PCI_DEBUG 267 printf("ifpga_pci_conf_write(pcv=%p tag=0x%08lx reg=0x%02x, 0x%08x)\n", 268 pcv, tag, reg, data); 269 #endif 270 271 if ((unsigned int)reg >= PCI_CONF_SIZE) 272 return; 273 274 ifpga_pci_decompose_tag(pcv, tag, &bus, &device, &function); 275 276 /* Reset the appertures so that we can talk to the register space. */ 277 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 278 IFPGA_PCI_APP0_512MB_BASE); 279 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 280 IFPGA_PCI_APP1_CONF_BASE); 281 282 if (bus == 0) { 283 address = (1 << (device + 11)) | reg; 284 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 285 IFPGA_PCI_APP1_CONF_T0_MAP | ((address >> 16) & 0xff00)); 286 287 /* Write the value to the bus... */ 288 bus_space_write_4(sc->sc_iot, sc->sc_conf_ioh, 289 address & 0x00ffffff, data); 290 291 } else { 292 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 293 IFPGA_PCI_APP1_CONF_T1_MAP); 294 295 /* Write the value to the bus... */ 296 bus_space_write_4(sc->sc_iot, sc->sc_conf_ioh, tag | reg, 297 data); 298 } 299 /* ... and put the memory spaces back again. */ 300 301 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 302 IFPGA_PCI_APP1_256MB_BASE); 303 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 304 IFPGA_PCI_APP1_256MB_MAP); 305 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 306 IFPGA_PCI_APP0_256MB_BASE); 307 } 308 309 int 310 ifpga_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 311 { 312 int line = pa->pa_intrline; 313 314 #ifdef PCI_DEBUG 315 int pin = pa->pa_intrpin; 316 void *pcv = pa->pa_pc; 317 pcitag_t intrtag = pa->pa_intrtag; 318 int bus, device, function; 319 320 ifpga_pci_decompose_tag(pcv, intrtag, &bus, &device, &function); 321 printf("ifpga_pci_intr_map: pcv=%p, tag=%08lx pin=%d line=%d " 322 "dev=%d\n", pcv, intrtag, pin, line, device); 323 #endif 324 325 326 #ifdef PCI_DEBUG 327 printf("pin %d, line %d mapped to int %d\n", pin, line, line); 328 #endif 329 330 *ihp = line; 331 return 0; 332 } 333 334 const char * 335 ifpga_pci_intr_string(void *pcv, pci_intr_handle_t ih, char *buf, size_t len) 336 { 337 #ifdef PCI_DEBUG 338 printf("ifpga_pci_intr_string(pcv=%p, ih=0x%lx)\n", pcv, ih); 339 #endif 340 if (ih == 0) 341 panic("ifpga_pci_intr_string: bogus handle 0x%lx", ih); 342 343 snprintf(buf, len, "pciint%ld", ih - IFPGA_INTRNUM_PCIINT0); 344 return buf; 345 } 346 347 const struct evcnt * 348 ifpga_pci_intr_evcnt(void *pcv, pci_intr_handle_t ih) 349 { 350 351 /* XXX for now, no evcnt parent reported */ 352 return NULL; 353 } 354 355 void * 356 ifpga_pci_intr_establish(void *pcv, pci_intr_handle_t ih, int level, 357 int (*func) (void *), void *arg) 358 { 359 void *intr; 360 361 #ifdef PCI_DEBUG 362 printf("ifpga_pci_intr_establish(pcv=%p, ih=0x%lx, level=%d, " 363 "func=%p, arg=%p)\n", pcv, ih, level, func, arg); 364 #endif 365 366 intr = ifpga_intr_establish(ih, level, func, arg); 367 368 return intr; 369 } 370 371 void 372 ifpga_pci_intr_disestablish(void *pcv, void *cookie) 373 { 374 #ifdef PCI_DEBUG 375 printf("ifpga_pci_intr_disestablish(pcv=%p, cookie=%p)\n", 376 pcv, cookie); 377 #endif 378 ifpga_intr_disestablish(cookie); 379 } 380